This is a direct backport of upstream commit [1] for aarch64 (legacy operation port) done under [2] The same code can be applied on the aarch SRE port to be able to enable FPU context saving on all tasks context switch to mitigate GCC optimization to use SIMD registers for copy. [1] "55eceb22: Add configUSE_TASK_FPU_SUPPORT to AARCH64 port (#1048)" [2] https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/1048 Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com> |
1 month ago | |
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README.md | 11 months ago | |
port.c | 1 month ago | |
portASM.S | 1 year ago | |
portmacro.h | 1 month ago |
README.md
Armv8-A architecture support
The Armv8-A architecture introduces the ability to use 64-bit and 32-bit Execution states, known as AArch64 and AArch32 respectively. The AArch64 Execution state supports the A64 instruction set. It holds addresses in 64-bit registers and allows instructions in the base instruction set to use 64-bit registers for their processing.
The AArch32 Execution state is a 32-bit Execution state that preserves backwards compatibility with the Armv7-A architecture, enhancing that profile so that it can support some features included in the AArch64 state. It supports the T32 and A32 instruction sets. Follow the link for more information.
ARM_AARCH64_SRE port
This port adds support for Armv8-A architecture AArch64 execution state. This port is generic and can be used as a starting point for Armv8-A application processors.
- ARM_AARCH64_SRE
- System Register interface to access Arm GIC registers