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/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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* File Name : 75x_tim.c
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* Author : MCD Application Team
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* Date First Issued : 03/10/2006
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* Description : This file provides all the TIM software functions.
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********************************************************************************
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* History:
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* 07/17/2006 : V1.0
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* 03/10/2006 : V0.1
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "75x_tim.h"
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#include "75x_mrcc.h"
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* TIM interrupt masks */
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#define TIM_IT_Clear_Mask 0x7FFF
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#define TIM_IT_Enable_Mask 0x7FFF
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/* TIM Input Capture Selection Set/Reset */
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#define TIM_IC1S_Set 0x0001
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#define TIM_IC1S_Reset 0x003E
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/* TIM Input Capture Selection Set/Reset */
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#define TIM_IC2S_Set 0x0002
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#define TIM_IC2S_Reset 0x003D
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/* TIM_SCR Masks bit */
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#define TIM_Encoder_Mask 0x731C
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#define TIM_SlaveModeSelection_Mask 0x7307
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#define TIM_TriggerSelection_Mask 0x701F
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#define TIM_InternalTriggerSelection_Mask 0x031F
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/* TIM Encoder mode Set value */
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#define TIM_Encoder1_Set 0x0001
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#define TIM_Encoder2_Set 0x0002
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#define TIM_Encoder3_Set 0x0003
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/* TIM Slave Mode Enable Set/Reset value */
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#define TIM_SME_Reset 0x731B
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#define TIM_SME_Set 0x0004
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/* TIM Internal Trigger Selection value */
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#define TIM_ITS_TIM0 0x1000
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#define TIM_ITS_TIM1 0x2000
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#define TIM_ITS_TIM2 0x3000
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#define TIM_ITS_PWM 0x4000
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/* TIM Trigger Selection value */
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#define TIM_TS_IC1_Set 0x0200
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#define TIM_TS_IC2_Set 0x0300
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/* TIM Slave Mode selction external clock Set value */
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#define TIM_SMS_EXTCLK_Set 0x0008
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#define TIM_SMS_RESETCLK_Set 0x0000
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/* TIM_CR Masks bit */
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#define TIM_DBASE_Mask 0x077F
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#define TIM_MasterModeSelection_Mask 0xFC7F
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#define TIM_CounterMode_Mask 0xFF8F
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/* TIM Update flag selection Set/Reset value */
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#define TIM_UFS_Reset 0xFFFE
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#define TIM_UFS_Set 0x0001
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/* TIM Counter value */
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#define TIM_COUNTER_Reset 0x0002
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#define TIM_COUNTER_Start 0x0004
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#define TIM_COUNTER_Stop 0xFFFB
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/* TIM One pulse Mode set value */
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#define TIM_OPM_Set 0x0008
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#define TIM_OPM_Reset 0xFFF7
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/* TIM Debug Mode Set/Reset value */
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#define TIM_DBGC_Set 0x0400
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#define TIM_DBGC_Reset 0xFB7F
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/* TIM Input Capture Enable/Disable value */
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#define TIM_IC1_Enable 0x0004
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#define TIM_IC2_Enable 0x0010
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/* TIM Input Capture Polarity Set/Reset value */
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#define TIM_IC1P_Set 0x0008
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#define TIM_IC2P_Set 0x0020
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#define TIM_IC1P_Reset 0x0037
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#define TIM_IC2P_Reset 0x001F
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/* TIM Output Compare Polarity Set/Reset value */
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#define TIM_OC1P_Set 0x0020
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#define TIM_OC2P_Set 0x2000
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#define TIM_OC1P_Reset 0x3F1F
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#define TIM_OC2P_Reset 0x1F3F
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/* TIM Output Compare control mode constant */
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#define TIM_OCControl_PWM 0x000C
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#define TIM_OCControl_OCToggle 0x0006
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#define TIM_OCControl_OCInactive 0x0004
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#define TIM_OCControl_OCActive 0x0002
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#define TIM_OCControl_OCTiming 0x0000
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/* TIM Output Compare mode Enable value */
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#define TIM_OC1_Enable 0x0010
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#define TIM_OC2_Enable 0x1000
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/* TIM Output Compare mode Mask value */
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#define TIM_OC1C_Mask 0x3F31
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#define TIM_OC2C_Mask 0x313F
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/* TIM Preload bit Set/Reset value */
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#define TIM_PLD1_Set 0x0001
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#define TIM_PLD1_Reset 0xFFFE
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#define TIM_PLD2_Set 0x0100
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#define TIM_PLD2_Reset 0xFEFF
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/* TIM OCRM Set/Reset value */
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#define TIM_OCRM_Set 0x0080
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#define TIM_OCRM_Reset 0x030D
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/* Reset Register Masks */
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#define TIM_Pulse2_Reset_Mask 0x0000
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#define TIM_Prescaler_Reset_Mask 0x0000
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#define TIM_Pulse1_Reset_Mask 0x0000
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#define TIM_Period_Reset_Mask 0xFFFF
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#define TIM_Counter_Reset 0x0002
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/* Private function prototypes -----------------------------------------------*/
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static void ICAP_ModuleConfig(TIM_TypeDef* TIMx, TIM_InitTypeDef* TIM_InitStruct);
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static void Encoder_ModeConfig(TIM_TypeDef* TIMx, TIM_InitTypeDef* TIM_InitStruct);
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static void OCM_ModuleConfig(TIM_TypeDef* TIMx, TIM_InitTypeDef* TIM_InitStruct);
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/* Private functions ---------------------------------------------------------*/
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/******************************************************************************
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* Function Name : TIM_DeInit
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* Description : Deinitializes TIM peripheral registers to their default reset
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* values.
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* Input : TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
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* Output : None
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* Return : None
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*******************************************************************************/
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void TIM_DeInit(TIM_TypeDef *TIMx)
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{
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if(TIMx == TIM0)
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{
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MRCC_PeripheralSWResetConfig(MRCC_Peripheral_TIM0,ENABLE);
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MRCC_PeripheralSWResetConfig(MRCC_Peripheral_TIM0,DISABLE);
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}
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else if(TIMx == TIM1)
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{
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MRCC_PeripheralSWResetConfig(MRCC_Peripheral_TIM1,ENABLE);
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MRCC_PeripheralSWResetConfig(MRCC_Peripheral_TIM1,DISABLE);
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}
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else if(TIMx == TIM2)
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{
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MRCC_PeripheralSWResetConfig(MRCC_Peripheral_TIM2,ENABLE);
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MRCC_PeripheralSWResetConfig(MRCC_Peripheral_TIM2,DISABLE);
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}
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}
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/*******************************************************************************
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* Function Name : TIM_Init
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* Description : Initializes the TIMx peripheral according to the specified
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* parameters in the TIM_InitStruct .
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* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
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* - TIM_InitStruct: pointer to a TIM_InitTypeDef structure that
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* contains the configuration information for the specified TIM
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* peripheral.
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* Output : None
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* Return : None
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*******************************************************************************/
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void TIM_Init(TIM_TypeDef* TIMx, TIM_InitTypeDef* TIM_InitStruct)
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{
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/* Set the prescaler value */
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TIMx->PSC = TIM_InitStruct->TIM_Prescaler;
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/* Select the clock source */
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TIM_ClockSourceConfig(TIMx, TIM_InitStruct->TIM_ClockSource,
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TIM_InitStruct->TIM_ExtCLKEdge);
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/* Select the counter mode */
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TIMx->CR &= TIM_CounterMode_Mask;
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TIMx->CR |= TIM_InitStruct->TIM_CounterMode;
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/* Set the period value */
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TIMx->ARR = TIM_InitStruct->TIM_Period;
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switch(TIM_InitStruct->TIM_Mode)
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{
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case TIM_Mode_OCTiming: case TIM_Mode_OCActive: case TIM_Mode_OCInactive:
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case TIM_Mode_OCToggle: case TIM_Mode_PWM:
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OCM_ModuleConfig(TIMx, TIM_InitStruct);
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break;
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case TIM_Mode_PWMI: case TIM_Mode_IC:
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ICAP_ModuleConfig(TIMx, TIM_InitStruct);
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break;
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case TIM_Mode_Encoder1: case TIM_Mode_Encoder2: case TIM_Mode_Encoder3:
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Encoder_ModeConfig(TIMx, TIM_InitStruct);
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break;
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case TIM_Mode_OPM_PWM: case TIM_Mode_OPM_Toggle: case TIM_Mode_OPM_Active:
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/* Output module configuration */
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OCM_ModuleConfig(TIMx, TIM_InitStruct);
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/* Input module configuration */
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ICAP_ModuleConfig(TIMx, TIM_InitStruct);
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/* Set the slave mode to trigger Mode */
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TIMx->SCR |= TIM_SynchroMode_Trigger;
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/* Repetitive pulse state selection */
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if(TIM_InitStruct->TIM_RepetitivePulse == TIM_RepetitivePulse_Disable)
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{
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TIMx->CR |= TIM_OPM_Set;
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}
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else
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{
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TIMx->CR &= TIM_OPM_Reset;
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}
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break;
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default:
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break;
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}
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}
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/*******************************************************************************
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* Function Name : TIM_StructInit
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* Description : Fills each TIM_InitStruct member with its default value.
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* Input : TIM_InitStruct : pointer to a TIM_InitTypeDef structure
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* which will be initialized.
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* Output : None
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* Return : None.
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*******************************************************************************/
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void TIM_StructInit(TIM_InitTypeDef *TIM_InitStruct)
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{
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/* Set the default configuration */
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TIM_InitStruct->TIM_Mode = TIM_Mode_OCTiming;
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TIM_InitStruct->TIM_Prescaler = TIM_Prescaler_Reset_Mask;
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TIM_InitStruct->TIM_ClockSource = TIM_ClockSource_Internal;
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TIM_InitStruct->TIM_ExtCLKEdge = TIM_ExtCLKEdge_Rising;
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TIM_InitStruct->TIM_CounterMode = TIM_CounterMode_Up;
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TIM_InitStruct->TIM_Period = TIM_Period_Reset_Mask;
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TIM_InitStruct->TIM_Channel = TIM_Channel_ALL;
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TIM_InitStruct->TIM_Pulse1 = TIM_Pulse1_Reset_Mask;
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TIM_InitStruct->TIM_Pulse2 = TIM_Pulse2_Reset_Mask;
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TIM_InitStruct->TIM_RepetitivePulse = TIM_RepetitivePulse_Disable;
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TIM_InitStruct->TIM_Polarity1 = TIM_Polarity1_Low;
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TIM_InitStruct->TIM_Polarity2 = TIM_Polarity2_Low;
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TIM_InitStruct->TIM_IC1Selection = TIM_IC1Selection_TI1;
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TIM_InitStruct->TIM_IC2Selection = TIM_IC2Selection_TI1;
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TIM_InitStruct->TIM_IC1Polarity = TIM_IC1Polarity_Rising;
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TIM_InitStruct->TIM_IC2Polarity = TIM_IC2Polarity_Rising;
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TIM_InitStruct->TIM_PWMI_ICSelection = TIM_PWMI_ICSelection_TI1;
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TIM_InitStruct->TIM_PWMI_ICPolarity = TIM_PWMI_ICPolarity_Rising;
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}
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/*******************************************************************************
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* Function Name : TIM_Cmd
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* Description : Enables or disables the specified TIM peripheral.
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* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
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* - Newstate: new state of the TIMx peripheral.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void TIM_Cmd(TIM_TypeDef *TIMx, FunctionalState Newstate)
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{
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if(Newstate == ENABLE)
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{
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TIMx->CR |= TIM_COUNTER_Start;
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}
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else
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{
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TIMx->CR &= TIM_COUNTER_Stop;
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}
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}
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/*******************************************************************************
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* Function Name : TIM_ITConfig
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* Description : Enables or disables the TIM interrupts.
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* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
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* - TIM_IT: specifies the TIM interrupts sources to be enabled
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* or disabled.
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* This parameter can be any combination of the following values:
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* - TIM_IT_IC1: Input Capture 1 Interrupt
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* - TIM_IT_OC1: Output Compare 1 Interrupt
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* - TIM_IT_Update: Timer update Interrupt
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* - TIM_IT_GlobalUpdate: Timer global update Interrupt
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* - TIM_IT_IC2: Input Capture 2 Interrupt
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* - TIM_IT_OC2: Output Compare 2 Interrupt
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* - Newstate: new state of the specified TIMx interrupts.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void TIM_ITConfig(TIM_TypeDef *TIMx, u16 TIM_IT, FunctionalState Newstate)
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{
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u16 TIM_IT_Enable = 0;
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TIM_IT_Enable = TIM_IT & TIM_IT_Enable_Mask;
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if(Newstate == ENABLE)
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{
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/* Update interrupt global source: overflow/undeflow, counter reset operation
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or slave mode controller in reset mode */
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if((TIM_IT & TIM_IT_GlobalUpdate) == TIM_IT_GlobalUpdate)
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{
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TIMx->CR &= TIM_UFS_Reset;
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}
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/* Update interrupt source: counter overflow/underflow */
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else if((TIM_IT & TIM_IT_Update) == TIM_IT_Update)
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{
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TIMx->CR |= TIM_UFS_Set;
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}
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/* Select and enable the interrupts requests */
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TIMx->RSR |= TIM_IT_Enable;
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TIMx->RER |= TIM_IT_Enable;
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}
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/* Disable the interrupts requests */
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else
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{
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TIMx->RSR &= ~TIM_IT_Enable;
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TIMx->RER &= ~TIM_IT_Enable;
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}
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}
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/*******************************************************************************
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* Function Name : TIM_PreloadConfig
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* Description : Enables or disables TIM peripheral Preload register on OCRx.
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* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
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* - TIM_Channel: specifies the TIM channel to be used.
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* This parameter can be one of the following values:
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* - TIM_Channel_1: TIM Channel 1 is used
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* - TIM_Channel_2: TIM Channel 2 is used
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* - TIM_Channel_ALL: TIM Channel 1and 2 are used
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* - Newstate: new state of the TIMx peripheral Preload register
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void TIM_PreloadConfig(TIM_TypeDef *TIMx, u16 TIM_Channel, FunctionalState Newstate)
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{
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if(Newstate == ENABLE)
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{
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switch (TIM_Channel)
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{
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case TIM_Channel_1:
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TIMx->OMR1 |= TIM_PLD1_Set;
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break;
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case TIM_Channel_2:
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TIMx->OMR1 |= TIM_PLD2_Set;
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break;
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case TIM_Channel_ALL:
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TIMx->OMR1 |= TIM_PLD1_Set | TIM_PLD2_Set;
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break;
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default:
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break;
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}
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}
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else
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{
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switch (TIM_Channel)
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{
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case TIM_Channel_1:
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TIMx->OMR1 &= TIM_PLD1_Reset;
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break;
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case TIM_Channel_2:
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TIMx->OMR1 &= TIM_PLD2_Reset;
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break;
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case TIM_Channel_ALL:
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TIMx->OMR1 &= TIM_PLD1_Reset & TIM_PLD2_Reset;
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break;
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default:
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break;
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}
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}
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}
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/*******************************************************************************
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* Function Name : TIM_DMAConfig
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* Description : Configures the TIM0<4D>s DMA interface.
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* Input : - TIM_DMASources: specifies the DMA Request sources.
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* This parameter can be any combination of the following values:
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* - TIM_DMASource_OC1: Output Compare 1 DMA source
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* - TIM_DMASource_OC2: Output Compare 2 DMA source
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* - TIM_DMASource_IC1: Input Capture 1 DMA source
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* - TIM_DMASource_IC2: Input Capture 2 DMA source
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* - TIM_DMASource_Update: Timer Update DMA source
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* - TIM_OCRMState: the state of output compare request mode.
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* This parameter can be one of the following values:
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* - TIM_OCRMState_Enable
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* - TIM_OCRMState_Disable
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* - TIM_DMABase:DMA Base address.
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|
|
* This parameter can be one of the following values:
|
|
|
* TIM_DMABase_CR, TIM_DMABase_SCR, TIM_DMABase_IMCR,
|
|
|
* TIM_DMABase_OMR1, TIM_DMABase_RSR,
|
|
|
* TIM_DMABase_RER, TIM_DMABase_ISR, TIM_DMABase_CNT,
|
|
|
* TIM_DMABase_PSC, TIM_DMABase_ARR, TIM_DMABase_OCR1,
|
|
|
* TIM_DMABase_OCR2, TIM_DMABase_ICR1, TIM_DMABase_ICR2
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_DMAConfig(u16 TIM_DMASources, u16 TIM_OCRMState, u16 TIM_DMABase)
|
|
|
{
|
|
|
/* Select the DMA requests */
|
|
|
TIM0->RSR &= TIM_DMASources;
|
|
|
|
|
|
/* Set the OCRM state */
|
|
|
if(TIM_OCRMState == TIM_OCRMState_Enable)
|
|
|
{
|
|
|
TIM0->RSR |= TIM_OCRM_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIM0->RSR &= TIM_OCRM_Reset;
|
|
|
}
|
|
|
|
|
|
/* Set the DMA Base address */
|
|
|
TIM0->CR &= TIM_DBASE_Mask;
|
|
|
TIM0->CR |= TIM_DMABase;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_DMACmd
|
|
|
* Description : Enables or disables the TIM0<4D>s DMA interface.
|
|
|
* Input : - TIM_DMASources: specifies the DMA Request sources.
|
|
|
* This parameter can be any combination of the following values:
|
|
|
* - TIM_DMASource_OC1: Output Compare 1 DMA source
|
|
|
* - TIM_DMASource_OC2: Output Compare 2 DMA source
|
|
|
* - TIM_DMASource_IC1: Input Capture 1 DMA source
|
|
|
* - TIM_DMASource_IC2: Input Capture 2 DMA source
|
|
|
* - TIM_DMASource_Update: Timer Update DMA source
|
|
|
* - Newstate: new state of the DMA Request sources.
|
|
|
* This parameter can be: ENABLE or DISABLE.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_DMACmd(u16 TIM_DMASources, FunctionalState Newstate)
|
|
|
{
|
|
|
if(Newstate == ENABLE)
|
|
|
{
|
|
|
TIM0->RER |= TIM_DMASources;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIM0->RER &= ~TIM_DMASources;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_ClockSourceConfig
|
|
|
* Description : Configures the TIM clock source.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
|
|
|
* - TIM_ClockSource: specifies the TIM clock source to be
|
|
|
* selected.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_ClockSource_Internal: CK_TIM internal clock
|
|
|
* - TIM_ClockSource_TI11: External input pin TI1
|
|
|
* connected to IC1 channel.
|
|
|
* - TIM_ClockSource_TI12: External input pin TI1
|
|
|
* connected to IC2 channel.
|
|
|
* - TIM_ClockSource_TI22: External input pin TI2
|
|
|
* connected to IC2 channel.
|
|
|
* - TIM_ClockSource_TI21: External input pin TI2
|
|
|
* connected to IC1 channel.
|
|
|
* - TIM_ExtCLKEdge: specifies the External input signal edge.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_ExtCLKEdge_Falling : Falling edge selected.
|
|
|
* - TIM_ExtCLKEdge_Rising : Rising edge selected.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_ClockSourceConfig(TIM_TypeDef *TIMx, u16 TIM_ClockSource,
|
|
|
u16 TIM_ExtCLKEdge)
|
|
|
{
|
|
|
if(TIM_ClockSource == TIM_ClockSource_Internal)
|
|
|
{
|
|
|
/* CK_TIM is used as clock source */
|
|
|
TIMx->SCR &= TIM_SME_Reset & TIM_SlaveModeSelection_Mask & TIM_TriggerSelection_Mask;
|
|
|
}
|
|
|
else
|
|
|
/* Input Captures are used as TIM external clock */
|
|
|
{
|
|
|
TIMx->SCR &= TIM_SME_Reset & TIM_SlaveModeSelection_Mask & TIM_TriggerSelection_Mask;
|
|
|
TIMx->SCR |= TIM_SMS_EXTCLK_Set | TIM_SME_Set;
|
|
|
|
|
|
if((TIM_ClockSource == TIM_ClockSource_TI11) ||
|
|
|
(TIM_ClockSource == TIM_ClockSource_TI21))
|
|
|
/* Input Capture 1 is selected */
|
|
|
{
|
|
|
/* Input capture Enable */
|
|
|
TIMx->IMCR |= TIM_IC1_Enable;
|
|
|
TIMx->SCR |= TIM_TS_IC1_Set;
|
|
|
|
|
|
if(TIM_ExtCLKEdge == TIM_ExtCLKEdge_Falling)
|
|
|
/* Set the corresponding polarity */
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC1P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC1P_Reset;
|
|
|
}
|
|
|
if(TIM_ClockSource == TIM_ClockSource_TI11)
|
|
|
{
|
|
|
/* External signal TI1 connected to IC1 channel */
|
|
|
TIMx->IMCR &= TIM_IC1S_Reset;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
/* External signal TI2 connected to IC1 channel */
|
|
|
TIMx->IMCR |= TIM_IC1S_Set;
|
|
|
}
|
|
|
}
|
|
|
else
|
|
|
/* Input Capture 2 is selected */
|
|
|
{
|
|
|
/* Input capture Enable */
|
|
|
TIMx->IMCR |= TIM_IC2_Enable;
|
|
|
TIMx->SCR |= TIM_TS_IC2_Set;
|
|
|
|
|
|
if(TIM_ExtCLKEdge == TIM_ExtCLKEdge_Falling)
|
|
|
/* Set the corresponding polarity */
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC2P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC2P_Reset;
|
|
|
}
|
|
|
if(TIM_ClockSource == TIM_ClockSource_TI22)
|
|
|
{
|
|
|
/* External signal TI2 connected to IC2 channel */
|
|
|
TIMx->IMCR &= TIM_IC2S_Reset;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
/* External signal TI1 connected to IC2 channel */
|
|
|
TIMx->IMCR |= TIM_IC2S_Set;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_SetPrescaler
|
|
|
* Description : Sets the TIM prescaler value.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* - Prescaler: TIM prescaler new value.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_SetPrescaler(TIM_TypeDef* TIMx, u16 Prescaler)
|
|
|
{
|
|
|
TIMx->PSC = Prescaler;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_SetPeriod
|
|
|
* Description : Sets the TIM period value.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* - Period: TIM period new value.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_SetPeriod(TIM_TypeDef* TIMx, u16 Period)
|
|
|
{
|
|
|
TIMx->ARR = Period;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_SetPulse
|
|
|
* Description : Sets the TIM pulse value.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* - TIM_Channel: specifies the TIM channel to be used.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_Channel_1: TIM Channel 1 is used
|
|
|
* - TIM_Channel_2: TIM Channel 2 is used
|
|
|
* - TIM_Channel_ALL: TIM Channel 1and 2 are used
|
|
|
* - Pulse: TIM pulse new value.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_SetPulse(TIM_TypeDef* TIMx, u16 TIM_Channel, u16 Pulse)
|
|
|
{
|
|
|
/* Set Channel 1 pulse value */
|
|
|
if(TIM_Channel == TIM_Channel_1)
|
|
|
{
|
|
|
TIMx->OCR1 = Pulse;
|
|
|
}
|
|
|
/* Set Channel 2 pulse value */
|
|
|
else if(TIM_Channel == TIM_Channel_2)
|
|
|
{
|
|
|
TIMx->OCR2 = Pulse;
|
|
|
}
|
|
|
/* Set Channel 1 and Channel 2 pulse values */
|
|
|
else if(TIM_Channel == TIM_Channel_ALL)
|
|
|
{
|
|
|
TIMx->OCR1 = Pulse;
|
|
|
TIMx->OCR2 = Pulse;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_GetICAP1
|
|
|
* Description : Gets the Input Capture 1 value.
|
|
|
* Input : TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* Output : None
|
|
|
* Return : Input Capture 1 Register value.
|
|
|
*******************************************************************************/
|
|
|
u16 TIM_GetICAP1(TIM_TypeDef *TIMx)
|
|
|
{
|
|
|
return TIMx->ICR1;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_GetICAP2
|
|
|
* Description : Gets the Input Capture 2 value.
|
|
|
* Input : TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* Output : None
|
|
|
* Return : Input Capture 2 Register value
|
|
|
*******************************************************************************/
|
|
|
u16 TIM_GetICAP2(TIM_TypeDef *TIMx)
|
|
|
{
|
|
|
return TIMx->ICR2;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_GetPWMIPulse
|
|
|
* Description : Gets the PWM Input pulse value.
|
|
|
* Input : TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* Output : None
|
|
|
* Return : Input Capture 2 Register value
|
|
|
*******************************************************************************/
|
|
|
u16 TIM_GetPWMIPulse(TIM_TypeDef *TIMx)
|
|
|
{
|
|
|
return TIMx->ICR2;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_GetPWMIPeriod
|
|
|
* Description : Gets the PWM Input period value.
|
|
|
* Input : TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* Output : None
|
|
|
* Return : Input Capture 1 Register value
|
|
|
*******************************************************************************/
|
|
|
u16 TIM_GetPWMIPeriod(TIM_TypeDef *TIMx)
|
|
|
{
|
|
|
return TIMx->ICR1;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_DebugCmd
|
|
|
* Description : Enables or disables the specified TIM peripheral Debug control.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* - Newstate: new state of the TIMx Debug control.
|
|
|
This parameter can be: ENABLE or DISABLE.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_DebugCmd(TIM_TypeDef *TIMx, FunctionalState Newstate)
|
|
|
{
|
|
|
if(Newstate == ENABLE)
|
|
|
{
|
|
|
TIMx->CR |= TIM_DBGC_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->CR &= TIM_DBGC_Reset;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_CounterModeConfig
|
|
|
* Description : Specifies the Counter Mode to be used.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
|
|
|
* - TIM_CounterMode: specifies the Counter Mode to be used
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_CounterMode_Up: TIM Up Counting Mode
|
|
|
* - TIM_CounterMode_Down: TIM Down Counting Mode
|
|
|
* - TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1
|
|
|
* - TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2
|
|
|
* - TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_CounterModeConfig(TIM_TypeDef* TIMx, u16 TIM_CounterMode)
|
|
|
{
|
|
|
/* Counter mode configuration */
|
|
|
TIMx->CR &= TIM_CounterMode_Mask;
|
|
|
TIMx->CR |= TIM_CounterMode;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_ForcedOCConfig
|
|
|
* Description : Forces the TIM output waveform to active or inactive level.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
|
|
|
* - TIM_Channel: specifies the TIM channel to be used.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_Channel_1: Timer Channel 1 is used
|
|
|
* - TIM_Channel_2: Timer Channel 2 is used
|
|
|
* - TIM_Channel_ALL: Timer Channel 1 and 2 are used
|
|
|
* - TIM_ForcedAction: specifies the forced Action to be set to
|
|
|
* the output waveform.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_ForcedAction_Active: Force active level on OCxREF
|
|
|
* - TIM_ForcedAction_InActive: Force inactive level on
|
|
|
* OCxREF.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_ForcedOCConfig(TIM_TypeDef* TIMx, u16 TIM_Channel,u16 TIM_ForcedAction)
|
|
|
{
|
|
|
/* Channel 1 Forced Output Compare mode configuration */
|
|
|
if(TIM_Channel == TIM_Channel_1)
|
|
|
{
|
|
|
TIMx->OMR1 &= TIM_OC1C_Mask;
|
|
|
TIMx->OMR1 |= TIM_ForcedAction;
|
|
|
}
|
|
|
/* Channel 2 Forced Output Compare mode configuration */
|
|
|
else
|
|
|
{
|
|
|
if(TIM_Channel == TIM_Channel_2)
|
|
|
{
|
|
|
TIMx->OMR1 &= TIM_OC2C_Mask;
|
|
|
TIMx->OMR1 |= (TIM_ForcedAction<<8);
|
|
|
}
|
|
|
/* Channel 1 and Channel 2 Forced Output Compare mode configuration */
|
|
|
else
|
|
|
{
|
|
|
TIMx->OMR1 &= TIM_OC1C_Mask & TIM_OC2C_Mask;
|
|
|
TIMx->OMR1 |= TIM_ForcedAction |(TIM_ForcedAction<<8);
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_ResetCounter
|
|
|
* Description : Re-intializes the TIM counter and generates an update of the
|
|
|
* registers.
|
|
|
* Input : TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_ResetCounter(TIM_TypeDef* TIMx)
|
|
|
{
|
|
|
/* Re-intialize the TIM counter */
|
|
|
TIMx->CR |= TIM_COUNTER_Reset;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_SynchroConfig
|
|
|
* Description : Synchronizes two Timers in a specified mode.
|
|
|
* Input : - Master: specifies the peripheral master.
|
|
|
* This parameter can be one of the following values:
|
|
|
* PWM_Master, TIM0_Master, TIM1_Master or TIM2_Master.
|
|
|
* - Slave: specifies the peripheral slave.
|
|
|
* This parameter can be one of the following values:
|
|
|
* PWM_Slave, TIM0_Slave, TIM1_Slave or TIM2_Slave.
|
|
|
* - TIM_SynchroAction: specifies the synchronization Action to
|
|
|
* be used.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_SynchroAction_Enable: The CNT_EN bit is used as TRGO
|
|
|
* - TIM_SynchroAction_Update: The Update event is used as TRGO
|
|
|
* - TIM_SynchroAction_Reset: The CNT_RST bit is used as TRGO
|
|
|
* - TIM_SynchroAction_OC: The OC1 signal is used as TRGO
|
|
|
* - TIM_SynchroMode: specifies the synchronization Mode to be used.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_SynchroMode_Gated: Both start and stop of the
|
|
|
* counter is controlled.
|
|
|
* - TIM_SynchroMode_Trigger: Only the start of the
|
|
|
* counter is controlled.
|
|
|
* - TIM_SynchroMode_External: The rising edge of selected trigger
|
|
|
* clocks the counter.
|
|
|
* - TIM_SynchroMode_Reset: The rising edge of the selected trigger
|
|
|
* signal resets the counter and generates an update of the registers.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_SynchroConfig(Master_TypeDef Master, Slave_TypeDef Slave,
|
|
|
u16 TIM_SynchroAction, u16 TIM_SynchroMode)
|
|
|
{
|
|
|
switch (Slave)
|
|
|
{
|
|
|
case PWM_Slave:
|
|
|
{
|
|
|
PWM->SCR &= TIM_SME_Reset & TIM_TriggerSelection_Mask & TIM_SlaveModeSelection_Mask &
|
|
|
TIM_InternalTriggerSelection_Mask;
|
|
|
PWM->SCR |= TIM_SynchroMode | TIM_SME_Set;
|
|
|
|
|
|
if(Master == TIM1_Master)
|
|
|
{
|
|
|
/* Set the internal trigger */
|
|
|
PWM->SCR |= TIM_ITS_TIM1;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
TIM1->CR &= TIM_MasterModeSelection_Mask;
|
|
|
TIM1->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
|
|
|
else if(Master == TIM0_Master)
|
|
|
{
|
|
|
/* Set the internal trigger */
|
|
|
PWM->SCR |= TIM_ITS_TIM0;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
TIM0->CR &= TIM_MasterModeSelection_Mask;
|
|
|
TIM0->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
|
|
|
else if(Master == TIM2_Master)
|
|
|
{
|
|
|
/* Set the internal trigger */
|
|
|
PWM->SCR |= TIM_ITS_TIM2;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
TIM2->CR &= TIM_MasterModeSelection_Mask;
|
|
|
TIM2->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case TIM0_Slave:
|
|
|
{
|
|
|
TIM0->SCR &= TIM_SME_Reset & TIM_TriggerSelection_Mask & TIM_SlaveModeSelection_Mask &
|
|
|
TIM_InternalTriggerSelection_Mask;
|
|
|
TIM0->SCR |= TIM_SynchroMode | TIM_SME_Set;
|
|
|
|
|
|
if(Master == PWM_Master)
|
|
|
{
|
|
|
/* Set the internal trigger */
|
|
|
TIM0->SCR |= TIM_ITS_PWM;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
PWM->CR &= TIM_MasterModeSelection_Mask;
|
|
|
PWM->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
|
|
|
else if(Master == TIM1_Master)
|
|
|
{
|
|
|
/* Set the internal trigger */
|
|
|
TIM0->SCR |= TIM_ITS_TIM1;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
TIM1->CR &= TIM_MasterModeSelection_Mask;
|
|
|
TIM1->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
|
|
|
else if(Master == TIM2_Master)
|
|
|
{
|
|
|
/* Set the internal trigger */
|
|
|
TIM0->SCR |= TIM_ITS_TIM2;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
TIM2->CR &= TIM_MasterModeSelection_Mask;
|
|
|
TIM2->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case TIM1_Slave:
|
|
|
{
|
|
|
|
|
|
TIM1->SCR &= TIM_SME_Reset & TIM_TriggerSelection_Mask & TIM_SlaveModeSelection_Mask &
|
|
|
TIM_InternalTriggerSelection_Mask;
|
|
|
TIM1->SCR |= TIM_SynchroMode | TIM_SME_Set;
|
|
|
|
|
|
if(Master == PWM_Master)
|
|
|
{
|
|
|
/* Set the internal trigger */
|
|
|
TIM1->SCR |= TIM_ITS_PWM;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
PWM->CR &= TIM_MasterModeSelection_Mask;
|
|
|
PWM->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
else if(Master == TIM0_Master)
|
|
|
{
|
|
|
/* Set the internal trigger */
|
|
|
TIM1->SCR |= TIM_ITS_TIM0;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
TIM0->CR &= TIM_MasterModeSelection_Mask;
|
|
|
TIM0->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
|
|
|
else if(Master == TIM2_Master)
|
|
|
{
|
|
|
/* Set the internal trigger */
|
|
|
TIM1->SCR |= TIM_ITS_TIM2;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
TIM2->CR &= TIM_MasterModeSelection_Mask;
|
|
|
TIM2->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case TIM2_Slave:
|
|
|
{
|
|
|
|
|
|
TIM2->SCR &= TIM_SME_Reset & TIM_TriggerSelection_Mask & TIM_SlaveModeSelection_Mask &
|
|
|
TIM_InternalTriggerSelection_Mask;
|
|
|
TIM2->SCR |= TIM_SynchroMode | TIM_SME_Set;
|
|
|
|
|
|
if(Master == PWM_Master)
|
|
|
{
|
|
|
/* Internal trigger selection */
|
|
|
TIM2->SCR |= TIM_ITS_PWM;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
PWM->CR &= TIM_MasterModeSelection_Mask;
|
|
|
PWM->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
|
|
|
else if(Master == TIM1_Master)
|
|
|
{
|
|
|
/* Internal trigger selection */
|
|
|
TIM2->SCR |= TIM_ITS_TIM1;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
TIM1->CR &= TIM_MasterModeSelection_Mask;
|
|
|
TIM1->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
|
|
|
else if(Master == TIM0_Master)
|
|
|
{
|
|
|
/* Internal trigger selection */
|
|
|
TIM2->SCR |= TIM_ITS_TIM0;
|
|
|
|
|
|
/* Set the synchronization action */
|
|
|
TIM0->CR &= TIM_MasterModeSelection_Mask;
|
|
|
TIM0->CR |= TIM_SynchroAction;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
default:
|
|
|
break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_GetFlagStatus
|
|
|
* Description : Checks whether the specified TIM flag is set or not.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
|
|
|
* - TIM_FLAG: specifies the flag to check.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_FLAG_IC1: Input Capture 1 Flag
|
|
|
* - TIM_FLAG_OC1: Output Compare 1 Flag
|
|
|
* - TIM_FLAG_Update: Timer update Flag
|
|
|
* - TIM_FLAG_IC2: Input Capture 2 Flag
|
|
|
* - TIM_FLAG_OC2: Output Compare 2 Flag
|
|
|
* Output : None
|
|
|
* Return : The new state of TIM_FLAG (SET or RESET).
|
|
|
*******************************************************************************/
|
|
|
FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, u16 TIM_FLAG)
|
|
|
{
|
|
|
if((TIMx->ISR & TIM_FLAG) != RESET )
|
|
|
{
|
|
|
return SET;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
return RESET;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_ClearFlag
|
|
|
* Description : Clears the TIMx's pending flags.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
|
|
|
* - TIM_FLAG: specifies the flag bit to clear.
|
|
|
* This parameter can be any combination of the following values:
|
|
|
* - TIM_FLAG_IC1: Timer Input Capture 1 flag
|
|
|
* - TIM_FLAG_OC1: Timer Output Compare 1 flag
|
|
|
* - TIM_FLAG_Update: Timer update flag
|
|
|
* - TIM_FLAG_IC2: Timer Input Capture 2 flag
|
|
|
* - TIM_FLAG_OC2: Timer Output Compare 2 flag
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_ClearFlag(TIM_TypeDef* TIMx, u16 TIM_FLAG)
|
|
|
{
|
|
|
/* Clear the flags */
|
|
|
TIMx->ISR &= ~TIM_FLAG;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_GetITStatus
|
|
|
* Description : Checks whether the specified TIM interrupt has occurred or not.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
|
|
|
* - TIM_IT: specifies the TIM interrupt source to check.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_IT_IC1: Input Capture 1 interrupt
|
|
|
* - TIM_IT_OC1: Output Compare 1 interrupt
|
|
|
* - TIM_IT_Update: Timer update interrupt
|
|
|
* - TIM_IT_GlobalUpdate: Timer global update interrupt
|
|
|
* - TIM_IT_IC2: Input Capture 2 interrupt
|
|
|
* - TIM_IT_OC2: Output Compare 2 interrupt
|
|
|
* Output : None
|
|
|
* Return : The new state of TIM_IT(SET or RESET).
|
|
|
*******************************************************************************/
|
|
|
ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, u16 TIM_IT)
|
|
|
{
|
|
|
u16 TIM_IT_Check = 0;
|
|
|
|
|
|
/* Calculates the pending bits to be checked */
|
|
|
TIM_IT_Check = TIM_IT & TIM_IT_Clear_Mask;
|
|
|
|
|
|
if((TIMx->ISR & TIM_IT_Check) != RESET )
|
|
|
{
|
|
|
return SET;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
return RESET;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : TIM_ClearITPendingBit
|
|
|
* Description : Clears the TIM's interrupt pending bits.
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral.
|
|
|
* - TIM_IT: specifies the interrupt pending bit to clear.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - TIM_IT_IC1: Input Capture 1 Interrupt
|
|
|
* - TIM_IT_OC1: Output Compare 1 Interrupt
|
|
|
* - TIM_IT_Update: Timer update Interrupt
|
|
|
* - TIM_IT_GlobalUpdate: Timer global update Interrupt
|
|
|
* - TIM_IT_IC2: Input Capture 2 Interrupt
|
|
|
* - TIM_IT_OC2: Output Compare 2 Interrupt
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, u16 TIM_IT)
|
|
|
{
|
|
|
u16 TIM_IT_Clear = 0;
|
|
|
|
|
|
/* Calculate the pending bits to be cleared */
|
|
|
TIM_IT_Clear = TIM_IT & TIM_IT_Clear_Mask;
|
|
|
|
|
|
/* Clear the pending bits */
|
|
|
TIMx->ISR &= ~TIM_IT_Clear;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : OCM_ModuleConfig
|
|
|
* Description : Output Compare Module configuration
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* - TIM_InitStruct: pointer to a TIM_InitTypeDef structure that
|
|
|
* contains the configuration information for the specified TIM
|
|
|
* peripheral.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
static void OCM_ModuleConfig(TIM_TypeDef* TIMx, TIM_InitTypeDef* TIM_InitStruct)
|
|
|
{
|
|
|
u16 TIM_OCControl = 0x0000;
|
|
|
|
|
|
if(TIM_InitStruct->TIM_Mode == TIM_Mode_OCTiming)
|
|
|
{
|
|
|
TIM_OCControl = TIM_OCControl_OCTiming;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
if((TIM_InitStruct->TIM_Mode == TIM_Mode_OCActive) ||
|
|
|
(TIM_InitStruct->TIM_Mode == TIM_Mode_OPM_Active))
|
|
|
{
|
|
|
TIM_OCControl = TIM_OCControl_OCActive;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
if(TIM_InitStruct->TIM_Mode == TIM_Mode_OCInactive)
|
|
|
{
|
|
|
TIM_OCControl = TIM_OCControl_OCInactive;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
if((TIM_InitStruct->TIM_Mode == TIM_Mode_OCToggle) ||
|
|
|
(TIM_InitStruct->TIM_Mode == TIM_Mode_OPM_Toggle))
|
|
|
{
|
|
|
TIM_OCControl = TIM_OCControl_OCToggle;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIM_OCControl = TIM_OCControl_PWM;
|
|
|
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
|
|
|
if(TIM_InitStruct->TIM_Channel == TIM_Channel_1)
|
|
|
{
|
|
|
/* Configure Channel 1 on Output Compare mode */
|
|
|
TIMx->OMR1 &= TIM_OC1C_Mask;
|
|
|
TIMx->OMR1 |= TIM_OCControl|TIM_OC1_Enable;
|
|
|
TIMx->OMR1 |= TIM_PLD1_Set;
|
|
|
TIMx->OCR1 = TIM_InitStruct->TIM_Pulse1;
|
|
|
|
|
|
/* Set the OC1 wave polarity */
|
|
|
if(TIM_InitStruct->TIM_Polarity1 == TIM_Polarity1_Low)
|
|
|
{
|
|
|
TIMx->OMR1 |= TIM_OC1P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->OMR1 &= TIM_OC1P_Reset;
|
|
|
}
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
if(TIM_InitStruct->TIM_Channel == TIM_Channel_2)
|
|
|
{
|
|
|
/* Configure Channel 2 on Output Compare mode */
|
|
|
TIMx->OMR1 &= TIM_OC2C_Mask;
|
|
|
TIMx->OMR1 |= TIM_OCControl<<8|TIM_OC2_Enable;
|
|
|
TIMx->OMR1 |= TIM_PLD2_Set;
|
|
|
TIMx->OCR2 = TIM_InitStruct->TIM_Pulse2;
|
|
|
|
|
|
/* Set the OCB wave polarity */
|
|
|
if(TIM_InitStruct->TIM_Polarity2 == TIM_Polarity2_Low)
|
|
|
{
|
|
|
TIMx->OMR1 |= TIM_OC2P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->OMR1 &= TIM_OC2P_Reset;
|
|
|
}
|
|
|
}
|
|
|
/* Configure Channel 1 and Channel 2 on Output Compare mode */
|
|
|
else
|
|
|
{
|
|
|
TIMx->OMR1 &= TIM_OC1C_Mask & TIM_OC2C_Mask;
|
|
|
TIMx->OMR1 |= TIM_OCControl|(TIM_OCControl<<8)|TIM_OC1_Enable|TIM_OC2_Enable|
|
|
|
TIM_PLD1_Set|TIM_PLD2_Set;
|
|
|
|
|
|
TIMx->OCR1 = TIM_InitStruct->TIM_Pulse1;
|
|
|
TIMx->OCR2 = TIM_InitStruct->TIM_Pulse2;
|
|
|
|
|
|
/* Set the OC1 wave polarity */
|
|
|
if(TIM_InitStruct->TIM_Polarity1 == TIM_Polarity1_Low)
|
|
|
{
|
|
|
TIMx->OMR1 |= TIM_OC1P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->OMR1 &= TIM_OC1P_Reset;
|
|
|
}
|
|
|
|
|
|
/* Set the OC2 wave polarity */
|
|
|
if(TIM_InitStruct->TIM_Polarity2 == TIM_Polarity2_Low)
|
|
|
{
|
|
|
TIMx->OMR1 |= TIM_OC2P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->OMR1 &= TIM_OC2P_Reset;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : ICAP_ModuleConfig
|
|
|
* Description : Input Capture Module configuration
|
|
|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
|
|
|
* - TIM_InitStruct: pointer to a TIM_InitTypeDef structure that
|
|
|
* contains the configuration information for the specified TIM
|
|
|
* peripheral.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
static void ICAP_ModuleConfig(TIM_TypeDef* TIMx, TIM_InitTypeDef* TIM_InitStruct)
|
|
|
{
|
|
|
if(TIM_InitStruct->TIM_Mode == TIM_Mode_PWMI)
|
|
|
{ /* PWM input mode configuration */
|
|
|
TIMx->SCR |= TIM_TS_IC1_Set|TIM_SMS_RESETCLK_Set|TIM_SME_Set;
|
|
|
|
|
|
/* Channel 1 and channel 2 input selection */
|
|
|
if(TIM_InitStruct->TIM_PWMI_ICSelection == TIM_PWMI_ICSelection_TI1)
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC1S_Reset;
|
|
|
TIMx->IMCR |= TIM_IC2S_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC1S_Set;
|
|
|
TIMx->IMCR &= TIM_IC2S_Reset;
|
|
|
}
|
|
|
|
|
|
/* Channel polarity */
|
|
|
if(TIM_InitStruct->TIM_PWMI_ICPolarity == TIM_PWMI_ICPolarity_Rising)
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC1P_Reset;
|
|
|
TIMx->IMCR |= TIM_IC2P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC1P_Set;
|
|
|
TIMx->IMCR &= TIM_IC2P_Reset;
|
|
|
}
|
|
|
|
|
|
/* Input capture Enable */
|
|
|
TIMx->IMCR |= TIM_IC1_Enable |TIM_IC2_Enable;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
if(TIM_InitStruct->TIM_Channel == TIM_Channel_1)
|
|
|
{
|
|
|
/* Input Capture 1 mode configuration */
|
|
|
TIMx->SCR &= TIM_TriggerSelection_Mask & TIM_SlaveModeSelection_Mask;
|
|
|
TIMx->SCR |= TIM_TS_IC1_Set|TIM_SMS_RESETCLK_Set|TIM_SME_Set;
|
|
|
|
|
|
/* Channel 1 input selection */
|
|
|
if(TIM_InitStruct->TIM_IC1Selection == TIM_IC1Selection_TI1)
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC1S_Reset;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC1S_Set;
|
|
|
}
|
|
|
/* Channel 1 polarity */
|
|
|
if(TIM_InitStruct->TIM_IC1Polarity == TIM_IC1Polarity_Rising)
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC1P_Reset;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC1P_Set;
|
|
|
}
|
|
|
|
|
|
/* Input capture Enable */
|
|
|
TIMx->IMCR |= TIM_IC1_Enable;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
/* Input Capture 2 mode configuration */
|
|
|
TIMx->SCR &= (TIM_TriggerSelection_Mask & TIM_SlaveModeSelection_Mask);
|
|
|
TIMx->SCR |= TIM_TS_IC2_Set|TIM_SMS_RESETCLK_Set|TIM_SME_Set;
|
|
|
|
|
|
/* Channel 2 input selection */
|
|
|
if(TIM_InitStruct->TIM_IC2Selection == TIM_IC2Selection_TI2)
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC2S_Reset;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC2S_Set;
|
|
|
}
|
|
|
|
|
|
/* Channel 2 polarity */
|
|
|
if(TIM_InitStruct->TIM_IC2Polarity == TIM_IC2Polarity_Rising)
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC2P_Reset;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC2P_Set;
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}
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|
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/* Input capture Enable */
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TIMx->IMCR |= TIM_IC2_Enable;
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}
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}
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}
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/*******************************************************************************
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* Function Name : Encoder_ModeConfig
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|
* Description : Encoder Mode configuration
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|
* Input : - TIMx: where x can be 0, 1 or 2 to select the TIM peripheral
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|
* - TIM_InitStruct: pointer to a TIM_InitTypeDef structure that
|
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|
* contains the configuration information for the specified TIM
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|
* peripheral.
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|
* Output : None
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|
* Return : None
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|
*******************************************************************************/
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|
static void Encoder_ModeConfig(TIM_TypeDef* TIMx, TIM_InitTypeDef* TIM_InitStruct)
|
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|
{
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|
/* Set Encoder mode */
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TIMx->SCR &= TIM_Encoder_Mask;
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|
|
|
|
|
if(TIM_InitStruct->TIM_Mode == TIM_Mode_Encoder1)
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|
|
{
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|
|
TIMx->SCR |= TIM_Encoder1_Set;
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|
|
}
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else if (TIM_InitStruct->TIM_Mode == TIM_Mode_Encoder2)
|
|
|
{
|
|
|
TIMx->SCR |= TIM_Encoder2_Set;
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|
|
}
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|
|
else
|
|
|
{
|
|
|
TIMx->SCR |= TIM_Encoder3_Set;
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|
|
}
|
|
|
|
|
|
/* Channel 1 input selection */
|
|
|
if(TIM_InitStruct->TIM_IC1Selection == TIM_IC1Selection_TI2)
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC1S_Set;
|
|
|
}
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|
|
else
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC1S_Reset;
|
|
|
}
|
|
|
|
|
|
/* Channel 2 input selection */
|
|
|
if(TIM_InitStruct->TIM_IC2Selection == TIM_IC2Selection_TI1)
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC2S_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC2S_Reset;
|
|
|
}
|
|
|
|
|
|
/* Channel 1 polarity */
|
|
|
if(TIM_InitStruct->TIM_IC1Polarity == TIM_IC1Polarity_Falling)
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC1P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC1P_Reset;
|
|
|
}
|
|
|
|
|
|
/* Channel 2 polarity */
|
|
|
if(TIM_InitStruct->TIM_IC2Polarity == TIM_IC2Polarity_Falling)
|
|
|
{
|
|
|
TIMx->IMCR |= TIM_IC2P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
TIMx->IMCR &= TIM_IC2P_Reset;
|
|
|
}
|
|
|
}
|
|
|
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|