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cd1f51cb5e
* Add support for the configUSE_TASK_FPU_SUPPORT in the GCC/ARM_CR5 port This is done almost identically as in the GCC/ARM_CA9 port * Adjust task stack initialitation of the GCC/ARM_CR5 port Ensure that the task stack initialization is done correctly for the different options of configUSE_TASK_FPU_SUPPORT. This is very similar to the GCC/ARM_CA9 port. The only meaningful difference is, that the FPU of the Cortex-R5 has just sixteen 64-bit floating point registers as it implements the VFPv3-D16 architecture. You may also refer to the ARM documentation * Add support for FPU safe interrupts to the GCC/ARM_CR5 port Similar to GCC/ARM_CA9 port * Clarify comment about the size of the FPU registers of Cortex R5 |
2 years ago | |
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| .. | ||
| port.c | 2 years ago | |
| portASM.S | 2 years ago | |
| portmacro.h | 2 years ago | |