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273 lines
11 KiB
C
273 lines
11 KiB
C
/*
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FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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***************************************************************************
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* *
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* FreeRTOS tutorial books are available in pdf and paperback. *
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* Complete, revised, and edited pdf reference manuals are also *
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* available. *
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* *
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* Purchasing FreeRTOS documentation will not only help you, by *
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* ensuring you get running as quickly as possible and with an *
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* in-depth knowledge of how to use FreeRTOS, it will also help *
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* the FreeRTOS project to continue with its mission of providing *
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* professional grade, cross platform, de facto standard solutions *
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* for microcontrollers - completely free of charge! *
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* *
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* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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* *
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* Thank you for using FreeRTOS, and thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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distribute a combined work that includes FreeRTOS without being obliged to
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provide the source code for proprietary components outside of the FreeRTOS
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kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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details. You should have received a copy of the GNU General Public License
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and the FreeRTOS license exception along with FreeRTOS; if not it can be
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viewed here: http://www.freertos.org/a00114.html and also obtained by
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writing to Real Time Engineers Ltd., contact details for whom are available
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on the FreeRTOS WEB site.
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?" *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, and our new
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fully thread aware and reentrant UDP/IP stack.
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems, who sell the code with commercial support,
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indemnification and middleware, under the OpenRTOS brand.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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*/
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* The critical nesting value is initialised to a non zero value to ensure
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interrupts don't accidentally become enabled before the scheduler is started. */
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#define portINITIAL_CRITICAL_NESTING (( unsigned short ) 10)
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/* Initial PSW value allocated to a newly created task.
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* 1100011000000000
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* ||||||||-------------- Fill byte
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* |||||||--------------- Carry Flag cleared
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* |||||----------------- In-service priority Flags set to low level
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* ||||------------------ Register bank Select 0 Flag cleared
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* |||------------------- Auxiliary Carry Flag cleared
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* ||-------------------- Register bank Select 1 Flag cleared
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* |--------------------- Zero Flag set
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* ---------------------- Global Interrupt Flag set (enabled)
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*/
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#define portPSW (0xc6UL)
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/* We require the address of the pxCurrentTCB variable, but don't want to know
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any details of its type. */
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typedef void tskTCB;
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extern volatile tskTCB * volatile pxCurrentTCB;
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/* Most ports implement critical sections by placing the interrupt flags on
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the stack before disabling interrupts. Exiting the critical section is then
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simply a case of popping the flags from the stack. As 78K0 IAR does not use
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a frame pointer this cannot be done as modifying the stack will clobber all
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the stack variables. Instead each task maintains a count of the critical
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section nesting depth. Each time a critical section is entered the count is
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incremented. Each time a critical section is left the count is decremented -
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with interrupts only being re-enabled if the count is zero.
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usCriticalNesting will get set to zero when the scheduler starts, but must
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not be initialised to zero as this will cause problems during the startup
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sequence. */
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volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;
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/*-----------------------------------------------------------*/
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/*
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* Sets up the periodic ISR used for the RTOS tick.
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*/
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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/*
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* Initialise the stack of a task to look exactly as if a call to
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* portSAVE_CONTEXT had been called.
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*
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* See the header file portable.h.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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unsigned long *pulLocal;
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#if configMEMORY_MODE == 1
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{
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/* Parameters are passed in on the stack, and written using a 32bit value
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hence a space is left for the second two bytes. */
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pxTopOfStack--;
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/* Write in the parameter value. */
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pulLocal = ( unsigned long * ) pxTopOfStack;
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*pulLocal = ( unsigned long ) pvParameters;
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pxTopOfStack--;
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/* These values are just spacers. The return address of the function
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would normally be written here. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;
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pxTopOfStack--;
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/* The start address / PSW value is also written in as a 32bit value,
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so leave a space for the second two bytes. */
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pxTopOfStack--;
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/* Task function start address combined with the PSW. */
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pulLocal = ( unsigned long * ) pxTopOfStack;
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*pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );
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pxTopOfStack--;
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/* An initial value for the AX register. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x1111;
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pxTopOfStack--;
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}
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#else
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{
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/* Task function address is written to the stack first. As it is
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written as a 32bit value a space is left on the stack for the second
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two bytes. */
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pxTopOfStack--;
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/* Task function start address combined with the PSW. */
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pulLocal = ( unsigned long * ) pxTopOfStack;
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*pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );
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pxTopOfStack--;
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/* The parameter is passed in AX. */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
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pxTopOfStack--;
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}
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#endif
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/* An initial value for the HL register. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x2222;
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pxTopOfStack--;
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/* CS and ES registers. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x0F00;
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pxTopOfStack--;
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/* Finally the remaining general purpose registers DE and BC */
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*pxTopOfStack = ( portSTACK_TYPE ) 0xDEDE;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xBCBC;
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pxTopOfStack--;
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/* Finally the critical section nesting count is set to zero when the task
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first starts. */
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*pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING;
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/* Return a pointer to the top of the stack we have generated so this can
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be stored in the task control block for the task. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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/* Setup the hardware to generate the tick. Interrupts are disabled when
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this function is called. */
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prvSetupTimerInterrupt();
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/* Restore the context of the first task that is going to run. */
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vPortStart();
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/* Should not get here as the tasks are now running! */
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return pdTRUE;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the 78K0R port will get stopped. If required simply
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disable the tick interrupt here. */
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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/* Setup channel 5 of the TAU to generate the tick interrupt. */
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/* First the Timer Array Unit has to be enabled. */
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TAU0EN = 1;
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/* To configure the Timer Array Unit all Channels have to first be stopped. */
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TT0 = 0xff;
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/* Interrupt of Timer Array Unit Channel 5 is disabled to set the interrupt
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priority. */
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TMMK05 = 1;
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/* Clear Timer Array Unit Channel 5 interrupt flag. */
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TMIF05 = 0;
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/* Set Timer Array Unit Channel 5 interrupt priority */
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TMPR005 = 0;
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TMPR105 = 0;
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/* Set Timer Array Unit Channel 5 Mode as interval timer. */
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TMR05 = 0x0000;
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/* Set the compare match value according to the tick rate we want. */
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TDR05 = ( portTickType ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
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/* Set Timer Array Unit Channel 5 output mode */
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TOM0 &= ~0x0020;
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/* Set Timer Array Unit Channel 5 output level */
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TOL0 &= ~0x0020;
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/* Set Timer Array Unit Channel 5 output enable */
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TOE0 &= ~0x0020;
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/* Interrupt of Timer Array Unit Channel 5 enabled */
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TMMK05 = 0;
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/* Start Timer Array Unit Channel 5.*/
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TS0 |= 0x0020;
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}
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/*-----------------------------------------------------------*/
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