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315 lines
12 KiB
C
315 lines
12 KiB
C
/*
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FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?". Have you defined configASSERT()? *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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***************************************************************************
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* *
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* Investing in training allows your team to be as productive as *
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* possible as early as possible, lowering your overall development *
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* cost, and enabling you to bring a more robust product to market *
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* earlier than would otherwise be possible. Richard Barry is both *
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* the architect and key author of FreeRTOS, and so also the world's *
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* leading authority on what is the world's most popular real time *
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* kernel for deeply embedded MCU designs. Obtaining your training *
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* from Richard ensures your team will gain directly from his in-depth *
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* product knowledge and years of usage experience. Contact Real Time *
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* Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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* by Richard Barry: http://www.FreeRTOS.org/contact
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* *
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***************************************************************************
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***************************************************************************
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* *
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* You are receiving this top quality software for free. Please play *
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* fair and reciprocate by reporting any suspected issues and *
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* participating in the community forum: *
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* http://www.FreeRTOS.org/support *
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* *
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* Thank you! *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*-----------------------------------------------------------
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the
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* given hardware and compiler.
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*
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* These settings should not be altered.
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*-----------------------------------------------------------
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint8_t
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#define portBASE_TYPE char
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typedef portSTACK_TYPE StackType_t;
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typedef signed char BaseType_t;
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typedef unsigned char UBaseType_t;
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#if( configUSE_16_BIT_TICKS == 1 )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#else
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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#endif
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portBYTE_ALIGNMENT 1
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portYIELD() __asm( "swi" );
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/*-----------------------------------------------------------*/
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/* Critical section handling. */
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#define portENABLE_INTERRUPTS() __asm( "cli" )
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#define portDISABLE_INTERRUPTS() __asm( "sei" )
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/*
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* Disable interrupts before incrementing the count of critical section nesting.
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* The nesting count is maintained so we know when interrupts should be
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* re-enabled. Once interrupts are disabled the nesting count can be accessed
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* directly. Each task maintains its own nesting count.
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*/
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#define portENTER_CRITICAL() \
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{ \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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portDISABLE_INTERRUPTS(); \
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uxCriticalNesting++; \
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}
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/*
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* Interrupts are disabled so we can access the nesting count directly. If the
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* nesting is found to be 0 (no nesting) then we are leaving the critical
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* section and interrupts can be re-enabled.
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*/
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#define portEXIT_CRITICAL() \
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{ \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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uxCriticalNesting--; \
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if( uxCriticalNesting == 0 ) \
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{ \
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portENABLE_INTERRUPTS(); \
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} \
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}
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/*-----------------------------------------------------------*/
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/* Task utilities. */
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/*
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* These macros are very simple as the processor automatically saves and
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* restores its registers as interrupts are entered and exited. In
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* addition to the (automatically stacked) registers we also stack the
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* critical nesting count. Each task maintains its own critical nesting
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* count as it is legitimate for a task to yield from within a critical
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* section. If the banked memory model is being used then the PPAGE
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* register is also stored as part of the tasks context.
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*/
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#ifdef BANKED_MODEL
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/*
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* Load the stack pointer for the task, then pull the critical nesting
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* count and PPAGE register from the stack. The remains of the
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* context are restored by the RTI instruction.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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__asm( " \n\
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.globl pxCurrentTCB ; void * \n\
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.globl uxCriticalNesting ; char \n\
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\n\
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ldx pxCurrentTCB \n\
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lds 0,x ; Stack \n\
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\n\
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movb 1,sp+,uxCriticalNesting \n\
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movb 1,sp+,0x30 ; PPAGE \n\
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" ); \
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}
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/*
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* By the time this macro is called the processor has already stacked the
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* registers. Simply stack the nesting count and PPAGE value, then save
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* the task stack pointer.
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*/
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#define portSAVE_CONTEXT() \
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{ \
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__asm( " \n\
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.globl pxCurrentTCB ; void * \n\
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.globl uxCriticalNesting ; char \n\
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\n\
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movb 0x30, 1,-sp ; PPAGE \n\
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movb uxCriticalNesting, 1,-sp \n\
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\n\
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ldx pxCurrentTCB \n\
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sts 0,x ; Stack \n\
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" ); \
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}
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#else
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/*
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* These macros are as per the BANKED versions above, but without saving
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* and restoring the PPAGE register.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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__asm( " \n\
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.globl pxCurrentTCB ; void * \n\
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.globl uxCriticalNesting ; char \n\
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\n\
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ldx pxCurrentTCB \n\
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lds 0,x ; Stack \n\
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\n\
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movb 1,sp+,uxCriticalNesting \n\
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" ); \
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}
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#define portSAVE_CONTEXT() \
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{ \
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__asm( " \n\
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.globl pxCurrentTCB ; void * \n\
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.globl uxCriticalNesting ; char \n\
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\n\
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movb uxCriticalNesting, 1,-sp \n\
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\n\
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ldx pxCurrentTCB \n\
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sts 0,x ; Stack \n\
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" ); \
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}
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#endif
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/*
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* Utility macros to save/restore correct software registers for GCC. This is
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* useful when GCC does not generate appropriate ISR head/tail code.
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*/
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#define portISR_HEAD() \
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{ \
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__asm(" \n\
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movw _.frame, 2,-sp \n\
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movw _.tmp, 2,-sp \n\
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movw _.z, 2,-sp \n\
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movw _.xy, 2,-sp \n\
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;movw _.d2, 2,-sp \n\
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;movw _.d1, 2,-sp \n\
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"); \
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}
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#define portISR_TAIL() \
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{ \
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__asm(" \n\
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movw 2,sp+, _.xy \n\
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movw 2,sp+, _.z \n\
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movw 2,sp+, _.tmp \n\
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movw 2,sp+, _.frame \n\
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;movw 2,sp+, _.d1 \n\
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;movw 2,sp+, _.d2 \n\
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rti \n\
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"); \
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}
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/*
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* Utility macro to call macros above in correct order in order to perform a
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* task switch from within a standard ISR. This macro can only be used if
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* the ISR does not use any local (stack) variables. If the ISR uses stack
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* variables portYIELD() should be used in it's place.
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*/
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#define portTASK_SWITCH_FROM_ISR() \
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portSAVE_CONTEXT(); \
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vTaskSwitchContext(); \
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portRESTORE_CONTEXT();
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/* Task function macros as described on the FreeRTOS.org WEB site. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#ifdef __cplusplus
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}
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#endif
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#endif /* PORTMACRO_H */
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