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FreeRTOS-Kernel/Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/resetprg.c

143 lines
4.3 KiB
C

/***********************************************************************/
/* */
/* FILE :resetprg.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Reset Program */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : resetprg.c
*
* Abstract : Reset Program.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
/* Types used in this file. */
#include "typedefine.h"
/* Defines machine level functions used in this file */
#include <machine.h>
/* Defines MCU configuration functions used in this file */
#include <_h_c_lib.h>
/* Hardware definitions" */
#include "iodefine.h"
/* Defines the size of the stack which configured in this file */
#include "stacksct.h"
#define PSW_init 0x00010000
#define FPSW_init 0x00000100
extern void HardwareSetup( void );
#pragma section ResetPRG
#pragma entry PowerON_Reset_PC
/* It is ok to use stack variables here because "#pragma entry" is used, so the
stack is setup in the compiler generated prologue. */
void PowerON_Reset_PC(void)
{
volatile unsigned int i;
set_intb(__sectop("C$VECT"));
set_fpsw(FPSW_init);
/* MCU boots using the LOCO, so turn the speed up before setting up the C
run-time environment.
Clock Description Frequency
----------------------------------------
Input Clock Frequency............ 12 MHz
PLL frequency (x16).............. 192 MHz
Internal Clock Frequency......... 96 MHz
Peripheral Clock Frequency....... 48 MHz
USB Clock Frequency.............. 48 MHz
External Bus Clock Frequency..... 24 MHz */
/* Protect off. */
SYSTEM.PRCR.WORD = 0xA50B;
/* Uncomment if not using sub-clock */
//SYSTEM.SOSCCR.BYTE = 0x01; /* stop sub-clock */
SYSTEM.SOSCCR.BYTE = 0x00; /* Enable sub-clock for RTC */
/* Wait 131,072 cycles * 12 MHz = 10.9 ms */
SYSTEM.MOSCWTCR.BYTE = 0x0D;
/* PLL wait is 4,194,304 cycles (default) * 192 MHz (12 MHz * 16) = 20.1 ms*/
SYSTEM.PLLWTCR.BYTE = 0x04;
/* x16 @PLL */
SYSTEM.PLLCR.WORD = 0x0F00;
/* EXTAL ON */
SYSTEM.MOSCCR.BYTE = 0x00;
/* PLL ON */
SYSTEM.PLLCR2.BYTE = 0x00;
for(i = 0;i< 0x168;i++)
{
/* Wait over 12ms */
nop() ;
}
/* Setup system clocks
SCKCR - System Clock Control Register
b31:b28 FCK[3:0] 0x02 = Flash clock: PLL/4 = (192 / 4) = 48 MHz
b27:b24 ICK[3:0] 0x01 = System clock: PLL/2 = (192 / 2) = 96 MHz
b23 PSTOP1 0x00 = BCLK pin output is enabled
b19:b16 BCK[3:0] 0x03 = BCLK: PLL/8 = 24 MHz
b11:b8 PCKB[3:0] 0x02 = Peripheral clock B: PLL/4 = 48 MHz
*/
SYSTEM.SCKCR.LONG = 0x21031222; /* ICK=PLL/2,BCK,FCK,PCK=PLL/4 */
/* Setup IEBUS and USB clocks
SCKCR2 - System Clock Control Register 2
b7:b4 UCK[3:0] 0x03 = USB clock is PLL/4 = 48 MHz
b3:b0 IEBCK[3:0] 0x01 = IE Bus clock is PLL/2 = 96 MHz
*/
SYSTEM.SCKCR2.WORD = 0x0031;
/* ICLK, PCLKB, FCLK, BCLK, IECLK, and USBCLK all come from PLL circuit */
SYSTEM.SCKCR3.WORD = 0x0400;
/* Protect on. */
SYSTEM.PRCR.WORD = 0xA500;
/* Initialize C runtime environment */
_INITSCT();
/* Setup the hardware for the RSK. */
HardwareSetup();
nop();
/* Set Ubit and Ibit for PSW. */
set_psw(PSW_init);
/* Call the application code. */
main();
/* Main should not return. */
brk();
}