83083a8a13
The Cortex-A53 ports are generic and can be used as a starting point for other Armv8-A application processors. Therefore, rename `ARM_CA53_64_BIT` to `Arm_AARCH64` and `ARM_CA53_64_BIT_SRE` to `Arm_AARCH64_SRE`. With this renaming, existing projects that use old port, should migrate to renamed port as follows: * `ARM_CA53_64_BIT` -> `Arm_AARCH64` * `ARM_CA53_64_BIT_SRE` -> `Arm_AARCH64_SRE` Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> |
1 year ago | |
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| .. | ||
| README.md | 1 year ago | |
| port.c | 1 year ago | |
| portASM.S | 1 year ago | |
| portmacro.h | 1 year ago | |
README.md
Armv8-A architecture support
The Armv8-A architecture introduces the ability to use 64-bit and 32-bit Execution states, known as AArch64 and AArch32 respectively. The AArch64 Execution state supports the A64 instruction set. It holds addresses in 64-bit registers and allows instructions in the base instruction set to use 64-bit registers for their processing.
The AArch32 Execution state is a 32-bit Execution state that preserves backwards compatibility with the Armv7-A architecture, enhancing that profile so that it can support some features included in the AArch64 state. It supports the T32 and A32 instruction sets. Follow the link for more information.
Arm_AARCH64 port
This port adds support for Armv8-A architecture AArch64 execution state. This port is generic and can be used as a starting point for Armv8-A application processors.
- Arm_AARCH64
- Memory mapped interace to access Arm GIC registers