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1397 lines
67 KiB
C
1397 lines
67 KiB
C
/** ---------------------------------------------------------------------------- */
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/** ATMEL Microcontroller Software Support - ROUSSET - */
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/** ---------------------------------------------------------------------------- */
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/** DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
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/** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
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/** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
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/** DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
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/** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
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/** LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
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/** OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
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/** LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
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/** NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
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/** EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/** ---------------------------------------------------------------------------- */
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/** File Name : lib_AT91SAM7X256.h */
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/** Object : AT91SAM7X256 inlined functions */
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/** Generated : AT91 SW Application Group 05/20/2005 (16:22:29) */
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/** */
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/** CVS Reference : /lib_dbgu.h/1.1/Fri Jan 31 12:18:40 2003// */
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/** CVS Reference : /lib_pmc_SAM7X.h/1.1/Tue Feb 1 08:32:10 2005// */
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/** CVS Reference : /lib_VREG_6085B.h/1.1/Tue Feb 1 16:20:47 2005// */
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/** CVS Reference : /lib_rstc_6098A.h/1.1/Wed Oct 6 10:39:20 2004// */
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/** CVS Reference : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003// */
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/** CVS Reference : /lib_wdtc_6080A.h/1.1/Wed Oct 6 10:38:30 2004// */
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/** CVS Reference : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002// */
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/** CVS Reference : /lib_spi2.h/1.1/Mon Aug 25 14:23:52 2003// */
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/** CVS Reference : /lib_pitc_6079A.h/1.2/Tue Nov 9 14:43:56 2004// */
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/** CVS Reference : /lib_aic_6075b.h/1.1/Fri May 20 14:01:19 2005// */
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/** CVS Reference : /lib_aes_6149a.h/1.1/Mon Jan 17 07:43:09 2005// */
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/** CVS Reference : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004// */
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/** CVS Reference : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003// */
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/** CVS Reference : /lib_rttc_6081A.h/1.1/Wed Oct 6 10:39:38 2004// */
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/** CVS Reference : /lib_udp.h/1.4/Wed Feb 16 08:39:34 2005// */
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/** CVS Reference : /lib_des3_6150a.h/1.1/Mon Jan 17 09:19:19 2005// */
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/** CVS Reference : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003// */
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/** CVS Reference : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004// */
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/** CVS Reference : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003// */
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/** CVS Reference : /lib_can_AT91.h/1.4/Fri Oct 17 09:12:50 2003// */
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/** CVS Reference : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004// */
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/** CVS Reference : /lib_pdc.h/1.2/Tue Jul 2 13:29:40 2002// */
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/** ---------------------------------------------------------------------------- */
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#ifndef lib_AT91SAM7X256_H
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#define lib_AT91SAM7X256_H
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/* *****************************************************************************
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* SOFTWARE API FOR AIC
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***************************************************************************** */
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#define AT91C_AIC_BRANCH_OPCODE ( ( void ( * )() ) 0xE51FFF20 ) /* ldr, pc, [pc, #-&F20] */
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_AIC_ConfigureIt */
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/** \brief Interrupt Handler Initialization */
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/**---------------------------------------------------------------------------- */
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__inline unsigned int AT91F_AIC_ConfigureIt( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */
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unsigned int irq_id, /* \arg interrupt number to initialize */
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unsigned int priority, /* \arg priority to give to the interrupt */
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unsigned int src_type, /* \arg activation and sense of activation */
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void ( * newHandler )( void ) ) /* \arg address of the interrupt handler */
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{
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unsigned int oldHandler;
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unsigned int mask;
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oldHandler = pAic->AIC_SVR[ irq_id ];
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mask = 0x1 << irq_id;
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/** Disable the interrupt on the interrupt controller */
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pAic->AIC_IDCR = mask;
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/** Save the interrupt handler routine pointer and the interrupt priority */
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pAic->AIC_SVR[ irq_id ] = ( unsigned int ) newHandler;
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/** Store the Source Mode Register */
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pAic->AIC_SMR[ irq_id ] = src_type | priority;
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/** Clear the interrupt on the interrupt controller */
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pAic->AIC_ICCR = mask;
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return oldHandler;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_AIC_EnableIt */
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/** \brief Enable corresponding IT number */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_AIC_EnableIt( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */
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unsigned int irq_id ) /* \arg interrupt number to initialize */
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{
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/** Enable the interrupt on the interrupt controller */
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pAic->AIC_IECR = 0x1 << irq_id;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_AIC_DisableIt */
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/** \brief Disable corresponding IT number */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_AIC_DisableIt( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */
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unsigned int irq_id ) /* \arg interrupt number to initialize */
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{
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unsigned int mask = 0x1 << irq_id;
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/** Disable the interrupt on the interrupt controller */
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pAic->AIC_IDCR = mask;
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/** Clear the interrupt on the Interrupt Controller ( if one is pending ) */
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pAic->AIC_ICCR = mask;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_AIC_ClearIt */
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/** \brief Clear corresponding IT number */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_AIC_ClearIt( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */
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unsigned int irq_id ) /* \arg interrupt number to initialize */
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{
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/** Clear the interrupt on the Interrupt Controller ( if one is pending ) */
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pAic->AIC_ICCR = ( 0x1 << irq_id );
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_AIC_AcknowledgeIt */
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/** \brief Acknowledge corresponding IT number */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_AIC_AcknowledgeIt( AT91PS_AIC pAic ) /* \arg pointer to the AIC registers */
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{
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pAic->AIC_EOICR = pAic->AIC_EOICR;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_AIC_SetExceptionVector */
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/** \brief Configure vector handler */
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/**---------------------------------------------------------------------------- */
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__inline unsigned int AT91F_AIC_SetExceptionVector( unsigned int * pVector, /* \arg pointer to the AIC registers */
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void ( * Handler )() ) /* \arg Interrupt Handler */
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{
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unsigned int oldVector = *pVector;
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if( ( unsigned int ) Handler == ( unsigned int ) AT91C_AIC_BRANCH_OPCODE )
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{
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*pVector = ( unsigned int ) AT91C_AIC_BRANCH_OPCODE;
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}
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else
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{
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*pVector = ( ( ( ( ( unsigned int ) Handler ) - ( ( unsigned int ) pVector ) - 0x8 ) >> 2 ) & 0x00FFFFFF ) | 0xEA000000;
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}
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return oldVector;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_AIC_Trig */
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/** \brief Trig an IT */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_AIC_Trig( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */
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unsigned int irq_id ) /* \arg interrupt number */
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{
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pAic->AIC_ISCR = ( 0x1 << irq_id );
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_AIC_IsActive */
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/** \brief Test if an IT is active */
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/**---------------------------------------------------------------------------- */
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__inline unsigned int AT91F_AIC_IsActive( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */
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unsigned int irq_id ) /* \arg Interrupt Number */
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{
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return( pAic->AIC_ISR & ( 0x1 << irq_id ) );
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_AIC_IsPending */
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/** \brief Test if an IT is pending */
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/**---------------------------------------------------------------------------- */
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__inline unsigned int AT91F_AIC_IsPending( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */
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unsigned int irq_id ) /* \arg Interrupt Number */
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{
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return( pAic->AIC_IPR & ( 0x1 << irq_id ) );
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_AIC_Open */
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/** \brief Set exception vectors and AIC registers to default values */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_AIC_Open( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */
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void ( * IrqHandler )(), /* \arg Default IRQ vector exception */
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void ( * FiqHandler )(), /* \arg Default FIQ vector exception */
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void ( * DefaultHandler )(), /* \arg Default Handler set in ISR */
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void ( * SpuriousHandler )(), /* \arg Default Spurious Handler */
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unsigned int protectMode ) /* \arg Debug Control Register */
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{
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int i;
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/* Disable all interrupts and set IVR to the default handler */
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for( i = 0; i < 32; ++i )
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{
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AT91F_AIC_DisableIt( pAic, i );
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AT91F_AIC_ConfigureIt( pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, DefaultHandler );
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}
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/* Set the IRQ exception vector */
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AT91F_AIC_SetExceptionVector( ( unsigned int * ) 0x18, IrqHandler );
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/* Set the Fast Interrupt exception vector */
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AT91F_AIC_SetExceptionVector( ( unsigned int * ) 0x1C, FiqHandler );
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pAic->AIC_SPU = ( unsigned int ) SpuriousHandler;
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pAic->AIC_DCR = protectMode;
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}
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/* *****************************************************************************
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* SOFTWARE API FOR PDC
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***************************************************************************** */
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_SetNextRx */
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/** \brief Set the next receive transfer descriptor */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_PDC_SetNextRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */
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char * address, /* \arg address to the next bloc to be received */
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unsigned int bytes ) /* \arg number of bytes to be received */
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{
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pPDC->PDC_RNPR = ( unsigned int ) address;
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pPDC->PDC_RNCR = bytes;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_SetNextTx */
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/** \brief Set the next transmit transfer descriptor */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_PDC_SetNextTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */
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char * address, /* \arg address to the next bloc to be transmitted */
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unsigned int bytes ) /* \arg number of bytes to be transmitted */
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{
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pPDC->PDC_TNPR = ( unsigned int ) address;
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pPDC->PDC_TNCR = bytes;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_SetRx */
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/** \brief Set the receive transfer descriptor */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_PDC_SetRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */
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char * address, /* \arg address to the next bloc to be received */
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unsigned int bytes ) /* \arg number of bytes to be received */
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{
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pPDC->PDC_RPR = ( unsigned int ) address;
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pPDC->PDC_RCR = bytes;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_SetTx */
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/** \brief Set the transmit transfer descriptor */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_PDC_SetTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */
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char * address, /* \arg address to the next bloc to be transmitted */
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unsigned int bytes ) /* \arg number of bytes to be transmitted */
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{
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pPDC->PDC_TPR = ( unsigned int ) address;
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pPDC->PDC_TCR = bytes;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_EnableTx */
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/** \brief Enable transmit */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_PDC_EnableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */
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{
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pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_EnableRx */
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/** \brief Enable receive */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_PDC_EnableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */
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{
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pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_DisableTx */
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/** \brief Disable transmit */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_PDC_DisableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */
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{
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pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_DisableRx */
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/** \brief Disable receive */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_PDC_DisableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */
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{
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pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_IsTxEmpty */
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/** \brief Test if the current transfer descriptor has been sent */
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/**---------------------------------------------------------------------------- */
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__inline int AT91F_PDC_IsTxEmpty( /* \return return 1 if transfer is complete */
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AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */
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{
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return !( pPDC->PDC_TCR );
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_IsNextTxEmpty */
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/** \brief Test if the next transfer descriptor has been moved to the current td */
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/**---------------------------------------------------------------------------- */
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__inline int AT91F_PDC_IsNextTxEmpty( /* \return return 1 if transfer is complete */
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AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */
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{
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return !( pPDC->PDC_TNCR );
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_IsRxEmpty */
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/** \brief Test if the current transfer descriptor has been filled */
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/**---------------------------------------------------------------------------- */
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__inline int AT91F_PDC_IsRxEmpty( /* \return return 1 if transfer is complete */
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AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */
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{
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return !( pPDC->PDC_RCR );
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_IsNextRxEmpty */
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/** \brief Test if the next transfer descriptor has been moved to the current td */
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/**---------------------------------------------------------------------------- */
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__inline int AT91F_PDC_IsNextRxEmpty( /* \return return 1 if transfer is complete */
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AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */
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{
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return !( pPDC->PDC_RNCR );
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_Open */
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/** \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_PDC_Open( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */
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{
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/** Disable the RX and TX PDC transfer requests */
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AT91F_PDC_DisableRx( pPDC );
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AT91F_PDC_DisableTx( pPDC );
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/** Reset all Counter register Next buffer first */
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AT91F_PDC_SetNextTx( pPDC, ( char * ) 0, 0 );
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AT91F_PDC_SetNextRx( pPDC, ( char * ) 0, 0 );
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AT91F_PDC_SetTx( pPDC, ( char * ) 0, 0 );
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AT91F_PDC_SetRx( pPDC, ( char * ) 0, 0 );
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/** Enable the RX and TX PDC transfer requests */
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AT91F_PDC_EnableRx( pPDC );
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AT91F_PDC_EnableTx( pPDC );
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_Close */
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/** \brief Close PDC: disable TX and RX reset transfer descriptors */
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/**---------------------------------------------------------------------------- */
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__inline void AT91F_PDC_Close( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */
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{
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/** Disable the RX and TX PDC transfer requests */
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AT91F_PDC_DisableRx( pPDC );
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AT91F_PDC_DisableTx( pPDC );
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/** Reset all Counter register Next buffer first */
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AT91F_PDC_SetNextTx( pPDC, ( char * ) 0, 0 );
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AT91F_PDC_SetNextRx( pPDC, ( char * ) 0, 0 );
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AT91F_PDC_SetTx( pPDC, ( char * ) 0, 0 );
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AT91F_PDC_SetRx( pPDC, ( char * ) 0, 0 );
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_SendFrame */
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/** \brief Close PDC: disable TX and RX reset transfer descriptors */
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/**---------------------------------------------------------------------------- */
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__inline unsigned int AT91F_PDC_SendFrame( AT91PS_PDC pPDC,
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char * pBuffer,
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unsigned int szBuffer,
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char * pNextBuffer,
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unsigned int szNextBuffer )
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{
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if( AT91F_PDC_IsTxEmpty( pPDC ) )
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{
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/** Buffer and next buffer can be initialized */
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AT91F_PDC_SetTx( pPDC, pBuffer, szBuffer );
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AT91F_PDC_SetNextTx( pPDC, pNextBuffer, szNextBuffer );
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return 2;
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}
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else if( AT91F_PDC_IsNextTxEmpty( pPDC ) )
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{
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/** Only one buffer can be initialized */
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AT91F_PDC_SetNextTx( pPDC, pBuffer, szBuffer );
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return 1;
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}
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else
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{
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/** All buffer are in use... */
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return 0;
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}
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}
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/**---------------------------------------------------------------------------- */
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/** \fn AT91F_PDC_ReceiveFrame */
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/** \brief Close PDC: disable TX and RX reset transfer descriptors */
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/**---------------------------------------------------------------------------- */
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__inline unsigned int AT91F_PDC_ReceiveFrame( AT91PS_PDC pPDC,
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char * pBuffer,
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unsigned int szBuffer,
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char * pNextBuffer,
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unsigned int szNextBuffer )
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{
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if( AT91F_PDC_IsRxEmpty( pPDC ) )
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{
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/** Buffer and next buffer can be initialized */
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AT91F_PDC_SetRx( pPDC, pBuffer, szBuffer );
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AT91F_PDC_SetNextRx( pPDC, pNextBuffer, szNextBuffer );
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return 2;
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}
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else if( AT91F_PDC_IsNextRxEmpty( pPDC ) )
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{
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/** Only one buffer can be initialized */
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AT91F_PDC_SetNextRx( pPDC, pBuffer, szBuffer );
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return 1;
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}
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else
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{
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/** All buffer are in use... */
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return 0;
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}
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}
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/* *****************************************************************************
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* SOFTWARE API FOR DBGU
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***************************************************************************** */
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/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_DBGU_InterruptEnable */
|
|
/** \brief Enable DBGU Interrupt */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_DBGU_InterruptEnable( AT91PS_DBGU pDbgu, /* \arg pointer to a DBGU controller */
|
|
unsigned int flag ) /* \arg dbgu interrupt to be enabled */
|
|
{
|
|
pDbgu->DBGU_IER = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_DBGU_InterruptDisable */
|
|
/** \brief Disable DBGU Interrupt */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_DBGU_InterruptDisable( AT91PS_DBGU pDbgu, /* \arg pointer to a DBGU controller */
|
|
unsigned int flag ) /* \arg dbgu interrupt to be disabled */
|
|
{
|
|
pDbgu->DBGU_IDR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_DBGU_GetInterruptMaskStatus */
|
|
/** \brief Return DBGU Interrupt Mask Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_DBGU_GetInterruptMaskStatus( /* \return DBGU Interrupt Mask Status */
|
|
AT91PS_DBGU pDbgu ) /* \arg pointer to a DBGU controller */
|
|
{
|
|
return pDbgu->DBGU_IMR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_DBGU_IsInterruptMasked */
|
|
/** \brief Test if DBGU Interrupt is Masked */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_DBGU_IsInterruptMasked( AT91PS_DBGU pDbgu, /* \arg pointer to a DBGU controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_DBGU_GetInterruptMaskStatus( pDbgu ) & flag );
|
|
}
|
|
|
|
/* *****************************************************************************
|
|
* SOFTWARE API FOR PIO
|
|
***************************************************************************** */
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_CfgPeriph */
|
|
/** \brief Enable pins to be derived by peripheral */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_CfgPeriph( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int periphAEnable, /* \arg PERIPH A to enable */
|
|
unsigned int periphBEnable ) /* \arg PERIPH B to enable */
|
|
|
|
{
|
|
pPio->PIO_ASR = periphAEnable;
|
|
pPio->PIO_BSR = periphBEnable;
|
|
pPio->PIO_PDR = ( periphAEnable | periphBEnable ); /* Set in Periph mode */
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_CfgOutput */
|
|
/** \brief Enable PIO in output mode */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_CfgOutput( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int pioEnable ) /* \arg PIO to be enabled */
|
|
{
|
|
pPio->PIO_PER = pioEnable; /* Set in PIO mode */
|
|
pPio->PIO_OER = pioEnable; /* Configure in Output */
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_CfgInput */
|
|
/** \brief Enable PIO in input mode */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_CfgInput( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int inputEnable ) /* \arg PIO to be enabled */
|
|
{
|
|
/* Disable output */
|
|
pPio->PIO_ODR = inputEnable;
|
|
pPio->PIO_PER = inputEnable;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_CfgOpendrain */
|
|
/** \brief Configure PIO in open drain */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_CfgOpendrain( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int multiDrvEnable ) /* \arg pio to be configured in open drain */
|
|
{
|
|
/* Configure the multi-drive option */
|
|
pPio->PIO_MDDR = ~multiDrvEnable;
|
|
pPio->PIO_MDER = multiDrvEnable;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_CfgPullup */
|
|
/** \brief Enable pullup on PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_CfgPullup( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int pullupEnable ) /* \arg enable pullup on PIO */
|
|
{
|
|
/* Connect or not Pullup */
|
|
pPio->PIO_PPUDR = ~pullupEnable;
|
|
pPio->PIO_PPUER = pullupEnable;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_CfgDirectDrive */
|
|
/** \brief Enable direct drive on PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_CfgDirectDrive( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int directDrive ) /* \arg PIO to be configured with direct drive */
|
|
|
|
{
|
|
/* Configure the Direct Drive */
|
|
pPio->PIO_OWDR = ~directDrive;
|
|
pPio->PIO_OWER = directDrive;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_CfgInputFilter */
|
|
/** \brief Enable input filter on input PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_CfgInputFilter( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int inputFilter ) /* \arg PIO to be configured with input filter */
|
|
|
|
{
|
|
/* Configure the Direct Drive */
|
|
pPio->PIO_IFDR = ~inputFilter;
|
|
pPio->PIO_IFER = inputFilter;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_GetInput */
|
|
/** \brief Return PIO input value */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_GetInput( /* \return PIO input */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_PDSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsInputSet */
|
|
/** \brief Test if PIO is input flag is active */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsInputSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PIO_GetInput( pPio ) & flag );
|
|
}
|
|
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_SetOutput */
|
|
/** \brief Set to 1 output PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_SetOutput( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg output to be set */
|
|
{
|
|
pPio->PIO_SODR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_ClearOutput */
|
|
/** \brief Set to 0 output PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_ClearOutput( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg output to be cleared */
|
|
{
|
|
pPio->PIO_CODR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_ForceOutput */
|
|
/** \brief Force output when Direct drive option is enabled */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_ForceOutput( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg output to be forced */
|
|
{
|
|
pPio->PIO_ODSR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_Enable */
|
|
/** \brief Enable PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_Enable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio to be enabled */
|
|
{
|
|
pPio->PIO_PER = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_Disable */
|
|
/** \brief Disable PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_Disable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio to be disabled */
|
|
{
|
|
pPio->PIO_PDR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_GetStatus */
|
|
/** \brief Return PIO Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_GetStatus( /* \return PIO Status */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_PSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsSet */
|
|
/** \brief Test if PIO is Set */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PIO_GetStatus( pPio ) & flag );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_OutputEnable */
|
|
/** \brief Output Enable PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_OutputEnable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio output to be enabled */
|
|
{
|
|
pPio->PIO_OER = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_OutputDisable */
|
|
/** \brief Output Enable PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_OutputDisable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio output to be disabled */
|
|
{
|
|
pPio->PIO_ODR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_GetOutputStatus */
|
|
/** \brief Return PIO Output Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_GetOutputStatus( /* \return PIO Output Status */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_OSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsOuputSet */
|
|
/** \brief Test if PIO Output is Set */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsOutputSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PIO_GetOutputStatus( pPio ) & flag );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_InputFilterEnable */
|
|
/** \brief Input Filter Enable PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_InputFilterEnable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio input filter to be enabled */
|
|
{
|
|
pPio->PIO_IFER = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_InputFilterDisable */
|
|
/** \brief Input Filter Disable PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_InputFilterDisable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio input filter to be disabled */
|
|
{
|
|
pPio->PIO_IFDR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_GetInputFilterStatus */
|
|
/** \brief Return PIO Input Filter Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_GetInputFilterStatus( /* \return PIO Input Filter Status */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_IFSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsInputFilterSet */
|
|
/** \brief Test if PIO Input filter is Set */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsInputFilterSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PIO_GetInputFilterStatus( pPio ) & flag );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_GetOutputDataStatus */
|
|
/** \brief Return PIO Output Data Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_GetOutputDataStatus( /* \return PIO Output Data Status */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_ODSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_InterruptEnable */
|
|
/** \brief Enable PIO Interrupt */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_InterruptEnable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio interrupt to be enabled */
|
|
{
|
|
pPio->PIO_IER = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_InterruptDisable */
|
|
/** \brief Disable PIO Interrupt */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_InterruptDisable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio interrupt to be disabled */
|
|
{
|
|
pPio->PIO_IDR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_GetInterruptMaskStatus */
|
|
/** \brief Return PIO Interrupt Mask Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_GetInterruptMaskStatus( /* \return PIO Interrupt Mask Status */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_IMR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_GetInterruptStatus */
|
|
/** \brief Return PIO Interrupt Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_GetInterruptStatus( /* \return PIO Interrupt Status */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_ISR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsInterruptMasked */
|
|
/** \brief Test if PIO Interrupt is Masked */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsInterruptMasked( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PIO_GetInterruptMaskStatus( pPio ) & flag );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsInterruptSet */
|
|
/** \brief Test if PIO Interrupt is Set */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsInterruptSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PIO_GetInterruptStatus( pPio ) & flag );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_MultiDriverEnable */
|
|
/** \brief Multi Driver Enable PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_MultiDriverEnable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio to be enabled */
|
|
{
|
|
pPio->PIO_MDER = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_MultiDriverDisable */
|
|
/** \brief Multi Driver Disable PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_MultiDriverDisable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio to be disabled */
|
|
{
|
|
pPio->PIO_MDDR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_GetMultiDriverStatus */
|
|
/** \brief Return PIO Multi Driver Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_GetMultiDriverStatus( /* \return PIO Multi Driver Status */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_MDSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsMultiDriverSet */
|
|
/** \brief Test if PIO MultiDriver is Set */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsMultiDriverSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PIO_GetMultiDriverStatus( pPio ) & flag );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_A_RegisterSelection */
|
|
/** \brief PIO A Register Selection */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_A_RegisterSelection( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio A register selection */
|
|
{
|
|
pPio->PIO_ASR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_B_RegisterSelection */
|
|
/** \brief PIO B Register Selection */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_B_RegisterSelection( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio B register selection */
|
|
{
|
|
pPio->PIO_BSR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_Get_AB_RegisterStatus */
|
|
/** \brief Return PIO Interrupt Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_Get_AB_RegisterStatus( /* \return PIO AB Register Status */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_ABSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsAB_RegisterSet */
|
|
/** \brief Test if PIO AB Register is Set */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsAB_RegisterSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PIO_Get_AB_RegisterStatus( pPio ) & flag );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_OutputWriteEnable */
|
|
/** \brief Output Write Enable PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_OutputWriteEnable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio output write to be enabled */
|
|
{
|
|
pPio->PIO_OWER = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_OutputWriteDisable */
|
|
/** \brief Output Write Disable PIO */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PIO_OutputWriteDisable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg pio output write to be disabled */
|
|
{
|
|
pPio->PIO_OWDR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_GetOutputWriteStatus */
|
|
/** \brief Return PIO Output Write Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_GetOutputWriteStatus( /* \return PIO Output Write Status */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_OWSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsOutputWriteSet */
|
|
/** \brief Test if PIO OutputWrite is Set */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsOutputWriteSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PIO_GetOutputWriteStatus( pPio ) & flag );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_GetCfgPullup */
|
|
/** \brief Return PIO Configuration Pullup */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PIO_GetCfgPullup( /* \return PIO Configuration Pullup */
|
|
AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */
|
|
{
|
|
return pPio->PIO_PPUSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsOutputDataStatusSet */
|
|
/** \brief Test if PIO Output Data Status is Set */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsOutputDataStatusSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PIO_GetOutputDataStatus( pPio ) & flag );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PIO_IsCfgPullupStatusSet */
|
|
/** \brief Test if PIO Configuration Pullup Status is Set */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline int AT91F_PIO_IsCfgPullupStatusSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( ~AT91F_PIO_GetCfgPullup( pPio ) & flag );
|
|
}
|
|
|
|
/* *****************************************************************************
|
|
* SOFTWARE API FOR PMC
|
|
***************************************************************************** */
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_CfgSysClkEnableReg */
|
|
/** \brief Configure the System Clock Enable Register of the PMC controller */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PMC_CfgSysClkEnableReg( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */
|
|
unsigned int mode )
|
|
{
|
|
/** Write to the SCER register */
|
|
pPMC->PMC_SCER = mode;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_CfgSysClkDisableReg */
|
|
/** \brief Configure the System Clock Disable Register of the PMC controller */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PMC_CfgSysClkDisableReg( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */
|
|
unsigned int mode )
|
|
{
|
|
/** Write to the SCDR register */
|
|
pPMC->PMC_SCDR = mode;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_GetSysClkStatusReg */
|
|
/** \brief Return the System Clock Status Register of the PMC controller */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PMC_GetSysClkStatusReg( AT91PS_PMC pPMC /* pointer to a CAN controller */
|
|
)
|
|
{
|
|
return pPMC->PMC_SCSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_EnablePeriphClock */
|
|
/** \brief Enable peripheral clock */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PMC_EnablePeriphClock( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */
|
|
unsigned int periphIds ) /* \arg IDs of peripherals to enable */
|
|
{
|
|
pPMC->PMC_PCER = periphIds;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_DisablePeriphClock */
|
|
/** \brief Disable peripheral clock */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PMC_DisablePeriphClock( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */
|
|
unsigned int periphIds ) /* \arg IDs of peripherals to enable */
|
|
{
|
|
pPMC->PMC_PCDR = periphIds;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_GetPeriphClock */
|
|
/** \brief Get peripheral clock status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PMC_GetPeriphClock( AT91PS_PMC pPMC ) /* \arg pointer to PMC controller */
|
|
{
|
|
return pPMC->PMC_PCSR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_CKGR_CfgMainOscillatorReg */
|
|
/** \brief Cfg the main oscillator */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_CKGR_CfgMainOscillatorReg( AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller */
|
|
unsigned int mode )
|
|
{
|
|
pCKGR->CKGR_MOR = mode;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_CKGR_GetMainOscillatorReg */
|
|
/** \brief Cfg the main oscillator */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_CKGR_GetMainOscillatorReg( AT91PS_CKGR pCKGR ) /* \arg pointer to CKGR controller */
|
|
{
|
|
return pCKGR->CKGR_MOR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_CKGR_EnableMainOscillator */
|
|
/** \brief Enable the main oscillator */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_CKGR_EnableMainOscillator( AT91PS_CKGR pCKGR ) /* \arg pointer to CKGR controller */
|
|
{
|
|
pCKGR->CKGR_MOR |= AT91C_CKGR_MOSCEN;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_CKGR_DisableMainOscillator */
|
|
/** \brief Disable the main oscillator */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_CKGR_DisableMainOscillator( AT91PS_CKGR pCKGR ) /* \arg pointer to CKGR controller */
|
|
{
|
|
pCKGR->CKGR_MOR &= ~AT91C_CKGR_MOSCEN;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_CKGR_CfgMainOscStartUpTime */
|
|
/** \brief Cfg MOR Register according to the main osc startup time */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_CKGR_CfgMainOscStartUpTime( AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller */
|
|
unsigned int startup_time, /* \arg main osc startup time in microsecond (us) */
|
|
unsigned int slowClock ) /* \arg slowClock in Hz */
|
|
{
|
|
pCKGR->CKGR_MOR &= ~AT91C_CKGR_OSCOUNT;
|
|
pCKGR->CKGR_MOR |= ( ( slowClock * startup_time ) / ( 8 * 1000000 ) ) << 8;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_CKGR_GetMainClockFreqReg */
|
|
/** \brief Cfg the main oscillator */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_CKGR_GetMainClockFreqReg( AT91PS_CKGR pCKGR ) /* \arg pointer to CKGR controller */
|
|
{
|
|
return pCKGR->CKGR_MCFR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_CKGR_GetMainClock */
|
|
/** \brief Return Main clock in Hz */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_CKGR_GetMainClock( AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller */
|
|
unsigned int slowClock ) /* \arg slowClock in Hz */
|
|
{
|
|
return ( ( pCKGR->CKGR_MCFR & AT91C_CKGR_MAINF ) * slowClock ) >> 4;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_CfgMCKReg */
|
|
/** \brief Cfg Master Clock Register */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PMC_CfgMCKReg( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */
|
|
unsigned int mode )
|
|
{
|
|
pPMC->PMC_MCKR = mode;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_GetMCKReg */
|
|
/** \brief Return Master Clock Register */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PMC_GetMCKReg( AT91PS_PMC pPMC ) /* \arg pointer to PMC controller */
|
|
{
|
|
return pPMC->PMC_MCKR;
|
|
}
|
|
|
|
/**------------------------------------------------------------------------------ */
|
|
/** \fn AT91F_PMC_GetMasterClock */
|
|
/** \brief Return master clock in Hz which corresponds to processor clock for ARM7 */
|
|
/**------------------------------------------------------------------------------ */
|
|
__inline unsigned int AT91F_PMC_GetMasterClock( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */
|
|
AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller */
|
|
unsigned int slowClock ) /* \arg slowClock in Hz */
|
|
{
|
|
unsigned int reg = pPMC->PMC_MCKR;
|
|
unsigned int prescaler = ( 1 << ( ( reg & AT91C_PMC_PRES ) >> 2 ) );
|
|
unsigned int pllDivider, pllMultiplier;
|
|
|
|
switch( reg & AT91C_PMC_CSS )
|
|
{
|
|
case AT91C_PMC_CSS_SLOW_CLK: /* Slow clock selected */
|
|
return slowClock / prescaler;
|
|
|
|
case AT91C_PMC_CSS_MAIN_CLK: /* Main clock is selected */
|
|
return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / prescaler;
|
|
|
|
case AT91C_PMC_CSS_PLL_CLK: /* PLLB clock is selected */
|
|
reg = pCKGR->CKGR_PLLR;
|
|
pllDivider = ( reg & AT91C_CKGR_DIV );
|
|
pllMultiplier = ( ( reg & AT91C_CKGR_MUL ) >> 16 ) + 1;
|
|
return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / pllDivider * pllMultiplier / prescaler;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_EnablePCK */
|
|
/** \brief Enable peripheral clock */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PMC_EnablePCK( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */
|
|
unsigned int pck, /* \arg Peripheral clock identifier 0 .. 7 */
|
|
unsigned int mode )
|
|
{
|
|
pPMC->PMC_PCKR[ pck ] = mode;
|
|
pPMC->PMC_SCER = ( 1 << pck ) << 8;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_DisablePCK */
|
|
/** \brief Enable peripheral clock */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PMC_DisablePCK( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */
|
|
unsigned int pck ) /* \arg Peripheral clock identifier 0 .. 7 */
|
|
{
|
|
pPMC->PMC_SCDR = ( 1 << pck ) << 8;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_EnableIt */
|
|
/** \brief Enable PMC interrupt */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PMC_EnableIt( AT91PS_PMC pPMC, /* pointer to a PMC controller */
|
|
unsigned int flag ) /* IT to be enabled */
|
|
{
|
|
/** Write to the IER register */
|
|
pPMC->PMC_IER = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_DisableIt */
|
|
/** \brief Disable PMC interrupt */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_PMC_DisableIt( AT91PS_PMC pPMC, /* pointer to a PMC controller */
|
|
unsigned int flag ) /* IT to be disabled */
|
|
{
|
|
/** Write to the IDR register */
|
|
pPMC->PMC_IDR = flag;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_GetStatus */
|
|
/** \brief Return PMC Interrupt Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PMC_GetStatus( /* \return PMC Interrupt Status */
|
|
AT91PS_PMC pPMC ) /* pointer to a PMC controller */
|
|
{
|
|
return pPMC->PMC_SR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_GetInterruptMaskStatus */
|
|
/** \brief Return PMC Interrupt Mask Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PMC_GetInterruptMaskStatus( /* \return PMC Interrupt Mask Status */
|
|
AT91PS_PMC pPMC ) /* pointer to a PMC controller */
|
|
{
|
|
return pPMC->PMC_IMR;
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_IsInterruptMasked */
|
|
/** \brief Test if PMC Interrupt is Masked */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PMC_IsInterruptMasked( AT91PS_PMC pPMC, /* \arg pointer to a PMC controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PMC_GetInterruptMaskStatus( pPMC ) & flag );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PMC_IsStatusSet */
|
|
/** \brief Test if PMC Status is Set */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_PMC_IsStatusSet( AT91PS_PMC pPMC, /* \arg pointer to a PMC controller */
|
|
unsigned int flag ) /* \arg flag to be tested */
|
|
{
|
|
return( AT91F_PMC_GetStatus( pPMC ) & flag );
|
|
} /* *****************************************************************************
|
|
* SOFTWARE API FOR RSTC
|
|
***************************************************************************** */
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RSTSoftReset */
|
|
/** \brief Start Software Reset */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_RSTSoftReset( AT91PS_RSTC pRSTC,
|
|
unsigned int reset )
|
|
{
|
|
pRSTC->RSTC_RCR = ( 0xA5000000 | reset );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RSTSetMode */
|
|
/** \brief Set Reset Mode */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline void AT91F_RSTSetMode( AT91PS_RSTC pRSTC,
|
|
unsigned int mode )
|
|
{
|
|
pRSTC->RSTC_RMR = ( 0xA5000000 | mode );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RSTGetMode */
|
|
/** \brief Get Reset Mode */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_RSTGetMode( AT91PS_RSTC pRSTC )
|
|
{
|
|
return( pRSTC->RSTC_RMR );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RSTGetStatus */
|
|
/** \brief Get Reset Status */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_RSTGetStatus( AT91PS_RSTC pRSTC )
|
|
{
|
|
return( pRSTC->RSTC_RSR );
|
|
}
|
|
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RSTIsSoftRstActive */
|
|
/** \brief Return !=0 if software reset is still not completed */
|
|
/**---------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_RSTIsSoftRstActive( AT91PS_RSTC pRSTC )
|
|
{
|
|
return( ( pRSTC->RSTC_RSR ) & AT91C_RSTC_SRCMP );
|
|
}
|
|
|
|
/* *****************************************************************************
|
|
* SOFTWARE API FOR RTTC
|
|
***************************************************************************** */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_SetRTT_TimeBase() */
|
|
/** \brief Set the RTT prescaler according to the TimeBase in ms */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_RTTSetTimeBase( AT91PS_RTTC pRTTC,
|
|
unsigned int ms )
|
|
{
|
|
if( ms > 2000 )
|
|
{
|
|
return 1; /* AT91C_TIME_OUT_OF_RANGE */
|
|
}
|
|
|
|
pRTTC->RTTC_RTMR &= ~0xFFFF;
|
|
pRTTC->RTTC_RTMR |= ( ( ( ms << 15 ) / 1000 ) & 0xFFFF );
|
|
return 0;
|
|
}
|
|
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RTTSetPrescaler() */
|
|
/** \brief Set the new prescaler value */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_RTTSetPrescaler( AT91PS_RTTC pRTTC,
|
|
unsigned int rtpres )
|
|
{
|
|
pRTTC->RTTC_RTMR &= ~0xFFFF;
|
|
pRTTC->RTTC_RTMR |= ( rtpres & 0xFFFF );
|
|
return( pRTTC->RTTC_RTMR );
|
|
}
|
|
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RTTRestart() */
|
|
/** \brief Restart the RTT prescaler */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline void AT91F_RTTRestart( AT91PS_RTTC pRTTC )
|
|
{
|
|
pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTRST;
|
|
}
|
|
|
|
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RTT_SetAlarmINT() */
|
|
/** \brief Enable RTT Alarm Interrupt */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline void AT91F_RTTSetAlarmINT( AT91PS_RTTC pRTTC )
|
|
{
|
|
pRTTC->RTTC_RTMR |= AT91C_RTTC_ALMIEN;
|
|
}
|
|
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RTT_ClearAlarmINT() */
|
|
/** \brief Disable RTT Alarm Interrupt */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline void AT91F_RTTClearAlarmINT( AT91PS_RTTC pRTTC )
|
|
{
|
|
pRTTC->RTTC_RTMR &= ~AT91C_RTTC_ALMIEN;
|
|
}
|
|
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RTT_SetRttIncINT() */
|
|
/** \brief Enable RTT INC Interrupt */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline void AT91F_RTTSetRttIncINT( AT91PS_RTTC pRTTC )
|
|
{
|
|
pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTINCIEN;
|
|
}
|
|
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RTT_ClearRttIncINT() */
|
|
/** \brief Disable RTT INC Interrupt */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline void AT91F_RTTClearRttIncINT( AT91PS_RTTC pRTTC )
|
|
{
|
|
pRTTC->RTTC_RTMR &= ~AT91C_RTTC_RTTINCIEN;
|
|
}
|
|
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RTT_SetAlarmValue() */
|
|
/** \brief Set RTT Alarm Value */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline void AT91F_RTTSetAlarmValue( AT91PS_RTTC pRTTC,
|
|
unsigned int alarm )
|
|
{
|
|
pRTTC->RTTC_RTAR = alarm;
|
|
}
|
|
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RTT_GetAlarmValue() */
|
|
/** \brief Get RTT Alarm Value */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_RTTGetAlarmValue( AT91PS_RTTC pRTTC )
|
|
{
|
|
return( pRTTC->RTTC_RTAR );
|
|
}
|
|
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RTTGetStatus() */
|
|
/** \brief Read the RTT status */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_RTTGetStatus( AT91PS_RTTC pRTTC )
|
|
{
|
|
return( pRTTC->RTTC_RTSR );
|
|
}
|
|
|
|
/**-------------------------------------------------------------------------------------- */
|
|
/** \fn AT91F_RTT_ReadValue() */
|
|
/** \brief Read the RTT value */
|
|
/**-------------------------------------------------------------------------------------- */
|
|
__inline unsigned int AT91F_RTTReadValue( AT91PS_RTTC pRTTC )
|
|
{
|
|
register volatile unsigned int val1, val2;
|
|
|
|
do
|
|
{
|
|
val1 = pRTTC->RTTC_RTVR;
|
|
val2 = pRTTC->RTTC_RTVR;
|
|
}
|
|
while( val1 != val2 );
|
|
|
|
return( val1 );
|
|
}
|
|
|
|
/* *****************************************************************************
|
|
* SOFTWARE API FOR PITC
|
|
***************************************************************************** */
|
|
/**---------------------------------------------------------------------------- */
|
|
/** \fn AT91F_PITInit */
|
|
/** \brief System timer init : period in */
|