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225 lines
8.8 KiB
C
225 lines
8.8 KiB
C
/*
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FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------
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* Components that can be compiled to either ARM or THUMB mode are
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* contained in port.c The ISR routines, which can only be compiled
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* to ARM mode, are contained in this file.
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*----------------------------------------------------------*/
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/*
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*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to handle critical sections. */
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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volatile uint32_t ulCriticalNesting = 9999UL;
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/*-----------------------------------------------------------*/
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/*
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* The scheduler can only be started from ARM mode, hence the inclusion of this
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* function here.
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*/
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void vPortISRStartFirstTask( void );
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/*-----------------------------------------------------------*/
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void vPortISRStartFirstTask( void )
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{
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/* Simply start the scheduler. This is included here as it can only be
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called from ARM mode. */
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asm volatile ( \
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"LDR R0, =pxCurrentTCB \n\t" \
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"LDR R0, [R0] \n\t" \
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"LDR LR, [R0] \n\t" \
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\
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/* The critical nesting depth is the first item on the stack. */ \
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/* Load it into the ulCriticalNesting variable. */ \
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"LDR R0, =ulCriticalNesting \n\t" \
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"LDMFD LR!, {R1} \n\t" \
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"STR R1, [R0] \n\t" \
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\
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/* Get the SPSR from the stack. */ \
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"LDMFD LR!, {R0} \n\t" \
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"MSR SPSR, R0 \n\t" \
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\
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/* Restore all system mode registers for the task. */ \
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"LDMFD LR, {R0-R14}^ \n\t" \
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"NOP \n\t" \
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\
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/* Restore the return address. */ \
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"LDR LR, [LR, #+60] \n\t" \
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\
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/* And return - correcting the offset in the LR to obtain the */ \
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/* correct address. */ \
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"SUBS PC, LR, #4 \n\t" \
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);
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}
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/*-----------------------------------------------------------*/
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void vPortTickISR( void )
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{
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/* Increment the RTOS tick count, then look for the highest priority
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task that is ready to run. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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vTaskSwitchContext();
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}
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/* Ready for the next interrupt. */
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TB_ClearITPendingBit( TB_IT_Update );
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}
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/*-----------------------------------------------------------*/
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/*
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* The interrupt management utilities can only be called from ARM mode. When
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* THUMB_INTERWORK is defined the utilities are defined as functions here to
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* ensure a switch to ARM mode. When THUMB_INTERWORK is not defined then
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* the utilities are defined as macros in portmacro.h - as per other ports.
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*/
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#ifdef THUMB_INTERWORK
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void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
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void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
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void vPortDisableInterruptsFromThumb( void )
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{
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asm volatile (
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"STMDB SP!, {R0} \n\t" /* Push R0. */
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"MRS R0, CPSR \n\t" /* Get CPSR. */
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"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
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"MSR CPSR, R0 \n\t" /* Write back modified value. */
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"LDMIA SP!, {R0} \n\t" /* Pop R0. */
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"BX R14" ); /* Return back to thumb. */
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}
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void vPortEnableInterruptsFromThumb( void )
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{
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asm volatile (
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"STMDB SP!, {R0} \n\t" /* Push R0. */
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"MRS R0, CPSR \n\t" /* Get CPSR. */
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"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
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"MSR CPSR, R0 \n\t" /* Write back modified value. */
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"LDMIA SP!, {R0} \n\t" /* Pop R0. */
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"BX R14" ); /* Return back to thumb. */
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}
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#endif /* THUMB_INTERWORK */
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
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asm volatile (
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"STMDB SP!, {R0} \n\t" /* Push R0. */
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"MRS R0, CPSR \n\t" /* Get CPSR. */
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"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
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"MSR CPSR, R0 \n\t" /* Write back modified value. */
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"LDMIA SP!, {R0}" ); /* Pop R0. */
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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directly. Increment ulCriticalNesting to keep a count of how many times
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portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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{
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/* Decrement the nesting count as we are leaving a critical section. */
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ulCriticalNesting--;
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/* If the nesting level has reached zero then interrupts should be
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re-enabled. */
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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/* Enable interrupts as per portEXIT_CRITICAL(). */
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asm volatile (
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"STMDB SP!, {R0} \n\t" /* Push R0. */
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"MRS R0, CPSR \n\t" /* Get CPSR. */
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"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
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"MSR CPSR, R0 \n\t" /* Write back modified value. */
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"LDMIA SP!, {R0}" ); /* Pop R0. */
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}
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}
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}
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