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323 lines
12 KiB
C
323 lines
12 KiB
C
/*
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FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/*
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BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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*/
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "queue.h"
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#include "task.h"
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/* Demo application includes. */
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#include "serial.h"
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/*-----------------------------------------------------------*/
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/* Constants to setup and access the UART. */
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#define serDLAB ( ( unsigned char ) 0x80 )
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#define serENABLE_INTERRUPTS ( ( unsigned char ) 0x03 )
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#define serNO_PARITY ( ( unsigned char ) 0x00 )
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#define ser1_STOP_BIT ( ( unsigned char ) 0x00 )
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#define ser8_BIT_CHARS ( ( unsigned char ) 0x03 )
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#define serFIFO_ON ( ( unsigned char ) 0x01 )
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#define serCLEAR_FIFO ( ( unsigned char ) 0x06 )
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#define serWANTED_CLOCK_SCALING ( ( unsigned long ) 16 )
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/* Constants to setup and access the VIC. */
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#define serU0VIC_CHANNEL ( ( unsigned long ) 0x0006 )
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#define serU0VIC_CHANNEL_BIT ( ( unsigned long ) 0x0040 )
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#define serU0VIC_ENABLE ( ( unsigned long ) 0x0020 )
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#define serCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
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/* Constants to determine the ISR source. */
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#define serSOURCE_THRE ( ( unsigned char ) 0x02 )
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#define serSOURCE_RX_TIMEOUT ( ( unsigned char ) 0x0c )
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#define serSOURCE_ERROR ( ( unsigned char ) 0x06 )
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#define serSOURCE_RX ( ( unsigned char ) 0x04 )
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#define serINTERRUPT_SOURCE_MASK ( ( unsigned char ) 0x0f )
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/* Misc. */
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#define serINVALID_QUEUE ( ( QueueHandle_t ) 0 )
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#define serHANDLE ( ( xComPortHandle ) 1 )
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#define serNO_BLOCK ( ( TickType_t ) 0 )
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/*-----------------------------------------------------------*/
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/* Queues used to hold received characters, and characters waiting to be
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transmitted. */
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static QueueHandle_t xRxedChars;
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static QueueHandle_t xCharsForTx;
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static volatile long lTHREEmpty = pdFALSE;
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/*-----------------------------------------------------------*/
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/* The ISR. Note that this is called by a wrapper written in the file
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SerialISR.s79. See the WEB documentation for this port for further
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information. */
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__arm void vSerialISR( void );
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/*-----------------------------------------------------------*/
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xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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{
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unsigned long ulDivisor, ulWantedClock;
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xComPortHandle xReturn = serHANDLE;
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extern void ( vSerialISREntry) ( void );
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/* Create the queues used to hold Rx and Tx characters. */
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xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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/* Initialise the THRE empty flag. */
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lTHREEmpty = pdTRUE;
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if(
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( xRxedChars != serINVALID_QUEUE ) &&
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( xCharsForTx != serINVALID_QUEUE ) &&
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( ulWantedBaud != ( unsigned long ) 0 )
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)
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{
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portENTER_CRITICAL();
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{
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/* Setup the baud rate: Calculate the divisor value. */
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ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
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ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
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/* Set the DLAB bit so we can access the divisor. */
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U0LCR |= serDLAB;
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/* Setup the divisor. */
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U0DLL = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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ulDivisor >>= 8;
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U0DLM = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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/* Turn on the FIFO's and clear the buffers. */
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U0FCR = ( serFIFO_ON | serCLEAR_FIFO );
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/* Setup transmission format. */
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U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
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/* Setup the VIC for the UART. */
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VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );
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VICIntEnable |= serU0VIC_CHANNEL_BIT;
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VICVectAddr1 = ( unsigned long ) vSerialISREntry;
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VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;
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/* Enable UART0 interrupts. */
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U0IER |= serENABLE_INTERRUPTS;
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}
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portEXIT_CRITICAL();
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xReturn = ( xComPortHandle ) 1;
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}
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else
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{
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xReturn = ( xComPortHandle ) 0;
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}
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return xReturn;
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )
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{
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/* The port handle is not required as this driver only supports UART0. */
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( void ) pxPort;
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/* Get the next character from the buffer. Return false if no characters
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are available, or arrive before xBlockTime expires. */
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if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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{
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return pdTRUE;
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}
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else
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{
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return pdFALSE;
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}
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}
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/*-----------------------------------------------------------*/
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void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
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{
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signed char *pxNext;
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/* NOTE: This implementation does not handle the queue being full as no
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block time is used! */
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/* The port handle is not required as this driver only supports UART0. */
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( void ) pxPort;
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( void ) usStringLength;
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/* Send each character in the string, one at a time. */
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pxNext = ( signed char * ) pcString;
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while( *pxNext )
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{
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xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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pxNext++;
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}
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )
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{
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signed portBASE_TYPE xReturn;
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/* The port handle is not required as this driver only supports UART0. */
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( void ) pxPort;
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portENTER_CRITICAL();
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{
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/* Is there space to write directly to the UART? */
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if( lTHREEmpty == ( long ) pdTRUE )
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{
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/* We wrote the character directly to the UART, so was
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successful. */
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lTHREEmpty = pdFALSE;
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U0THR = cOutChar;
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xReturn = pdPASS;
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}
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else
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{
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/* We cannot write directly to the UART, so queue the character.
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Block for a maximum of xBlockTime if there is no space in the
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queue. It is ok to block within a critical section as each
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task has it's own critical section management. */
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xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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/* Depending on queue sizing and task prioritisation: While we
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were blocked waiting to post interrupts were not disabled. It is
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possible that the serial ISR has emptied the Tx queue, in which
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case we need to start the Tx off again. */
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if( lTHREEmpty == ( long ) pdTRUE )
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{
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xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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lTHREEmpty = pdFALSE;
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U0THR = cOutChar;
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}
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}
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}
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portEXIT_CRITICAL();
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return xReturn;
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}
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/*-----------------------------------------------------------*/
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__arm void vSerialISR( void )
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{
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signed char cChar;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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/* What caused the interrupt? */
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switch( U0IIR & serINTERRUPT_SOURCE_MASK )
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{
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case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
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cChar = U0LSR;
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break;
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case serSOURCE_THRE : /* The THRE is empty. If there is another
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character in the Tx queue, send it now. */
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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{
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U0THR = cChar;
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}
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else
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{
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/* There are no further characters
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queued to send so we can indicate
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that the THRE is available. */
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lTHREEmpty = pdTRUE;
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}
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break;
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case serSOURCE_RX_TIMEOUT :
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case serSOURCE_RX : /* A character was received. Place it in
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the queue of received characters. */
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cChar = U0RBR;
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xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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break;
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default : /* There is nothing to do, leave the ISR. */
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break;
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}
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/* Exit the ISR. If a task was woken by either a character being received
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or transmitted then a context switch will occur. */
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portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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/* Clear the ISR in the VIC. */
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VICVectAddr = serCLEAR_VIC_INTERRUPT;
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}
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/*-----------------------------------------------------------*/
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