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Richard Barry 73606369c4 Make Cortex-M0 set/clear interrupt flag from ISR functions nestable. ... Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.		12 years ago
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ARM7_LPC21xx	Add additional critical section to the default tickless implementations.	12 years ago
ARM_CA9	Add additional critical section to the default tickless implementations.	12 years ago
ARM_CM0	Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.	12 years ago
ARM_CM3	Fix a few typos and remove the "register" keyword.	12 years ago
ARM_CM4F	Fix a few typos and remove the "register" keyword.	12 years ago