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765 lines
39 KiB
C
765 lines
39 KiB
C
/*
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* FreeRTOS Kernel V10.3.1
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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*/
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#include <stdlib.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <avr/wdt.h>
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#include "FreeRTOS.h"
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#include "task.h"
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the AVR port.
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*----------------------------------------------------------*/
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/* Start tasks with interrupts enabled. */
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#define portFLAGS_INT_ENABLED ( (StackType_t) 0x80 )
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#if defined( portUSE_WDTO)
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#warning "Watchdog Timer used for scheduler."
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#define portSCHEDULER_ISR WDT_vect
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#elif defined( portUSE_TIMER0 )
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/* Hardware constants for Timer0. */
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#warning "Timer0 used for scheduler."
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#define portSCHEDULER_ISR TIMER0_COMPA_vect
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#define portCLEAR_COUNTER_ON_MATCH ( (uint8_t) _BV(WGM01) )
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#define portPRESCALE_1024 ( (uint8_t) (_BV(CS02)|_BV(CS00)) )
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#define portCLOCK_PRESCALER ( (uint32_t) 1024 )
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#define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( (uint8_t) _BV(OCIE0A) )
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#define portOCRL OCR0A
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#define portTCCRa TCCR0A
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#define portTCCRb TCCR0B
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#define portTIMSK TIMSK0
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#define portTIFR TIFR0
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#endif
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/*-----------------------------------------------------------*/
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/* We require the address of the pxCurrentTCB variable, but don't want to know
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any details of its type. */
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typedef void TCB_t;
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extern volatile TCB_t * volatile pxCurrentTCB;
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/*-----------------------------------------------------------*/
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/**
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Enable the watchdog timer, configuring it for expire after
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(value) timeout (which is a combination of the WDP0
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through WDP3 bits).
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This function is derived from <avr/wdt.h> but enables only
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the interrupt bit (WDIE), rather than the reset bit (WDE).
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Can't find it documented but the WDT, once enabled,
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rolls over and fires a new interrupt each time.
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See also the symbolic constants WDTO_15MS et al.
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Updated to match avr-libc 2.0.0
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*/
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#if defined( portUSE_WDTO)
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static __inline__
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__attribute__ ((__always_inline__))
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void wdt_interrupt_enable (const uint8_t value)
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{
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if (_SFR_IO_REG_P (_WD_CONTROL_REG))
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{
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__asm__ __volatile__ (
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"in __tmp_reg__,__SREG__" "\n\t"
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"cli" "\n\t"
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"wdr" "\n\t"
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"out %0, %1" "\n\t"
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"out __SREG__,__tmp_reg__" "\n\t"
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"out %0, %2" "\n\t"
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: /* no outputs */
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: "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
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"r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))),
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"r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) |
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_BV(WDIF) | _BV(WDIE) | (value & 0x07)) )
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: "r0"
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);
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}
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else
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{
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__asm__ __volatile__ (
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"in __tmp_reg__,__SREG__" "\n\t"
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"cli" "\n\t"
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"wdr" "\n\t"
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"sts %0, %1" "\n\t"
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"out __SREG__,__tmp_reg__" "\n\t"
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"sts %0, %2" "\n\t"
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: /* no outputs */
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: "n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
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"r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))),
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"r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) |
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_BV(WDIF) | _BV(WDIE) | (value & 0x07)) )
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: "r0"
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);
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}
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}
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#endif
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/*-----------------------------------------------------------*/
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/**
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Enable the watchdog timer, configuring it for expire after
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(value) timeout (which is a combination of the WDP0
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through WDP3 bits).
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This function is derived from <avr/wdt.h> but enables both
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the reset bit (WDE), and the interrupt bit (WDIE).
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This will ensure that if the interrupt is not serviced
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before the second timeout, the AVR will reset.
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Servicing the interrupt automatically clears it,
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and ensures the AVR does not reset.
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Can't find it documented but the WDT, once enabled,
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rolls over and fires a new interrupt each time.
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See also the symbolic constants WDTO_15MS et al.
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Updated to match avr-libc 2.0.0
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*/
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#if defined( portUSE_WDTO)
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static __inline__
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__attribute__ ((__always_inline__))
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void wdt_interrupt_reset_enable (const uint8_t value)
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{
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if (_SFR_IO_REG_P (_WD_CONTROL_REG))
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{
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__asm__ __volatile__ (
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"in __tmp_reg__,__SREG__" "\n\t"
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"cli" "\n\t"
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"wdr" "\n\t"
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"out %0, %1" "\n\t"
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"out __SREG__,__tmp_reg__" "\n\t"
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"out %0, %2" "\n\t"
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: /* no outputs */
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: "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
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"r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))),
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"r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) |
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_BV(WDIF) | _BV(WDIE) | _BV(WDE) | (value & 0x07)) )
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: "r0"
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);
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}
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else
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{
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__asm__ __volatile__ (
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"in __tmp_reg__,__SREG__" "\n\t"
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"cli" "\n\t"
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"wdr" "\n\t"
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"sts %0, %1" "\n\t"
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"out __SREG__,__tmp_reg__" "\n\t"
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"sts %0, %2" "\n\t"
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: /* no outputs */
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: "n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
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"r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))),
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"r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) |
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_BV(WDIF) | _BV(WDIE) | _BV(WDE) | (value & 0x07)) )
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: "r0"
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);
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}
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}
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#endif
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/*-----------------------------------------------------------*/
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/*
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* Macro to save all the general purpose registers, the save the stack pointer
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* into the TCB.
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*
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* The first thing we do is save the flags then disable interrupts. This is to
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* guard our stack against having a context switch interrupt after we have already
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* pushed the registers onto the stack - causing the 32 registers to be on the
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* stack twice.
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*
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* r1 is set to zero (__zero_reg__) as the compiler expects it to be thus, however
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* some of the math routines make use of R1.
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*
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* r0 is set to __tmp_reg__ as the compiler expects it to be thus.
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*
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* #if defined(__AVR_HAVE_RAMPZ__)
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* #define __RAMPZ__ 0x3B
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* #endif
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*
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* #if defined(__AVR_3_BYTE_PC__)
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* #define __EIND__ 0x3C
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* #endif
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*
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* The interrupts will have been disabled during the call to portSAVE_CONTEXT()
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* so we need not worry about reading/writing to the stack pointer.
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*/
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#if defined(__AVR_3_BYTE_PC__) && defined(__AVR_HAVE_RAMPZ__)
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/* 3-Byte PC Save with RAMPZ */
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#define portSAVE_CONTEXT() \
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__asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
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"in __tmp_reg__, __SREG__ \n\t" \
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"cli \n\t" \
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"push __tmp_reg__ \n\t" \
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"in __tmp_reg__, 0x3B \n\t" \
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"push __tmp_reg__ \n\t" \
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"in __tmp_reg__, 0x3C \n\t" \
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"push __tmp_reg__ \n\t" \
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"push __zero_reg__ \n\t" \
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"clr __zero_reg__ \n\t" \
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"push r2 \n\t" \
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"push r3 \n\t" \
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"push r4 \n\t" \
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"push r5 \n\t" \
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"push r6 \n\t" \
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"push r7 \n\t" \
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"push r8 \n\t" \
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"push r9 \n\t" \
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"push r10 \n\t" \
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"push r11 \n\t" \
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"push r12 \n\t" \
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"push r13 \n\t" \
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"push r14 \n\t" \
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"push r15 \n\t" \
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"push r16 \n\t" \
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"push r17 \n\t" \
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"push r18 \n\t" \
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"push r19 \n\t" \
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"push r20 \n\t" \
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"push r21 \n\t" \
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"push r22 \n\t" \
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"push r23 \n\t" \
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"push r24 \n\t" \
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"push r25 \n\t" \
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"push r26 \n\t" \
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"push r27 \n\t" \
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"push r28 \n\t" \
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"push r29 \n\t" \
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"push r30 \n\t" \
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"push r31 \n\t" \
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"lds r26, pxCurrentTCB \n\t" \
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"lds r27, pxCurrentTCB + 1 \n\t" \
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"in __tmp_reg__, __SP_L__ \n\t" \
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"st x+, __tmp_reg__ \n\t" \
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"in __tmp_reg__, __SP_H__ \n\t" \
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"st x+, __tmp_reg__ \n\t" \
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);
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#elif defined(__AVR_HAVE_RAMPZ__)
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/* 2-Byte PC Save with RAMPZ */
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#define portSAVE_CONTEXT() \
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__asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
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"in __tmp_reg__, __SREG__ \n\t" \
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"cli \n\t" \
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"push __tmp_reg__ \n\t" \
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"in __tmp_reg__, 0x3B \n\t" \
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"push __tmp_reg__ \n\t" \
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"push __zero_reg__ \n\t" \
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"clr __zero_reg__ \n\t" \
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"push r2 \n\t" \
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"push r3 \n\t" \
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"push r4 \n\t" \
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"push r5 \n\t" \
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"push r6 \n\t" \
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"push r7 \n\t" \
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"push r8 \n\t" \
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"push r9 \n\t" \
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"push r10 \n\t" \
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"push r11 \n\t" \
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"push r12 \n\t" \
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"push r13 \n\t" \
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"push r14 \n\t" \
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"push r15 \n\t" \
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"push r16 \n\t" \
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"push r17 \n\t" \
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"push r18 \n\t" \
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"push r19 \n\t" \
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"push r20 \n\t" \
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"push r21 \n\t" \
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"push r22 \n\t" \
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"push r23 \n\t" \
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"push r24 \n\t" \
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"push r25 \n\t" \
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"push r26 \n\t" \
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"push r27 \n\t" \
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"push r28 \n\t" \
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"push r29 \n\t" \
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"push r30 \n\t" \
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"push r31 \n\t" \
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"lds r26, pxCurrentTCB \n\t" \
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"lds r27, pxCurrentTCB + 1 \n\t" \
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"in __tmp_reg__, __SP_L__ \n\t" \
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"st x+, __tmp_reg__ \n\t" \
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"in __tmp_reg__, __SP_H__ \n\t" \
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"st x+, __tmp_reg__ \n\t" \
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);
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#else
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/* 2-Byte PC Save */
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#define portSAVE_CONTEXT() \
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__asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
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"in __tmp_reg__, __SREG__ \n\t" \
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"cli \n\t" \
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"push __tmp_reg__ \n\t" \
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"push __zero_reg__ \n\t" \
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"clr __zero_reg__ \n\t" \
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"push r2 \n\t" \
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"push r3 \n\t" \
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"push r4 \n\t" \
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"push r5 \n\t" \
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"push r6 \n\t" \
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"push r7 \n\t" \
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"push r8 \n\t" \
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"push r9 \n\t" \
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"push r10 \n\t" \
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"push r11 \n\t" \
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"push r12 \n\t" \
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"push r13 \n\t" \
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"push r14 \n\t" \
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"push r15 \n\t" \
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"push r16 \n\t" \
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"push r17 \n\t" \
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"push r18 \n\t" \
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"push r19 \n\t" \
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"push r20 \n\t" \
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"push r21 \n\t" \
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"push r22 \n\t" \
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"push r23 \n\t" \
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"push r24 \n\t" \
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"push r25 \n\t" \
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"push r26 \n\t" \
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"push r27 \n\t" \
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"push r28 \n\t" \
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"push r29 \n\t" \
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"push r30 \n\t" \
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"push r31 \n\t" \
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"lds r26, pxCurrentTCB \n\t" \
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"lds r27, pxCurrentTCB + 1 \n\t" \
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"in __tmp_reg__, __SP_L__ \n\t" \
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"st x+, __tmp_reg__ \n\t" \
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"in __tmp_reg__, __SP_H__ \n\t" \
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"st x+, __tmp_reg__ \n\t" \
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);
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#endif
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/*
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* Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during
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* the context save so we can write to the stack pointer.
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*/
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#if defined(__AVR_3_BYTE_PC__) && defined(__AVR_HAVE_RAMPZ__)
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/* 3-Byte PC Restore with RAMPZ */
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#define portRESTORE_CONTEXT() \
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__asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
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"lds r27, pxCurrentTCB + 1 \n\t" \
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"ld r28, x+ \n\t" \
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"out __SP_L__, r28 \n\t" \
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"ld r29, x+ \n\t" \
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"out __SP_H__, r29 \n\t" \
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"pop r31 \n\t" \
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"pop r30 \n\t" \
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"pop r29 \n\t" \
|
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"pop r28 \n\t" \
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"pop r27 \n\t" \
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|
"pop r26 \n\t" \
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"pop r25 \n\t" \
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"pop r24 \n\t" \
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"pop r23 \n\t" \
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"pop r22 \n\t" \
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"pop r21 \n\t" \
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"pop r20 \n\t" \
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"pop r19 \n\t" \
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"pop r18 \n\t" \
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"pop r17 \n\t" \
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"pop r16 \n\t" \
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"pop r15 \n\t" \
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"pop r14 \n\t" \
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"pop r13 \n\t" \
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"pop r12 \n\t" \
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"pop r11 \n\t" \
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"pop r10 \n\t" \
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"pop r9 \n\t" \
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"pop r8 \n\t" \
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|
"pop r7 \n\t" \
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"pop r6 \n\t" \
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"pop r5 \n\t" \
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"pop r4 \n\t" \
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"pop r3 \n\t" \
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"pop r2 \n\t" \
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"pop __zero_reg__ \n\t" \
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"pop __tmp_reg__ \n\t" \
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"out 0x3C, __tmp_reg__ \n\t" \
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"pop __tmp_reg__ \n\t" \
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"out 0x3B, __tmp_reg__ \n\t" \
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"pop __tmp_reg__ \n\t" \
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"out __SREG__, __tmp_reg__ \n\t" \
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"pop __tmp_reg__ \n\t" \
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);
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#elif defined(__AVR_HAVE_RAMPZ__)
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/* 2-Byte PC Restore with RAMPZ */
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#define portRESTORE_CONTEXT() \
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__asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
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"lds r27, pxCurrentTCB + 1 \n\t" \
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"ld r28, x+ \n\t" \
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"out __SP_L__, r28 \n\t" \
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"ld r29, x+ \n\t" \
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"out __SP_H__, r29 \n\t" \
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"pop r31 \n\t" \
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"pop r30 \n\t" \
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"pop r29 \n\t" \
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"pop r28 \n\t" \
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"pop r27 \n\t" \
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"pop r26 \n\t" \
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"pop r25 \n\t" \
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"pop r24 \n\t" \
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"pop r23 \n\t" \
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"pop r22 \n\t" \
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"pop r21 \n\t" \
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"pop r20 \n\t" \
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"pop r19 \n\t" \
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"pop r18 \n\t" \
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|
"pop r17 \n\t" \
|
|
"pop r16 \n\t" \
|
|
"pop r15 \n\t" \
|
|
"pop r14 \n\t" \
|
|
"pop r13 \n\t" \
|
|
"pop r12 \n\t" \
|
|
"pop r11 \n\t" \
|
|
"pop r10 \n\t" \
|
|
"pop r9 \n\t" \
|
|
"pop r8 \n\t" \
|
|
"pop r7 \n\t" \
|
|
"pop r6 \n\t" \
|
|
"pop r5 \n\t" \
|
|
"pop r4 \n\t" \
|
|
"pop r3 \n\t" \
|
|
"pop r2 \n\t" \
|
|
"pop __zero_reg__ \n\t" \
|
|
"pop __tmp_reg__ \n\t" \
|
|
"out 0x3B, __tmp_reg__ \n\t" \
|
|
"pop __tmp_reg__ \n\t" \
|
|
"out __SREG__, __tmp_reg__ \n\t" \
|
|
"pop __tmp_reg__ \n\t" \
|
|
);
|
|
#else
|
|
/* 2-Byte PC Restore */
|
|
#define portRESTORE_CONTEXT() \
|
|
__asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
|
|
"lds r27, pxCurrentTCB + 1 \n\t" \
|
|
"ld r28, x+ \n\t" \
|
|
"out __SP_L__, r28 \n\t" \
|
|
"ld r29, x+ \n\t" \
|
|
"out __SP_H__, r29 \n\t" \
|
|
"pop r31 \n\t" \
|
|
"pop r30 \n\t" \
|
|
"pop r29 \n\t" \
|
|
"pop r28 \n\t" \
|
|
"pop r27 \n\t" \
|
|
"pop r26 \n\t" \
|
|
"pop r25 \n\t" \
|
|
"pop r24 \n\t" \
|
|
"pop r23 \n\t" \
|
|
"pop r22 \n\t" \
|
|
"pop r21 \n\t" \
|
|
"pop r20 \n\t" \
|
|
"pop r19 \n\t" \
|
|
"pop r18 \n\t" \
|
|
"pop r17 \n\t" \
|
|
"pop r16 \n\t" \
|
|
"pop r15 \n\t" \
|
|
"pop r14 \n\t" \
|
|
"pop r13 \n\t" \
|
|
"pop r12 \n\t" \
|
|
"pop r11 \n\t" \
|
|
"pop r10 \n\t" \
|
|
"pop r9 \n\t" \
|
|
"pop r8 \n\t" \
|
|
"pop r7 \n\t" \
|
|
"pop r6 \n\t" \
|
|
"pop r5 \n\t" \
|
|
"pop r4 \n\t" \
|
|
"pop r3 \n\t" \
|
|
"pop r2 \n\t" \
|
|
"pop __zero_reg__ \n\t" \
|
|
"pop __tmp_reg__ \n\t" \
|
|
"out __SREG__, __tmp_reg__ \n\t" \
|
|
"pop __tmp_reg__ \n\t" \
|
|
);
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* Perform hardware setup to enable ticks from relevant Timer.
|
|
*/
|
|
static void prvSetupTimerInterrupt( void );
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* See header file for description.
|
|
*/
|
|
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
|
{
|
|
uint16_t usAddress;
|
|
/* Simulate how the stack would look after a call to vPortYield() generated by
|
|
the compiler. */
|
|
|
|
/* The start of the task code will be popped off the stack last, so place
|
|
it on first. */
|
|
usAddress = ( uint16_t ) pxCode;
|
|
*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
|
|
pxTopOfStack--;
|
|
|
|
usAddress >>= 8;
|
|
*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
|
|
pxTopOfStack--;
|
|
|
|
#if defined(__AVR_3_BYTE_PC__)
|
|
/* The AVR ATmega2560/ATmega2561 have 256KBytes of program memory and a 17-bit
|
|
* program counter. When a code address is stored on the stack, it takes 3 bytes
|
|
* instead of 2 for the other ATmega* chips.
|
|
*
|
|
* Store 0 as the top byte since we force all task routines to the bottom 128K
|
|
* of flash. We do this by using the .lowtext label in the linker script.
|
|
*
|
|
* In order to do this properly, we would need to get a full 3-byte pointer to
|
|
* pxCode. That requires a change to GCC. Not likely to happen any time soon.
|
|
*/
|
|
*pxTopOfStack = 0;
|
|
pxTopOfStack--;
|
|
#endif
|
|
|
|
/* Next simulate the stack as if after a call to portSAVE_CONTEXT().
|
|
portSAVE_CONTEXT places the flags on the stack immediately after r0
|
|
to ensure the interrupts get disabled as soon as possible, and so ensuring
|
|
the stack use is minimal should a context switch interrupt occur. */
|
|
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = portFLAGS_INT_ENABLED;
|
|
pxTopOfStack--;
|
|
|
|
#if defined(__AVR_3_BYTE_PC__)
|
|
/* If we have an ATmega256x, we are also saving the EIND register.
|
|
* We should default to 0.
|
|
*/
|
|
*pxTopOfStack = ( StackType_t ) 0x00; /* EIND */
|
|
pxTopOfStack--;
|
|
#endif
|
|
|
|
#if defined(__AVR_HAVE_RAMPZ__)
|
|
/* We are saving the RAMPZ register.
|
|
* We should default to 0.
|
|
*/
|
|
*pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */
|
|
pxTopOfStack--;
|
|
#endif
|
|
|
|
/* Now the remaining registers. The compiler expects R1 to be 0. */
|
|
*pxTopOfStack = ( StackType_t ) 0x00; /* R1 */
|
|
|
|
/* Leave R2 - R23 untouched */
|
|
pxTopOfStack -= 23;
|
|
|
|
/* Place the parameter on the stack in the expected location. */
|
|
usAddress = ( uint16_t ) pvParameters;
|
|
*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
|
|
pxTopOfStack--;
|
|
|
|
usAddress >>= 8;
|
|
*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
|
|
|
|
/* Leave register R26 - R31 untouched */
|
|
pxTopOfStack -= 7;
|
|
|
|
return pxTopOfStack;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
BaseType_t xPortStartScheduler( void )
|
|
{
|
|
/* Setup the relevant timer hardware to generate the tick. */
|
|
prvSetupTimerInterrupt();
|
|
|
|
/* Restore the context of the first task that is going to run. */
|
|
portRESTORE_CONTEXT();
|
|
|
|
/* Simulate a function call end as generated by the compiler. We will now
|
|
jump to the start of the task the context of which we have just restored. */
|
|
__asm__ __volatile__ ( "ret" );
|
|
|
|
/* Should not get here. */
|
|
return pdTRUE;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortEndScheduler( void )
|
|
{
|
|
/* It is unlikely that the ATmega port will get stopped. */
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* Manual context switch. The first thing we do is save the registers so we
|
|
* can use a naked attribute.
|
|
*/
|
|
void vPortYield( void ) __attribute__ ( ( hot, flatten, naked ) );
|
|
void vPortYield( void )
|
|
{
|
|
portSAVE_CONTEXT();
|
|
vTaskSwitchContext();
|
|
portRESTORE_CONTEXT();
|
|
|
|
__asm__ __volatile__ ( "ret" );
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* Manual context switch callable from ISRs. The first thing we do is save
|
|
* the registers so we can use a naked attribute.
|
|
*/
|
|
void vPortYieldFromISR(void) __attribute__ ( ( hot, flatten, naked ) );
|
|
void vPortYieldFromISR(void)
|
|
{
|
|
portSAVE_CONTEXT();
|
|
vTaskSwitchContext();
|
|
portRESTORE_CONTEXT();
|
|
|
|
__asm__ __volatile__ ( "reti" );
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* Context switch function used by the tick. This must be identical to
|
|
* vPortYield() from the call to vTaskSwitchContext() onwards. The only
|
|
* difference from vPortYield() is the tick count is incremented as the
|
|
* call comes from the tick ISR.
|
|
*/
|
|
void vPortYieldFromTick( void ) __attribute__ ( ( hot, flatten, naked ) );
|
|
void vPortYieldFromTick( void )
|
|
{
|
|
portSAVE_CONTEXT();
|
|
if( xTaskIncrementTick() != pdFALSE )
|
|
{
|
|
vTaskSwitchContext();
|
|
}
|
|
portRESTORE_CONTEXT();
|
|
|
|
__asm__ __volatile__ ( "ret" );
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if defined(portUSE_WDTO)
|
|
/*
|
|
* Setup WDT to generate a tick interrupt.
|
|
*/
|
|
void prvSetupTimerInterrupt( void )
|
|
{
|
|
/* reset watchdog */
|
|
wdt_reset();
|
|
|
|
/* set up WDT Interrupt (rather than the WDT Reset). */
|
|
wdt_interrupt_enable( portUSE_WDTO );
|
|
}
|
|
|
|
#elif defined (portUSE_TIMER0)
|
|
/*
|
|
* Setup Timer0 compare match A to generate a tick interrupt.
|
|
*/
|
|
static void prvSetupTimerInterrupt( void )
|
|
{
|
|
uint32_t ulCompareMatch;
|
|
uint8_t ucLowByte;
|
|
|
|
/* Using 8bit Timer0 to generate the tick. Correct fuses must be
|
|
selected for the configCPU_CLOCK_HZ clock.*/
|
|
|
|
ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
|
|
|
|
/* We only have 8 bits so have to scale 1024 to get our required tick rate. */
|
|
ulCompareMatch /= portCLOCK_PRESCALER;
|
|
|
|
/* Adjust for correct value. */
|
|
ulCompareMatch -= ( uint32_t ) 1;
|
|
|
|
/* Setup compare match value for compare match A. Interrupts are disabled
|
|
before this is called so we need not worry here. */
|
|
ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );
|
|
portOCRL = ucLowByte;
|
|
|
|
/* Setup clock source and compare match behaviour. */
|
|
portTCCRa = portCLEAR_COUNTER_ON_MATCH;
|
|
portTCCRb = portPRESCALE_1024;
|
|
|
|
|
|
/* Enable the interrupt - this is okay as interrupt are currently globally disabled. */
|
|
ucLowByte = portTIMSK;
|
|
ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE;
|
|
portTIMSK = ucLowByte;
|
|
}
|
|
|
|
#endif
|
|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if configUSE_PREEMPTION == 1
|
|
|
|
/*
|
|
* Tick ISR for preemptive scheduler. We can use a naked attribute as
|
|
* the context is saved at the start of vPortYieldFromTick(). The tick
|
|
* count is incremented after the context is saved.
|
|
*
|
|
* use ISR_NOBLOCK where there is an important timer running, that should preempt the scheduler.
|
|
*
|
|
*/
|
|
ISR(portSCHEDULER_ISR, ISR_NAKED) __attribute__ ((hot, flatten));
|
|
/* ISR(portSCHEDULER_ISR, ISR_NAKED ISR_NOBLOCK) __attribute__ ((hot, flatten));
|
|
*/
|
|
ISR(portSCHEDULER_ISR)
|
|
{
|
|
vPortYieldFromTick();
|
|
__asm__ __volatile__ ( "reti" );
|
|
}
|
|
#else
|
|
|
|
/*
|
|
* Tick ISR for the cooperative scheduler. All this does is increment the
|
|
* tick count. We don't need to switch context, this can only be done by
|
|
* manual calls to taskYIELD();
|
|
*
|
|
* use ISR_NOBLOCK where there is an important timer running, that should preempt the scheduler.
|
|
*/
|
|
ISR(portSCHEDULER_ISR) __attribute__ ((hot, flatten));
|
|
/* ISR(portSCHEDULER_ISR, ISR_NOBLOCK) __attribute__ ((hot, flatten));
|
|
*/
|
|
ISR(portSCHEDULER_ISR)
|
|
{
|
|
xTaskIncrementTick();
|
|
}
|
|
#endif
|
|
|
|
|