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83083a8a13
The Cortex-A53 ports are generic and can be used as a starting point for other Armv8-A application processors. Therefore, rename `ARM_CA53_64_BIT` to `Arm_AARCH64` and `ARM_CA53_64_BIT_SRE` to `Arm_AARCH64_SRE`. With this renaming, existing projects that use old port, should migrate to renamed port as follows: * `ARM_CA53_64_BIT` -> `Arm_AARCH64` * `ARM_CA53_64_BIT_SRE` -> `Arm_AARCH64_SRE` Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> |
1 year ago | |
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| .. | ||
| README.md | 1 year ago | |
README.md
ARM_CA53_64_BIT_SRE port
Initial port to support Armv8-A architecture in FreeRTOS kernel was written for Arm Cortex-A53 processor.
- ARM_CA53_64_BIT_SRE
- System Register interace to access Arm GIC registers
This port is generic and can be used as a starting point for other Armv8-A
application processors. Therefore, the port Arm_AARCH64_SRE is renamed as
Arm_AARCH64_SRE. The existing projects that use old port Arm_AARCH64_SRE,
should migrate to renamed port Arm_AARCH64_SRE.
NOTE
This port uses System Register interace to access Arm GIC registers.