You cannot select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
261 lines
10 KiB
C
261 lines
10 KiB
C
/*
|
|
FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
|
|
|
|
***************************************************************************
|
|
* *
|
|
* If you are: *
|
|
* *
|
|
* + New to FreeRTOS, *
|
|
* + Wanting to learn FreeRTOS or multitasking in general quickly *
|
|
* + Looking for basic training, *
|
|
* + Wanting to improve your FreeRTOS skills and productivity *
|
|
* *
|
|
* then take a look at the FreeRTOS books - available as PDF or paperback *
|
|
* *
|
|
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
|
|
* http://www.FreeRTOS.org/Documentation *
|
|
* *
|
|
* A pdf reference manual is also available. Both are usually delivered *
|
|
* to your inbox within 20 minutes to two hours when purchased between 8am *
|
|
* and 8pm GMT (although please allow up to 24 hours in case of *
|
|
* exceptional circumstances). Thank you for your support! *
|
|
* *
|
|
***************************************************************************
|
|
|
|
This file is part of the FreeRTOS distribution.
|
|
|
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
|
the terms of the GNU General Public License (version 2) as published by the
|
|
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
|
***NOTE*** The exception to the GPL is included to allow you to distribute
|
|
a combined work that includes FreeRTOS without being obliged to provide the
|
|
source code for proprietary components outside of the FreeRTOS kernel.
|
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
|
|
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
more details. You should have received a copy of the GNU General Public
|
|
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
|
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
|
by writing to Richard Barry, contact details for whom are available on the
|
|
FreeRTOS WEB site.
|
|
|
|
1 tab == 4 spaces!
|
|
|
|
http://www.FreeRTOS.org - Documentation, latest information, license and
|
|
contact details.
|
|
|
|
http://www.SafeRTOS.com - A version that is certified for use in safety
|
|
critical systems.
|
|
|
|
http://www.OpenRTOS.com - Commercial support, development, porting,
|
|
licensing and training services.
|
|
*/
|
|
|
|
|
|
/*-----------------------------------------------------------
|
|
* Implementation of functions defined in portable.h for the Atmel AT91R40008
|
|
* port.
|
|
*
|
|
* Components that can be compiled to either ARM or THUMB mode are
|
|
* contained in this file. The ISR routines, which can only be compiled
|
|
* to ARM mode are contained in portISR.c.
|
|
*----------------------------------------------------------*/
|
|
|
|
/* Standard includes. */
|
|
#include <stdlib.h>
|
|
|
|
/* Scheduler includes. */
|
|
#include "FreeRTOS.h"
|
|
#include "task.h"
|
|
|
|
/* Hardware specific definitions. */
|
|
#include "AT91R40008.h"
|
|
#include "pio.h"
|
|
#include "aic.h"
|
|
#include "tc.h"
|
|
|
|
/* Constants required to setup the task context. */
|
|
#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
|
#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
|
|
#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
|
|
#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
|
|
#define portTICK_PRIORITY_6 ( 6 )
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/* Setup the timer to generate the tick interrupts. */
|
|
static void prvSetupTimerInterrupt( void );
|
|
|
|
/*
|
|
* The scheduler can only be started from ARM mode, so
|
|
* vPortISRStartFirstSTask() is defined in portISR.c.
|
|
*/
|
|
extern void vPortISRStartFirstTask( void );
|
|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* Initialise the stack of a task to look exactly as if a call to
|
|
* portSAVE_CONTEXT had been called.
|
|
*
|
|
* See header file for description.
|
|
*/
|
|
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
|
{
|
|
portSTACK_TYPE *pxOriginalTOS;
|
|
|
|
pxOriginalTOS = pxTopOfStack;
|
|
|
|
/* Setup the initial stack of the task. The stack is set exactly as
|
|
expected by the portRESTORE_CONTEXT() macro. */
|
|
|
|
/* First on the stack is the return address - which in this case is the
|
|
start of the task. The offset is added to make the return address appear
|
|
as it would within an IRQ ISR. */
|
|
*pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
|
|
pxTopOfStack--;
|
|
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
|
|
pxTopOfStack--;
|
|
|
|
/* When the task starts is will expect to find the function parameter in
|
|
R0. */
|
|
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
|
|
pxTopOfStack--;
|
|
|
|
/* The last thing onto the stack is the status register, which is set for
|
|
system mode, with interrupts enabled. */
|
|
*pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
|
|
|
|
#ifdef THUMB_INTERWORK
|
|
{
|
|
/* We want the task to start in thumb mode. */
|
|
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
|
}
|
|
#endif
|
|
|
|
pxTopOfStack--;
|
|
|
|
/* Some optimisation levels use the stack differently to others. This
|
|
means the interrupt flags cannot always be stored on the stack and will
|
|
instead be stored in a variable, which is then saved as part of the
|
|
tasks context. */
|
|
*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
|
|
|
|
return pxTopOfStack;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
portBASE_TYPE xPortStartScheduler( void )
|
|
{
|
|
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
|
here already. */
|
|
prvSetupTimerInterrupt();
|
|
|
|
/* Start the first task. */
|
|
vPortISRStartFirstTask();
|
|
|
|
/* Should not get here! */
|
|
return 0;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortEndScheduler( void )
|
|
{
|
|
/* It is unlikely that the ARM port will require this function as there
|
|
is nothing to return to. */
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* Setup the tick timer to generate the tick interrupts at the required frequency.
|
|
*/
|
|
static void prvSetupTimerInterrupt( void )
|
|
{
|
|
volatile unsigned long ulDummy;
|
|
|
|
/* Enable clock to the tick timer... */
|
|
AT91C_BASE_PS->PS_PCER = portTIMER_CLK_ENABLE_BIT;
|
|
|
|
/* Stop the tick timer... */
|
|
portTIMER_REG_BASE_PTR->TC_CCR = TC_CLKDIS;
|
|
|
|
/* Start with tick timer interrupts disabled... */
|
|
portTIMER_REG_BASE_PTR->TC_IDR = 0xFFFFFFFF;
|
|
|
|
/* Clear any pending tick timer interrupts... */
|
|
ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
|
|
|
|
/* Store interrupt handler function address in tick timer vector register...
|
|
The ISR installed depends on whether the preemptive or cooperative
|
|
scheduler is being used. */
|
|
#if configUSE_PREEMPTION == 1
|
|
{
|
|
extern void ( vPreemptiveTick )( void );
|
|
AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( unsigned long ) vPreemptiveTick;
|
|
}
|
|
#else // else use cooperative scheduler
|
|
{
|
|
extern void ( vNonPreemptiveTick )( void );
|
|
AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( unsigned long ) vNonPreemptiveTick;
|
|
}
|
|
#endif
|
|
|
|
/* Tick timer interrupt level-sensitive, priority 6... */
|
|
AT91C_BASE_AIC->AIC_SMR[ portTIMER_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | portTICK_PRIORITY_6;
|
|
|
|
/* Enable the tick timer interrupt...
|
|
|
|
First at timer level */
|
|
portTIMER_REG_BASE_PTR->TC_IER = TC_CPCS;
|
|
|
|
/* Then at the AIC level. */
|
|
AT91C_BASE_AIC->AIC_IECR = (1 << portTIMER_AIC_CHANNEL);
|
|
|
|
/* Calculate timer compare value to achieve the desired tick rate... */
|
|
if( (configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 2) ) <= 0xFFFF )
|
|
{
|
|
/* The tick rate is fast enough for us to use the faster timer input
|
|
clock (main clock / 2). */
|
|
portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK2 | TC_BURST_NONE | TC_CPCTRG;
|
|
portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 2);
|
|
}
|
|
else
|
|
{
|
|
/* We must use a slower timer input clock (main clock / 8) because the
|
|
tick rate is too slow for the faster input clock. */
|
|
portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK8 | TC_BURST_NONE | TC_CPCTRG;
|
|
portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 8);
|
|
}
|
|
|
|
/* Start tick timer... */
|
|
portTIMER_REG_BASE_PTR->TC_CCR = TC_SWTRG | TC_CLKEN;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|