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359 lines
11 KiB
C
359 lines
11 KiB
C
/*
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FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* FreeRTOS tutorial books are available in pdf and paperback. *
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* Complete, revised, and edited pdf reference manuals are also *
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* available. *
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* *
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* Purchasing FreeRTOS documentation will not only help you, by *
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* ensuring you get running as quickly as possible and with an *
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* in-depth knowledge of how to use FreeRTOS, it will also help *
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* the FreeRTOS project to continue with its mission of providing *
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* professional grade, cross platform, de facto standard solutions *
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* for microcontrollers - completely free of charge! *
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* *
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* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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* *
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* Thank you for using FreeRTOS, and thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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>>>NOTE<<< The modification to the GPL is included to allow you to
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distribute a combined work that includes FreeRTOS without being obliged to
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provide the source code for proprietary components outside of the FreeRTOS
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kernel. FreeRTOS is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM CM4F port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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#ifndef __TARGET_FPU_VFP
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#error This port can only be used when the project options are configured to enable hardware floating point support.
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#endif
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/* Constants required to manipulate the NVIC. */
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#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )
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#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )
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#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )
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#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )
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#define portNVIC_SYSTICK_CLK 0x00000004
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#define portNVIC_SYSTICK_INT 0x00000002
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#define portNVIC_SYSTICK_ENABLE 0x00000001
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#define portNVIC_PENDSVSET 0x10000000
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#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
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#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
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/* Constants required to manipulate the VFP. */
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#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */
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#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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#define portINITIAL_EXEC_RETURN ( 0xfffffffd )
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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/*
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* Setup the timer to generate the tick interrupts.
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*/
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static void prvSetupTimerInterrupt( void );
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/*
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* Exception handlers.
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*/
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void xPortPendSVHandler( void );
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void xPortSysTickHandler( void );
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void vPortSVCHandler( void );
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/*
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* Start first task is a separate function so it can be tested in isolation.
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*/
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static void prvStartFirstTask( void );
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/*
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* Functions defined in portasm.s to enable the VFP.
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*/
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static void prvEnableVFP( void );
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* Simulate the stack frame as it would be created by a context switch
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interrupt. */
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/* Offset added to account for the way the MCU uses the stack on entry/exit
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of interrupts, and to ensure alignment. */
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pxTopOfStack -= 2;
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = 0; /* LR */
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/* Save code space by skipping register initialisation. */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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/* A save method is being used that requiers each task to maintain its
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own exec return value. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_EXEC_RETURN;
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pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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__asm void vPortSVCHandler( void )
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{
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PRESERVE8
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/* Get the location of the current TCB. */
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ldr r3, =pxCurrentTCB
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ldr r1, [r3]
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ldr r0, [r1]
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/* Pop the core registers. */
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ldmia r0!, {r4-r11, r14}
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msr psp, r0
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mov r0, #0
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msr basepri, r0
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bx r14
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}
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/*-----------------------------------------------------------*/
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__asm void prvStartFirstTask( void )
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{
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PRESERVE8
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/* Use the NVIC offset register to locate the stack. */
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ldr r0, =0xE000ED08
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ldr r0, [r0]
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ldr r0, [r0]
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/* Set the msp back to the start of the stack. */
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msr msp, r0
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/* Globally enable interrupts. */
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cpsie i
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/* Call SVC to start the first task. */
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svc 0
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nop
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}
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/*-----------------------------------------------------------*/
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__asm void prvEnableVFP( void )
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{
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PRESERVE8
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/* The FPU enable bits are in the CPACR. */
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ldr.w r0, =0xE000ED88
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ldr r1, [r0]
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/* Enable CP10 and CP11 coprocessors, then save back. */
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orr r1, r1, #( 0xf << 20 )
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str r1, [r0]
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bx r14
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nop
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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/* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
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*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Initialise the critical nesting count ready for the first task. */
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uxCriticalNesting = 0;
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/* Ensure the VFP is enabled - it should be anyway. */
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prvEnableVFP();
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/* Lazy save always. */
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*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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/* Start the first task. */
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prvStartFirstTask();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the CM4F port will require this function as there
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is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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void vPortYieldFromISR( void )
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{
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/* Set a PendSV to request a context switch. */
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*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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}
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/*-----------------------------------------------------------*/
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__asm void xPortPendSVHandler( void )
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{
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extern uxCriticalNesting;
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extern pxCurrentTCB;
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extern vTaskSwitchContext;
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PRESERVE8
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mrs r0, psp
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/* Get the location of the current TCB. */
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ldr r3, =pxCurrentTCB
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ldr r2, [r3]
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/* Is the task using the FPU context? If so, push high vfp registers. */
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tst r14, #0x10
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it eq
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vstmdbeq r0!, {s16-s31}
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/* Save the core registers. */
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stmdb r0!, {r4-r11, r14}
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/* Save the new top of stack into the first member of the TCB. */
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str r0, [r2]
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stmdb sp!, {r3, r14}
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mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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msr basepri, r0
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bl vTaskSwitchContext
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mov r0, #0
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msr basepri, r0
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ldmia sp!, {r3, r14}
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/* The first item in pxCurrentTCB is the task top of stack. */
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ldr r1, [r3]
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ldr r0, [r1]
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/* Pop the core registers. */
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ldmia r0!, {r4-r11, r14}
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/* Is the task using the FPU context? If so, pop the high vfp registers
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too. */
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tst r14, #0x10
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it eq
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vldmiaeq r0!, {s16-s31}
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msr psp, r0
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bx r14
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nop
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}
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/*-----------------------------------------------------------*/
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void xPortSysTickHandler( void )
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{
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unsigned long ulDummy;
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/* If using preemption, also force a context switch. */
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#if configUSE_PREEMPTION == 1
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*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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#endif
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ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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{
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vTaskIncrementTick();
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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}
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/*-----------------------------------------------------------*/
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/*
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* Setup the systick timer to generate the tick interrupts at the required
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* frequency.
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*/
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void prvSetupTimerInterrupt( void )
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{
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/* Configure SysTick to interrupt at the requested rate. */
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*(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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}
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/*-----------------------------------------------------------*/
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__asm void vPortSetInterruptMask( void )
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{
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PRESERVE8
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mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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msr basepri, r0
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bx r14
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}
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/*-----------------------------------------------------------*/
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__asm void vPortClearInterruptMask( void )
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{
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PRESERVE8
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mov r0, #0
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msr basepri, r0
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bx r14
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}
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