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221 lines
9.3 KiB
C
221 lines
9.3 KiB
C
/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* *INDENT-ON* */
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/*-----------------------------------------------------------
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the given hardware
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* and compiler.
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*
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* These settings should not be altered.
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*-----------------------------------------------------------
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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/*-----------------------------------------------------------*/
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/* Task utilities. */
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/* Called at the end of an ISR that can cause a context switch. */
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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{ \
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extern uint32_t ulPortYieldRequired; \
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\
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if( xSwitchRequired != pdFALSE ) \
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{ \
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ulPortYieldRequired = pdTRUE; \
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} \
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}
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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#define portYIELD() __asm volatile ( "SWI 0" ::: "memory" );
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/*-----------------------------------------------------------
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* Critical section control
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*----------------------------------------------------------*/
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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extern uint32_t ulPortSetInterruptMask( void );
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extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
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extern void vPortInstallFreeRTOSVectorTable( void );
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/*
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* These macros do not globally disable/enable interrupts. They do mask off
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* interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY.
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*/
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#define portENTER_CRITICAL() vPortEnterCritical();
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#define portEXIT_CRITICAL() vPortExitCritical();
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#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
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#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( x )
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/*-----------------------------------------------------------*/
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/*
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* Task function macros as described on the FreeRTOS.org WEB site. These are
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* not required for this port but included in case common demo code that uses these
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* macros is used.
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*/
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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/*
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* Prototype of the FreeRTOS tick handler. This must be installed as the
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* handler for whichever peripheral is used to generate the RTOS tick.
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*/
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void FreeRTOS_Tick_Handler( void );
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/*
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* If configUSE_TASK_FPU_SUPPORT is set to 1, then tasks are created without an
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* FPU context and must call vPortTaskUsesFPU() to allocate an FPU context
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* prior to any FPU instructions. If configUSE_TASK_FPU_SUPPORT is set to 2,
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* then all tasks have an FPU context allocated by default.
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*/
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#if ( configUSE_TASK_FPU_SUPPORT == 1 )
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void vPortTaskUsesFPU( void );
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#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
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#elif ( configUSE_TASK_FPU_SUPPORT == 2 )
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/*
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* Each task has an FPU context already, so define this function away to
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* prevent it being called accidentally.
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*/
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#define vPortTaskUsesFPU()
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#define portTASK_USES_FLOATING_POINT()
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#endif /* configUSE_TASK_FPU_SUPPORT */
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#define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
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#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
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/* Architecture specific optimisations. */
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#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#endif
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Store/clear the ready priorities in a bit map. */
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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/*-----------------------------------------------------------*/
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) )
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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#ifdef configASSERT
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void vPortValidateInterruptPriority( void );
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#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
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#endif /* configASSERT */
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#define portNOP() __asm volatile ( "NOP" )
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/*
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* The number of bits to shift for an interrupt priority is dependent on the
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* number of bits implemented by the interrupt controller.
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*/
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#if configUNIQUE_INTERRUPT_PRIORITIES == 16
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#define portPRIORITY_SHIFT 4
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#define portMAX_BINARY_POINT_VALUE 3
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#elif configUNIQUE_INTERRUPT_PRIORITIES == 32
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#define portPRIORITY_SHIFT 3
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#define portMAX_BINARY_POINT_VALUE 2
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#elif configUNIQUE_INTERRUPT_PRIORITIES == 64
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#define portPRIORITY_SHIFT 2
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#define portMAX_BINARY_POINT_VALUE 1
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#elif configUNIQUE_INTERRUPT_PRIORITIES == 128
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#define portPRIORITY_SHIFT 1
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#define portMAX_BINARY_POINT_VALUE 0
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#elif configUNIQUE_INTERRUPT_PRIORITIES == 256
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#define portPRIORITY_SHIFT 0
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#define portMAX_BINARY_POINT_VALUE 0
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#else /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */
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#error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
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#endif /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */
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/* Interrupt controller access addresses. */
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#define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )
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#define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C )
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#define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 )
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#define portICCBPR_BINARY_POINT_OFFSET ( 0x08 )
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#define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 )
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#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
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#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
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#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
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#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
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#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
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#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )
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#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )
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#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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} /* extern C */
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#endif
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/* *INDENT-ON* */
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#endif /* PORTMACRO_H */
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