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293 lines
12 KiB
C
293 lines
12 KiB
C
/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*-----------------------------------------------------------
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the given hardware
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* and compiler.
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*
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* These settings should not be altered.
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*-----------------------------------------------------------
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( ( TickType_t ) 0xffffffffUL )
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 32
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/*-----------------------------------------------------------*/
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/* Task utilities. */
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/* The interrupt priority (for vectors 16 to 255) is determined using vector/16.
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The quotient is rounded to the nearest integer with 1 being the lowest priority
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and 15 is the highest. Therefore the following two interrupts are at the lowest
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priority. *NOTE 1* If the yield vector is changed then it must also be changed
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in the portYIELD_INTERRUPT definition immediately below. */
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#define portAPIC_TIMER_INT_VECTOR ( 0x21 )
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#define portAPIC_YIELD_INT_VECTOR ( 0x20 )
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/* Build yield interrupt instruction. */
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#define portYIELD_INTERRUPT "int $0x20"
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/* APIC register addresses. */
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#define portAPIC_EOI ( *( ( volatile uint32_t * ) 0xFEE000B0UL ) )
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/* APIC bit definitions. */
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#define portAPIC_ENABLE_BIT ( 1UL << 8UL )
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#define portAPIC_TIMER_PERIODIC ( 1UL << 17UL )
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#define portAPIC_DISABLE ( 1UL << 16UL )
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#define portAPIC_NMI ( 4 << 8)
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#define portAPIC_DIV_16 ( 0x03 )
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/* Define local API register addresses. */
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#define portAPIC_ID_REGISTER ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x20UL ) ) )
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#define portAPIC_SPURIOUS_INT ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0xF0UL ) ) )
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#define portAPIC_LVT_TIMER ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x320UL ) ) )
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#define portAPIC_TIMER_INITIAL_COUNT ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x380UL ) ) )
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#define portAPIC_TIMER_CURRENT_COUNT ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x390UL ) ) )
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#define portAPIC_TASK_PRIORITY ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x80UL ) ) )
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#define portAPIC_LVT_ERROR ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x370UL ) ) )
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#define portAPIC_ERROR_STATUS ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x280UL ) ) )
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#define portAPIC_LDR ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0xD0UL ) ) )
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#define portAPIC_TMRDIV ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x3E0UL ) ) )
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#define portAPIC_LVT_PERF ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x340UL ) ) )
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#define portAPIC_LVT_LINT0 ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x350UL ) ) )
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#define portAPIC_LVT_LINT1 ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x360UL ) ) )
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/* Don't yield if inside a critical section - instead hold the yield pending
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so it is performed when the critical section is exited. */
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#define portYIELD() \
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{ \
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extern volatile uint32_t ulCriticalNesting; \
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extern volatile uint32_t ulPortYieldPending; \
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if( ulCriticalNesting != 0 ) \
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{ \
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ulPortYieldPending = pdTRUE; \
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} \
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else \
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{ \
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__asm volatile( portYIELD_INTERRUPT ); \
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} \
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}
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/* Called at the end of an ISR that can cause a context switch - pend a yield if
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xSwithcRequired is not false. */
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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{ \
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extern volatile uint32_t ulPortYieldPending; \
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if( xSwitchRequired != pdFALSE ) \
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{ \
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ulPortYieldPending = 1; \
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} \
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}
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/* Same as portEND_SWITCHING_ISR() - take your pick which name to use. */
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------
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* Critical section control
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*----------------------------------------------------------*/
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/* Critical sections for use in interrupts. */
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask( x )
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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extern uint32_t ulPortSetInterruptMask( void );
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extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
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/* These macros do not globally disable/enable interrupts. They do mask off
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interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#define portDISABLE_INTERRUPTS() __asm volatile( "cli" )
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#define portENABLE_INTERRUPTS() __asm volatile( "sti" )
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/*-----------------------------------------------------------*/
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/* Task function macros as described on the FreeRTOS.org WEB site. These are
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not required for this port but included in case common demo code that uses these
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macros is used. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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/* Architecture specific optimisations. */
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Store/clear the ready priorities in a bit map. */
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) \
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__asm volatile( "bsr %1, %0\n\t" \
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:"=r"(uxTopPriority) : "rm"(uxReadyPriorities) : "cc" )
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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#define portNOP() __asm volatile( "NOP" )
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/*-----------------------------------------------------------
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* Misc
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*----------------------------------------------------------*/
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#define portNUM_VECTORS 256
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#define portMAX_PRIORITY 15
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typedef void ( *ISR_Handler_t ) ( void );
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/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
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before any floating point instructions are executed. */
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#ifndef configSUPPORT_FPU
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#define configSUPPORT_FPU 0
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#endif
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#if configSUPPORT_FPU == 1
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void vPortTaskUsesFPU( void );
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#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
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#endif
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/* See the comments under the configUSE_COMMON_INTERRUPT_ENTRY_POINT definition
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below. */
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BaseType_t xPortRegisterCInterruptHandler( ISR_Handler_t pxHandler, uint32_t ulVectorNumber );
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BaseType_t xPortInstallInterruptHandler( ISR_Handler_t pxHandler, uint32_t ulVectorNumber );
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#ifndef configAPIC_BASE
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/* configAPIC_BASE_ADDRESS sets the base address of the local APIC. It can
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be overridden in FreeRTOSConfig.h should it not be constant. */
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#define configAPIC_BASE 0xFEE00000UL
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#endif
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#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
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/* The FreeRTOS scheduling algorithm selects the task that will enter the
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Running state. configUSE_PORT_OPTIMISED_TASK_SELECTION is used to set how
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that is done.
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If configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 0 then the task to
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enter the Running state is selected using a portable algorithm written in
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C. This is the slowest method, but the algorithm does not restrict the
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maximum number of unique RTOS task priorities that are available.
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If configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 then the task to
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enter the Running state is selected using a single assembly instruction.
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This is the fastest method, but restricts the maximum number of unique RTOS
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task priorities to 32 (the same task priority can be assigned to any number
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of RTOS tasks). */
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#warning configUSE_PORT_OPTIMISED_TASK_SELECTION was not defined in FreeRTOSConfig.h and has been defaulted to 1
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#endif
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#ifndef configUSE_COMMON_INTERRUPT_ENTRY_POINT
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/* There are two ways of implementing interrupt handlers:
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1) As standard C functions -
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This method can only be used if configUSE_COMMON_INTERRUPT_ENTRY_POINT
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is set to 1. The C function is installed using
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xPortRegisterCInterruptHandler().
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This is the simplest of the two methods but incurs a slightly longer
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interrupt entry time.
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2) By using an assembly stub that wraps the handler in the FreeRTOS
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portFREERTOS_INTERRUPT_ENTRY and portFREERTOS_INTERRUPT_EXIT macros.
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This method can always be used. It is slightly more complex than
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method 1 but benefits from a faster interrupt entry time. */
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#warning configUSE_COMMON_INTERRUPT_ENTRY_POINT was not defined in FreeRTOSConfig.h and has been defaulted to 1.
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#define configUSE_COMMON_INTERRUPT_ENTRY_POINT 1
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#endif
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#ifndef configISR_STACK_SIZE
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/* Interrupt entry code will switch the stack in use to a dedicated system
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stack.
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configISR_STACK_SIZE defines the number of 32-bit values that can be stored
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on the system stack, and must be large enough to hold a potentially nested
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interrupt stack frame. */
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#error configISR_STACK_SIZE was not defined in FreeRTOSConfig.h.
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#endif
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#ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
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/* Interrupt safe FreeRTOS functions (those that end in "FromISR" must not
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be called from an interrupt that has a priority above that set by
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configMAX_API_CALL_INTERRUPT_PRIORITY. */
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#warning configMAX_API_CALL_INTERRUPT_PRIORITY was not defined in FreeRTOSConfig.h and has been defaulted to 10
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#define configMAX_API_CALL_INTERRUPT_PRIORITY 10
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#endif
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#ifndef configSUPPORT_FPU
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#warning configSUPPORT_FPU was not defined in FreeRTOSConfig.h and has been defaulted to 0
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#define configSUPPORT_FPU 0
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#endif
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/* The value written to the task priority register to raise the interrupt mask
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to the maximum from which FreeRTOS API calls can be made. */
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#define portAPIC_PRIORITY_SHIFT ( 4UL )
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#define portAPIC_MAX_SUB_PRIORITY ( 0x0fUL )
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#define portMAX_API_CALL_PRIORITY ( ( configMAX_API_CALL_INTERRUPT_PRIORITY << portAPIC_PRIORITY_SHIFT ) | portAPIC_MAX_SUB_PRIORITY )
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/* Asserts if interrupt safe FreeRTOS functions are called from a priority
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above the max system call interrupt priority. */
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#define portAPIC_PROCESSOR_PRIORITY ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0xA0UL ) ) )
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#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( portAPIC_PROCESSOR_PRIORITY ) <= ( portMAX_API_CALL_PRIORITY ) )
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#ifdef __cplusplus
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} /* extern C */
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#endif
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#endif /* PORTMACRO_H */
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