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/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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* File Name : 75x_dma.c
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* Author : MCD Application Team
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* Date First Issued : 03/10/2006
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* Description : This file provides all the DMA software functions.
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********************************************************************************
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* History:
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* 07/17/2006 : V1.0
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* 03/10/2006 : V0.1
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "75x_dma.h"
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#include "75x_mrcc.h"
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* DMA enable */
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#define DMA_Enable 0x0001
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#define DMA_Disable 0xFFFE
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/* DMA Last Buffer Sweep */
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#define DMA_Last0_Enable_Mask 0x0001
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#define DMA_Last0_Disable_Mask 0xFFFE
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#define DMA_Last1_Enable_Mask 0x0002
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#define DMA_Last1_Disable_Mask 0xFFFD
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#define DMA_Last2_Enable_Mask 0x0004
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#define DMA_Last2_Disable_Mask 0xFFFB
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#define DMA_Last3_Enable_Mask 0x0008
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#define DMA_Last3_Disable_Mask 0xFFF7
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/* DMA Masks */
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#define DMA_Stream0_MASK_Mask 0xFFEE
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#define DMA_Stream0_CLR_Mask 0x0011
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#define DMA_Stream0_LAST_Mask 0xFFFE
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#define DMA_Stream1_MASK_Mask 0xFFDD
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#define DMA_Stream1_CLR_Mask 0x0022
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#define DMA_Stream1_LAST_Mask 0xFFFD
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#define DMA_Stream2_MASK_Mask 0xFFBB
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#define DMA_Stream2_CLR_Mask 0x0044
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#define DMA_Stream2_LAST_Mask 0xFFFB
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#define DMA_Stream3_MASK_Mask 0xFF77
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#define DMA_Stream3_CLR_Mask 0x0088
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#define DMA_Stream3_LAST_Mask 0xFFF7
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#define DMA_SRCSize_Mask 0xFFE7
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#define DMA_SRCBurst_Mask 0xFF9F
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#define DMA_DSTSize_Mask 0xFE7F
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/*******************************************************************************
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* Function Name : DMA_DeInit
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* Description : Deinitializes the DMA streamx registers to their default reset
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* values.
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* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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* Stream.
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* Output : None
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* Return : None
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*******************************************************************************/
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void DMA_DeInit(DMA_Stream_TypeDef* DMA_Streamx)
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{
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/* Reset streamx source base address register */
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DMA_Streamx->SOURCEL = 0;
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DMA_Streamx->SOURCEH = 0;
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/* Reset streamx destination base address register */
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DMA_Streamx->DESTL = 0;
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DMA_Streamx->DESTH = 0;
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/* Reset streamx maximum count register */
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DMA_Streamx->MAX = 0;
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/* Reset streamx control register */
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DMA_Streamx->CTRL = 0;
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/* Reset streamx last used buffer location register */
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DMA_Streamx->LUBUFF = 0;
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switch(*(u32*)&DMA_Streamx)
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{
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case DMA_Stream0_BASE:
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/* Reset interrupt mask, clear and flag bits for stream0 */
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DMA->MASK &= DMA_Stream0_MASK_Mask;
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DMA->CLR |= DMA_Stream0_CLR_Mask;
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DMA->LAST &= DMA_Stream0_LAST_Mask;
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break;
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case DMA_Stream1_BASE:
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/* Reset interrupt mask, clear and flag bits for stream1 */
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DMA->MASK &= DMA_Stream1_MASK_Mask;
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DMA->CLR |= DMA_Stream1_CLR_Mask;
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DMA->LAST &= DMA_Stream1_LAST_Mask;
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break;
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case DMA_Stream2_BASE:
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/* Reset interrupt mask, clear and flag bits for stream2 */
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DMA->MASK &= DMA_Stream2_MASK_Mask;
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DMA->CLR |= DMA_Stream2_CLR_Mask;
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DMA->LAST &= DMA_Stream2_LAST_Mask;
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break;
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case DMA_Stream3_BASE:
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/* Reset interrupt mask, clear and flag bits for stream3 */
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DMA->MASK &= DMA_Stream3_MASK_Mask;
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DMA->CLR |= DMA_Stream3_CLR_Mask;
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DMA->LAST &= DMA_Stream3_LAST_Mask;
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break;
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default:
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break;
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}
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}
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/*******************************************************************************
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* Function Name : DMA_Init
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* Description : Initializes the DMAx stream according to the specified
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* parameters in the DMA_InitStruct.
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* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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* Stream.
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* - DMA_InitStruct: pointer to a DMA_InitTypeDef structure that
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* contains the configuration information for the specified
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* DMA stream.
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* Output : None
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* Return : None
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******************************************************************************/
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void DMA_Init(DMA_Stream_TypeDef* DMA_Streamx, DMA_InitTypeDef* DMA_InitStruct)
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{
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/* set the buffer Size */
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DMA_Streamx->MAX = DMA_InitStruct->DMA_BufferSize ;
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/* Configure the incrementation of the current source Register */
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if(DMA_InitStruct->DMA_SRC == DMA_SRC_INCR)
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{
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/* Increment current source register */
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DMA_Streamx->CTRL |= DMA_SRC_INCR;
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}
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else
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{
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/* Current source register unchanged */
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DMA_Streamx->CTRL &= DMA_SRC_NOT_INCR;
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}
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/* Configure the incrementation of the current destination Register */
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if(DMA_InitStruct->DMA_DST == DMA_DST_INCR)
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{
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/* Increment current source register */
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DMA_Streamx->CTRL |= DMA_DST_INCR;
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}
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else
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{
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/* Current source register unchanged */
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DMA_Streamx->CTRL &= DMA_DST_NOT_INCR;
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}
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/* Clear source to DMA data width SOSIZE[1:0] bits */
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DMA_Streamx->CTRL &= DMA_SRCSize_Mask;
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/* Set the source to DMA data width */
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DMA_Streamx->CTRL |= DMA_InitStruct->DMA_SRCSize;
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/* Clear the DMA peripheral burst size SOBURST[1:0] bits */
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DMA_Streamx->CTRL &= DMA_SRCBurst_Mask;
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/* Set the DMA peripheral burst size */
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DMA_Streamx->CTRL |= DMA_InitStruct->DMA_SRCBurst;
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/* Clear destination to DMA dat width DESIZE[1:0] bits */
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DMA_Streamx->CTRL &= DMA_DSTSize_Mask;
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/* Set the destination to DMA data width */
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DMA_Streamx->CTRL |= DMA_InitStruct->DMA_DSTSize;
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/* Configure the circular mode */
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if(DMA_InitStruct->DMA_Mode == DMA_Mode_Circular)
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{
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/* Set circular mode */
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DMA_Streamx->CTRL |= DMA_Mode_Circular;
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}
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else
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{
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/* Set normal mode */
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DMA_Streamx->CTRL &= DMA_Mode_Normal;
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}
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/* Configure the direction transfer */
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if(DMA_InitStruct->DMA_DIR == DMA_DIR_PeriphDST)
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{
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/* Set peripheral as destination */
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DMA_Streamx->CTRL |= DMA_DIR_PeriphDST;
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}
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else
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{
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/* Set peripheral as source */
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DMA_Streamx->CTRL &= DMA_DIR_PeriphSRC;
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}
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/* Configure the memory to memory transfer only for stream3 */
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if(DMA_Streamx == DMA_Stream3)
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{
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if(DMA_InitStruct->DMA_M2M == DMA_M2M_Enable)
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{
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/* Enable memory to memory transfer for stream3 */
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DMA_Streamx->CTRL |= DMA_M2M_Enable;
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}
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else
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{
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/* Disable memory to memory transfer for stream3 */
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DMA_Streamx->CTRL &= DMA_M2M_Disable;
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}
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}
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/* Configure the source base address */
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DMA_Streamx->SOURCEL = DMA_InitStruct->DMA_SRCBaseAddr;
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DMA_Streamx->SOURCEH = DMA_InitStruct->DMA_SRCBaseAddr >> 16;
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/* Configure the destination base address */
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DMA_Streamx->DESTL = DMA_InitStruct->DMA_DSTBaseAddr;
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DMA_Streamx->DESTH = DMA_InitStruct->DMA_DSTBaseAddr >> 16;
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}
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/*******************************************************************************
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* Function Name : DMA_StructInit
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* Description : Fills each DMA_InitStruct member with its default value.
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* Input : DMA_InitStruct : pointer to a DMA_InitTypeDef structure
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* which will be initialized.
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* Output : None
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* Return : None
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*******************************************************************************/
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void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct)
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{
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/* Initialize the DMA_BufferSize member */
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DMA_InitStruct->DMA_BufferSize = 0;
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/* initialize the DMA_SRCBaseAddr member */
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DMA_InitStruct->DMA_SRCBaseAddr = 0;
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/* Initialize the DMA_DSTBaseAddr member */
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DMA_InitStruct ->DMA_DSTBaseAddr = 0;
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/* Initialize the DMA_SRC member */
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DMA_InitStruct->DMA_SRC = DMA_SRC_NOT_INCR;
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/* Initialize the DMA_DST member */
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DMA_InitStruct->DMA_DST = DMA_DST_NOT_INCR;
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/* Initialize the DMA_SRCSize member */
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DMA_InitStruct->DMA_SRCSize = DMA_SRCSize_Byte;
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/* Initialize the DMA_SRCBurst member */
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DMA_InitStruct->DMA_SRCBurst = DMA_SRCBurst_1Data;
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/* Initialize the DMA_DSTSize member */
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DMA_InitStruct->DMA_DSTSize = DMA_DSTSize_Byte;
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/* Initialize the DMA_Mode member */
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DMA_InitStruct->DMA_Mode = DMA_Mode_Normal;
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/* Initialize the DMA_M2M member */
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DMA_InitStruct->DMA_M2M = DMA_M2M_Disable;
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/* Initialize the DMA_DIR member */
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DMA_InitStruct->DMA_DIR = DMA_DIR_PeriphSRC;
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}
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/*******************************************************************************
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* Function Name : DMA_Cmd
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* Description : Enables or disables the specified DMA stream.
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* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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* Stream.
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* - NewState: new state of the DMAx stream. This parameter can
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* be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void DMA_Cmd(DMA_Stream_TypeDef* DMA_Streamx, FunctionalState NewState)
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{
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if(NewState == ENABLE)
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{
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/* Enable the selected DMA streamx */
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DMA_Streamx->CTRL |= DMA_Enable;
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}
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else
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{
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/* Disable the selected DMA streamx */
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DMA_Streamx->CTRL &= DMA_Disable;
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}
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}
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/*******************************************************************************
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* Function Name : DMA_ITConfig
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* Description : Enables or disables the specified DMA interrupts.
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* Input : - DMA_IT: specifies the DMA interrupts sources to be enabled
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* or disabled. This parameter can be any combination of the
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* following values:
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* - DMA_IT_SI0: Stream0 transfer end interrupt mask
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* - DMA_IT_SI1: Stream1 transfer end interrupt mask
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* - DMA_IT_SI2: Stream2 transfer end interrupt mask
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* - DMA_IT_SI3: Stream3 transfer end interrupt mask
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* - DMA_IT_SE0: Stream0 transfer error interrupt mask
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* - DMA_IT_SE1: Stream1 transfer error interrupt mask
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* - DMA_IT_SE2: Stream2 transfer error interrupt mask
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* - DMA_IT_SE3: Stream3 transfer error interrupt mask
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* - DMA_IT_ALL: ALL DMA interrupts mask
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* - NewState: new state of the specified DMA interrupts.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void DMA_ITConfig(u16 DMA_IT, FunctionalState NewState)
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{
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if(NewState == ENABLE)
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{
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/* Enable the selected DMA interrupts */
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DMA->MASK |= DMA_IT;
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}
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else
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{
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/* Disable the selected DMA interrupts */
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DMA->MASK &= ~DMA_IT;
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}
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}
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/*******************************************************************************
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* Function Name : DMA_GetCurrDSTAddr
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* Description : Returns the current value of the destination address pointer
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* related to the specified DMA stream.
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* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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* Stream.
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* Output : None
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* Return : The current value of the destination address pointer related
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* to the specified DMA stream.
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*******************************************************************************/
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u32 DMA_GetCurrDSTAddr(DMA_Stream_TypeDef* DMA_Streamx)
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{
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u32 Tmp = 0;
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/* Get high current destination address */
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Tmp = (DMA_Streamx->DECURRH)<<16;
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/* Get low current destination address */
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Tmp |= DMA_Streamx->DECURRL;
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/* Return the current destination address value for streamx */
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return Tmp;
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}
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/*******************************************************************************
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* Function Name : DMA_GetCurrSRCAddr
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* Description : Returns the current value of the source address pointer
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* related to the specified DMA stream.
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* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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* Stream.
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* Output : None
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* Return : The current value of the source address pointer related to
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* the specified DMA stream.
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*******************************************************************************/
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u32 DMA_GetCurrSRCAddr(DMA_Stream_TypeDef* DMA_Streamx)
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{
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u32 Tmp = 0;
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/* Get high current source address */
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Tmp = (DMA_Streamx->SOCURRH)<<16;
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/* Get slow current source address */
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Tmp |= DMA_Streamx->SOCURRL;
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/* Return the current source address value for streamx */
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return Tmp;
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}
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/*******************************************************************************
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* Function Name : DMA_GetTerminalCounter
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* Description : Returns the number of data units remaining in the current
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* DMA stream transfer.
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* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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* Stream.
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* Output : None
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* Return : The number of data units remaining in the current DMA stream
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* transfer.
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*******************************************************************************/
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u16 DMA_GetTerminalCounter(DMA_Stream_TypeDef* DMA_Streamx)
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{
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/* Return the terminal counter value for streamx */
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return(DMA_Streamx->TCNT);
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}
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/*******************************************************************************
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* Function Name : DMA_LastBufferSweepConfig
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* Description : Activates or disactivates the last buffer sweep mode for the
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* DMA streamx configured in circular buffer mode.
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* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
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* Stream.
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* - NewState: new state of the Last buffer sweep DMA_Streamx.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void DMA_LastBufferSweepConfig(DMA_Stream_TypeDef* DMA_Streamx, FunctionalState NewState)
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{
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switch(*(u32*)&DMA_Streamx)
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{
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case DMA_Stream0_BASE:
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if(NewState == ENABLE)
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{
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/* Activates the last circular buffer sweep mode for stream0 */
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DMA->LAST |= DMA_Last0_Enable_Mask;
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}
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else
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{
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/* Disactivates the last circular buffer sweep mode for stream0 */
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DMA->LAST &= DMA_Last0_Disable_Mask;
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}
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break;
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case DMA_Stream1_BASE:
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if(NewState == ENABLE)
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{
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/* Activates the last circular buffer sweep mode for stream1 */
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DMA->LAST |= DMA_Last1_Enable_Mask;
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}
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else
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{
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/* Disactivates the last circular buffer sweep mode for stream1 */
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DMA->LAST &= DMA_Last1_Disable_Mask;
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}
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|
break;
|
|
|
|
|
|
case DMA_Stream2_BASE:
|
|
|
if(NewState == ENABLE)
|
|
|
{
|
|
|
/* Activates the last circular buffer sweep mode for stream2 */
|
|
|
DMA->LAST |= DMA_Last2_Enable_Mask;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
/* Disactivates the last circular buffer sweep mode for stream2 */
|
|
|
DMA->LAST &= DMA_Last2_Disable_Mask;
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case DMA_Stream3_BASE:
|
|
|
if(NewState == ENABLE)
|
|
|
{
|
|
|
/* Activates the last circular buffer sweep mode for stream3 */
|
|
|
DMA->LAST |= DMA_Last3_Enable_Mask;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
/* Disactivates the last circular buffer sweep mode for stream3 */
|
|
|
DMA->LAST &= DMA_Last3_Disable_Mask;
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
default:
|
|
|
break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : DMA_LastBufferAddrConfig
|
|
|
* Description : Configures the circular buffer position where the last data
|
|
|
* to be used by the specified DMA stream is located.
|
|
|
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
|
|
|
* Stream.
|
|
|
* - DMA_LastBufferAddr: specifies the circular buffer position
|
|
|
* where the last data to be used by the specified DMA stream
|
|
|
* is located.
|
|
|
* This member must be a number between 0 and the stream BufferSize-1.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void DMA_LastBufferAddrConfig(DMA_Stream_TypeDef* DMA_Streamx, u16 DMA_LastBufferAddr)
|
|
|
{
|
|
|
/* Set the streamx last data circular buffer location */
|
|
|
DMA_Streamx->LUBUFF = DMA_LastBufferAddr;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : DMA_GetFlagStatus
|
|
|
* Description : Checks whether the specified DMA flag is set or not.
|
|
|
* Input : - DMA_FLAG: specifies the flag to check. This parameter can
|
|
|
* be one of the following values:
|
|
|
* - DMA_FLAG_SI0: Stream0 transfer end flag.
|
|
|
* - DMA_FLAG_SI1: Stream1 transfer end flag.
|
|
|
* - DMA_FLAG_SI2: Stream2 transfer end flag.
|
|
|
* - DMA_FLAG_SI3: Stream3 transfer end flag.
|
|
|
* - DMA_FLAG_SE0: Stream0 transfer error flag.
|
|
|
* - DMA_FLAG_SE1: Stream1 transfer error flag.
|
|
|
* - DMA_FLAG_SE2: Stream2 transfer error flag.
|
|
|
* - DMA_FLAG_SE3: Stream3 transfer error flag.
|
|
|
* - DMA_FLAG_ACT0: Stream0 status.
|
|
|
* - DMA_FLAG_ACT1: Stream1 status.
|
|
|
* - DMA_FLAG_ACT2: Stream2 status.
|
|
|
* - DMA_FLAG_ACT3: Stream3 status.
|
|
|
* Output : None
|
|
|
* Return : The new state of DMA_FLAG (SET or RESET).
|
|
|
*******************************************************************************/
|
|
|
FlagStatus DMA_GetFlagStatus(u16 DMA_FLAG)
|
|
|
{
|
|
|
/* Check the status of the specified DMA flag */
|
|
|
if((DMA->STATUS & DMA_FLAG) != RESET)
|
|
|
{
|
|
|
/* Return SET if DMA_FLAG is set */
|
|
|
return SET;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
/* Return RESET if DMA_FLAG is reset */
|
|
|
return RESET;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : DMA_ClearFlag
|
|
|
* Description : Clears the DMA<4D>s pending flags.
|
|
|
* Input : - DMA_FLAG: specifies the flag to clear. This parameter can
|
|
|
* be any combination of the following values:
|
|
|
* - DMA_FLAG_SI0: Stream0 transfer end flag.
|
|
|
* - DMA_FLAG_SI1: Stream1 transfer end flag.
|
|
|
* - DMA_FLAG_SI2: Stream2 transfer end flag.
|
|
|
* - DMA_FLAG_SI3: Stream3 transfer end flag.
|
|
|
* - DMA_FLAG_SE0: Stream0 transfer error flag.
|
|
|
* - DMA_FLAG_SE1: Stream1 transfer error flag.
|
|
|
* - DMA_FLAG_SE2: Stream2 transfer error flag.
|
|
|
* - DMA_FLAG_SE3: Stream3 transfer error flag.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void DMA_ClearFlag(u16 DMA_FLAG)
|
|
|
{
|
|
|
/* Clear the selected DMA flags */
|
|
|
DMA->CLR = DMA_FLAG ;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : DMA_GetITStatus
|
|
|
* Description : Checks whether the specified DMA interrupt has occured or not.
|
|
|
* Input : - DMA_IT: specifies the DMA interrupt source to check.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - DMA_IT_SI0: Stream0 transfer end interrupt
|
|
|
* - DMA_IT_SI1: Stream1 transfer end interrupt
|
|
|
* - DMA_IT_SI2: Stream2 transfer end interrupt
|
|
|
* - DMA_IT_SI3: Stream3 transfer end interrupt
|
|
|
* - DMA_IT_SE0: Stream0 transfer error interrupt
|
|
|
* - DMA_IT_SE1: Stream1 transfer error interrupt
|
|
|
* - DMA_IT_SE2: Stream2 transfer error interrupt
|
|
|
* - DMA_IT_SE3: Stream3 transfer error interrupt
|
|
|
* Output : None
|
|
|
* Return : The new state of DMA_IT (SET or RESET).
|
|
|
*******************************************************************************/
|
|
|
ITStatus DMA_GetITStatus(u16 DMA_IT)
|
|
|
{
|
|
|
/* Check the status of the specified DMA interrupt */
|
|
|
if((DMA->STATUS & DMA_IT) != RESET)
|
|
|
{
|
|
|
/* Return SET if the DMA interrupt flag is set */
|
|
|
return SET;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
/* Return RESET if the DMA interrupt flag is reset */
|
|
|
return RESET;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : DMA_ClearITPendingBit
|
|
|
* Description : Clears the DMA<4D>s interrupt pending bits.
|
|
|
* Input : - DMA_IT: specifies the interrupt pending bit to clear.
|
|
|
* This parameter can be any combination of the following values:
|
|
|
* - DMA_IT_SI0: Stream0 transfer end interrupt.
|
|
|
* - DMA_IT_SI1: Stream1 transfer end interrupt.
|
|
|
* - DMA_IT_SI2: Stream2 transfer end interrupt.
|
|
|
* - DMA_IT_SI3: Stream3 transfer end interrupt.
|
|
|
* - DMA_IT_SE0: Stream0 transfer error interrupt.
|
|
|
* - DMA_IT_SE1: Stream1 transfer error interrupt.
|
|
|
* - DMA_IT_SE2: Stream2 transfer error interrupt.
|
|
|
* - DMA_IT_SE3: Stream3 transfer error interrupt.
|
|
|
* - DMA_IT_ALL: All DMA interrupts.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void DMA_ClearITPendingBit(u16 DMA_IT)
|
|
|
{
|
|
|
/* Clear the selected DMA interrupts pending bits */
|
|
|
DMA->CLR = DMA_IT ;
|
|
|
}
|
|
|
|
|
|
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|