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207 lines
7.9 KiB
C
207 lines
7.9 KiB
C
/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
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/*This file has been prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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* \brief EMAC abstraction layer for AVR32 UC3.
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*
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* - Compiler: GNU GCC for AVR32
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* - Supported devices: All AVR32 devices can be used.
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* - AppNote:
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support email: avr32@atmel.com
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*
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*****************************************************************************/
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/* Copyright (c) 2007, Atmel Corporation All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of ATMEL may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
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* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef AVR32_EMAC_H
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#define AVR32_EMAC_H
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#if __GNUC__
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# include <avr32/io.h>
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#elif __ICCAVR32__
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# include <avr32/iouc3a0512.h>
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#else
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# error Unknown compiler
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#endif
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#include <arch/sys_arch.h>
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#include "conf_eth.h"
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/* Receive Transfer descriptor structure */
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typedef struct _AVR32_RxTdDescriptor {
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unsigned int addr;
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union
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{
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unsigned int status;
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struct {
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unsigned int BroadCast:1;
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unsigned int MultiCast:1;
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unsigned int UniCast:1;
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unsigned int ExternalAdd:1;
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unsigned int Res1:1;
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unsigned int Sa1Match:1;
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unsigned int Sa2Match:1;
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unsigned int Sa3Match:1;
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unsigned int Sa4Match:1;
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unsigned int TypeID:1;
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unsigned int VlanTag:1;
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unsigned int PriorityTag:1;
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unsigned int VlanPriority:3;
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unsigned int Cfi:1;
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unsigned int EndOfFrame:1;
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unsigned int StartOfFrame:1;
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unsigned int Rxbuf_off:2;
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unsigned int Res0:1;
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unsigned int Length:11;
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}S_Status;
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}U_Status;
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}AVR32_RxTdDescriptor, *AVR32P_RxTdDescriptor;
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/* Transmit Transfer descriptor structure */
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typedef struct _AVR32_TxTdDescriptor {
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unsigned int addr;
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union
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{
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unsigned int status;
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struct {
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unsigned int BuffUsed:1;
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unsigned int Wrap:1;
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unsigned int TransmitError:1;
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unsigned int TransmitUnderrun:1;
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unsigned int BufExhausted:1;
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unsigned int Res1:10;
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unsigned int NoCrc:1;
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unsigned int LastBuff:1;
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unsigned int Res0:4;
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unsigned int Length:11;
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}S_Status;
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}U_Status;
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}AVR32_TxTdDescriptor, *AVR32P_TxTdDescriptor;
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#define AVR32_OWNERSHIP_BIT 0x00000001
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/* Receive status defintion */
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#define AVR32_BROADCAST_ADDR ((unsigned int) (1 << 31)) //* Broadcat address detected
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#define AVR32_MULTICAST_HASH ((unsigned int) (1 << 30)) //* MultiCast hash match
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#define AVR32_UNICAST_HASH ((unsigned int) (1 << 29)) //* UniCast hash match
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#define AVR32_EXTERNAL_ADDR ((unsigned int) (1 << 28)) //* External Address match
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#define AVR32_SA1_ADDR ((unsigned int) (1 << 26)) //* Specific address 1 match
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#define AVR32_SA2_ADDR ((unsigned int) (1 << 25)) //* Specific address 2 match
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#define AVR32_SA3_ADDR ((unsigned int) (1 << 24)) //* Specific address 3 match
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#define AVR32_SA4_ADDR ((unsigned int) (1 << 23)) //* Specific address 4 match
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#define AVR32_TYPE_ID ((unsigned int) (1 << 22)) //* Type ID match
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#define AVR32_VLAN_TAG ((unsigned int) (1 << 21)) //* VLAN tag detected
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#define AVR32_PRIORITY_TAG ((unsigned int) (1 << 20)) //* PRIORITY tag detected
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#define AVR32_VLAN_PRIORITY ((unsigned int) (7 << 17)) //* PRIORITY Mask
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#define AVR32_CFI_IND ((unsigned int) (1 << 16)) //* CFI indicator
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#define AVR32_EOF ((unsigned int) (1 << 15)) //* EOF
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#define AVR32_SOF ((unsigned int) (1 << 14)) //* SOF
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#define AVR32_RBF_OFFSET ((unsigned int) (3 << 12)) //* Receive Buffer Offset Mask
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#define AVR32_LENGTH_FRAME ((unsigned int) 0x0FFF) //* Length of frame
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/* Transmit Status definition */
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#define AVR32_TRANSMIT_OK ((unsigned int) (1 << 31)) //*
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#define AVR32_TRANSMIT_WRAP ((unsigned int) (1 << 30)) //* Wrap bit: mark the last descriptor
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#define AVR32_TRANSMIT_ERR ((unsigned int) (1 << 29)) //* RLE:transmit error
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#define AVR32_TRANSMIT_UND ((unsigned int) (1 << 28)) //* Transmit Underrun
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#define AVR32_BUF_EX ((unsigned int) (1 << 27)) //* Buffers exhausted in mid frame
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#define AVR32_TRANSMIT_NO_CRC ((unsigned int) (1 << 16)) //* No CRC will be appended to the current frame
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#define AVR32_LAST_BUFFER ((unsigned int) (1 << 15)) //*
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#define AVR32_EMAC_CLKEN 0x2
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/*
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* Initialise the EMAC driver. If successful a semaphore is returned that
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* is used by the EMAC ISR to indicate that Rx packets have been received.
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* If the initialisation fails then NULL is returned.
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*/
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xSemaphoreHandle xEMACInit( void );
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/*
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* Send ulLength bytes from pcFrom. This copies the buffer to one of the
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* EMAC Tx buffers, then indicates to the EMAC that the buffer is ready.
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* If lEndOfFrame is true then the data being copied is the end of the frame
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* and the frame can be transmitted.
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*/
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portLONG lEMACSend( portCHAR *pcFrom, unsigned portLONG ulLength, portLONG lEndOfFrame );
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/*
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* Frames can be read from the EMAC in multiple sections.
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* Read ulSectionLength bytes from the EMAC receive buffers to pcTo.
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* ulTotalFrameLength is the size of the entire frame. Generally vEMACRead
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* will be repetedly called until the sum of all the ulSectionLenths totals
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* the value of ulTotalFrameLength.
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*/
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void vEMACRead( portCHAR *pcTo, unsigned portLONG ulSectionLength, unsigned portLONG ulTotalFrameLength );
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/*
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* The EMAC driver and interrupt service routines are defined in different
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* files as the driver is compiled to THUMB, and the ISR to ARM. This function
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* simply passes the semaphore used to communicate between the two.
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*/
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void vPassEMACSemaphore( xSemaphoreHandle xCreatedSemaphore );
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/*
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* Called by the Tx interrupt, this function traverses the buffers used to
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* hold the frame that has just completed transmission and marks each as
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* free again.
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*/
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void vClearEMACTxBuffer( void );
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/*
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* Suspend on a semaphore waiting either for the semaphore to be obtained
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* or a timeout. The semaphore is used by the EMAC ISR to indicate that
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* data has been received and is ready for processing.
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*/
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void vEMACWaitForInput( void );
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/*
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* Return the length of the next frame in the receive buffers.
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*/
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unsigned portLONG ulEMACInputLength( void );
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/*
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* Set the MACB Physical address (SA1B & SA1T registers).
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*/
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void vEMACSetMACAddress(const portCHAR * EMACAddress);
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/*
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* Get the MACB Physical address (SA1B & SA1T registers).
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*/
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void vEMACGetMACAddress(portCHAR * EMACAddress);
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#endif
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