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151 lines
3.8 KiB
ArmAsm
151 lines
3.8 KiB
ArmAsm
/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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#include <FreeRTOSConfig.h>
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RSEG CODE:CODE(2)
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thumb
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EXTERN pxCurrentTCB
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EXTERN vTaskSwitchContext
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PUBLIC xPortPendSVHandler
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PUBLIC vPortSVCHandler
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PUBLIC vPortStartFirstTask
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PUBLIC vPortEnableVFP
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/*-----------------------------------------------------------*/
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xPortPendSVHandler:
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mrs r0, psp
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isb
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/* Get the location of the current TCB. */
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ldr r3, =pxCurrentTCB
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ldr r2, [r3]
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/* Is the task using the FPU context? If so, push high vfp registers. */
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tst r14, #0x10
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it eq
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vstmdbeq r0!, {s16-s31}
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/* Save the core registers. */
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stmdb r0!, {r4-r11, r14}
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/* Save the new top of stack into the first member of the TCB. */
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str r0, [r2]
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stmdb sp!, {r0, r3}
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mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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msr basepri, r0
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dsb
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isb
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bl vTaskSwitchContext
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mov r0, #0
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msr basepri, r0
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ldmia sp!, {r0, r3}
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/* The first item in pxCurrentTCB is the task top of stack. */
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ldr r1, [r3]
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ldr r0, [r1]
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/* Pop the core registers. */
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ldmia r0!, {r4-r11, r14}
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/* Is the task using the FPU context? If so, pop the high vfp registers
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too. */
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tst r14, #0x10
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it eq
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vldmiaeq r0!, {s16-s31}
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msr psp, r0
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isb
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#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
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#if WORKAROUND_PMU_CM001 == 1
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push { r14 }
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pop { pc }
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#endif
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#endif
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bx r14
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/*-----------------------------------------------------------*/
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vPortSVCHandler:
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/* Get the location of the current TCB. */
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ldr r3, =pxCurrentTCB
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ldr r1, [r3]
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ldr r0, [r1]
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/* Pop the core registers. */
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ldmia r0!, {r4-r11, r14}
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msr psp, r0
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isb
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mov r0, #0
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msr basepri, r0
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bx r14
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/*-----------------------------------------------------------*/
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vPortStartFirstTask
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/* Use the NVIC offset register to locate the stack. */
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ldr r0, =0xE000ED08
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ldr r0, [r0]
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ldr r0, [r0]
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/* Set the msp back to the start of the stack. */
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msr msp, r0
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/* Clear the bit that indicates the FPU is in use in case the FPU was used
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before the scheduler was started - which would otherwise result in the
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unnecessary leaving of space in the SVC stack for lazy saving of FPU
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registers. */
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mov r0, #0
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msr control, r0
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/* Call SVC to start the first task. */
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cpsie i
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cpsie f
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dsb
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isb
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svc 0
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/*-----------------------------------------------------------*/
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vPortEnableVFP:
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/* The FPU enable bits are in the CPACR. */
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ldr.w r0, =0xE000ED88
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ldr r1, [r0]
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/* Enable CP10 and CP11 coprocessors, then save back. */
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orr r1, r1, #( 0xf << 20 )
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str r1, [r0]
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bx r14
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END
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