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1000 lines
33 KiB
C
1000 lines
33 KiB
C
/*This file has been prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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* \brief MACB driver for EVK1100 board.
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*
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* This file defines a useful set of functions for the MACB interface on
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* AVR32 devices.
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*
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* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
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* - Supported devices: All AVR32 devices with a MACB module can be used.
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* - AppNote:
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support and FAQ: http://support.atmel.no/
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*
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*****************************************************************************/
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/* Copyright (c) 2007, Atmel Corporation All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of ATMEL may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
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* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <string.h>
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#include <avr32/io.h>
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#ifdef FREERTOS_USED
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#include "FreeRTOS.h"
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#include "task.h"
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#include "semphr.h"
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#endif
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#include "macb.h"
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#include "gpio.h"
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#include "conf_eth.h"
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#include "intc.h"
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/* Size of each receive buffer - DO NOT CHANGE. */
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#define RX_BUFFER_SIZE 128
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/* The buffer addresses written into the descriptors must be aligned so the
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last few bits are zero. These bits have special meaning for the MACB
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peripheral and cannot be used as part of the address. */
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#define ADDRESS_MASK ( ( unsigned long ) 0xFFFFFFFC )
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/* Bit used within the address stored in the descriptor to mark the last
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descriptor in the array. */
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#define RX_WRAP_BIT ( ( unsigned long ) 0x02 )
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/* A short delay is used to wait for a buffer to become available, should
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one not be immediately available when trying to transmit a frame. */
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#define BUFFER_WAIT_DELAY ( 2 )
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#ifndef FREERTOS_USED
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#define portENTER_CRITICAL Disable_global_interrupt
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#define portEXIT_CRITICAL Enable_global_interrupt
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#define portENTER_SWITCHING_ISR()
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#define portEXIT_SWITCHING_ISR()
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#endif
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/* Buffer written to by the MACB DMA. Must be aligned as described by the
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comment above the ADDRESS_MASK definition. */
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#if __GNUC__
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static volatile char pcRxBuffer[ ETHERNET_CONF_NB_RX_BUFFERS * RX_BUFFER_SIZE ] __attribute__ ((aligned (8)));
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#elif __ICCAVR32__
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#pragma data_alignment=8
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static volatile char pcRxBuffer[ ETHERNET_CONF_NB_RX_BUFFERS * RX_BUFFER_SIZE ];
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#endif
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/* Buffer read by the MACB DMA. Must be aligned as described by the comment
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above the ADDRESS_MASK definition. */
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#if __GNUC__
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static volatile char pcTxBuffer[ ETHERNET_CONF_NB_TX_BUFFERS * ETHERNET_CONF_TX_BUFFER_SIZE ] __attribute__ ((aligned (8)));
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#elif __ICCAVR32__
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#pragma data_alignment=8
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static volatile char pcTxBuffer[ ETHERNET_CONF_NB_TX_BUFFERS * ETHERNET_CONF_TX_BUFFER_SIZE ];
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#endif
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/* Descriptors used to communicate between the program and the MACB peripheral.
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These descriptors hold the locations and state of the Rx and Tx buffers. */
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static volatile AVR32_TxTdDescriptor xTxDescriptors[ ETHERNET_CONF_NB_TX_BUFFERS ];
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static volatile AVR32_RxTdDescriptor xRxDescriptors[ ETHERNET_CONF_NB_RX_BUFFERS ];
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/* The IP and Ethernet addresses are read from the header files. */
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char cMACAddress[ 6 ] = { ETHERNET_CONF_ETHADDR0,ETHERNET_CONF_ETHADDR1,ETHERNET_CONF_ETHADDR2,ETHERNET_CONF_ETHADDR3,ETHERNET_CONF_ETHADDR4,ETHERNET_CONF_ETHADDR5 };
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/*-----------------------------------------------------------*/
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/* See the header file for descriptions of public functions. */
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/*
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* Prototype for the MACB interrupt function - called by the asm wrapper.
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*/
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#ifdef FREERTOS_USED
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#if __GNUC__
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__attribute__((naked))
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#elif __ICCAVR32__
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#pragma shadow_registers = full // Naked.
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#endif
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#else
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#if __GNUC__
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__attribute__((__interrupt__))
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#elif __ICCAVR32__
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__interrupt
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#endif
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#endif
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void vMACB_ISR( void );
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static long prvMACB_ISR_NonNakedBehaviour( void );
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#if ETHERNET_CONF_USE_PHY_IT
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#ifdef FREERTOS_USED
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#if __GNUC__
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__attribute__((naked))
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#elif __ICCAVR32__
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#pragma shadow_registers = full // Naked.
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#endif
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#else
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#if __GNUC__
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__attribute__((__interrupt__))
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#elif __ICCAVR32__
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__interrupt
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#endif
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#endif
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void vPHY_ISR( void );
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static long prvPHY_ISR_NonNakedBehaviour( void );
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#endif
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/*
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* Initialise both the Tx and Rx descriptors used by the MACB.
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*/
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static void prvSetupDescriptors(volatile avr32_macb_t * macb);
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/*
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* Write our MAC address into the MACB.
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*/
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static void prvSetupMACAddress( volatile avr32_macb_t * macb );
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/*
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* Configure the MACB for interrupts.
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*/
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static void prvSetupMACBInterrupt( volatile avr32_macb_t * macb );
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/*
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* Some initialisation functions.
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*/
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static Bool prvProbePHY( volatile avr32_macb_t * macb );
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static unsigned long ulReadMDIO(volatile avr32_macb_t * macb, unsigned short usAddress);
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static void vWriteMDIO(volatile avr32_macb_t * macb, unsigned short usAddress, unsigned short usValue);
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#ifdef FREERTOS_USED
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/* The semaphore used by the MACB ISR to wake the MACB task. */
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static xSemaphoreHandle xSemaphore = NULL;
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#else
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static volatile Bool DataToRead = FALSE;
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#endif
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/* Holds the index to the next buffer from which data will be read. */
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volatile unsigned long ulNextRxBuffer = 0;
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long lMACBSend(volatile avr32_macb_t * macb, char *pcFrom, unsigned long ulLength, long lEndOfFrame )
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{
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static unsigned long uxTxBufferIndex = 0;
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char *pcBuffer;
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unsigned long ulLastBuffer, ulDataBuffered = 0, ulDataRemainingToSend, ulLengthToSend;
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/* If the length of data to be transmitted is greater than each individual
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transmit buffer then the data will be split into more than one buffer.
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Loop until the entire length has been buffered. */
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while( ulDataBuffered < ulLength )
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{
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// Is a buffer available ?
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while( !( xTxDescriptors[ uxTxBufferIndex ].U_Status.status & AVR32_TRANSMIT_OK ) )
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{
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// There is no room to write the Tx data to the Tx buffer.
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// Wait a short while, then try again.
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#ifdef FREERTOS_USED
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vTaskDelay( BUFFER_WAIT_DELAY );
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#else
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__asm__ __volatile__ ("nop");
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#endif
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}
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portENTER_CRITICAL();
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{
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// Get the address of the buffer from the descriptor,
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// then copy the data into the buffer.
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pcBuffer = ( char * ) xTxDescriptors[ uxTxBufferIndex ].addr;
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// How much can we write to the buffer ?
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ulDataRemainingToSend = ulLength - ulDataBuffered;
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if( ulDataRemainingToSend <= ETHERNET_CONF_TX_BUFFER_SIZE )
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{
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// We can write all the remaining bytes.
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ulLengthToSend = ulDataRemainingToSend;
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}
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else
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{
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// We can't write more than ETH_TX_BUFFER_SIZE in one go.
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ulLengthToSend = ETHERNET_CONF_TX_BUFFER_SIZE;
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}
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// Copy the data into the buffer.
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memcpy( ( void * ) pcBuffer, ( void * ) &( pcFrom[ ulDataBuffered ] ), ulLengthToSend );
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ulDataBuffered += ulLengthToSend;
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// Is this the last data for the frame ?
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if( lEndOfFrame && ( ulDataBuffered >= ulLength ) )
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{
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// No more data remains for this frame so we can start the transmission.
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ulLastBuffer = AVR32_LAST_BUFFER;
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}
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else
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{
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// More data to come for this frame.
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ulLastBuffer = 0;
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}
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// Fill out the necessary in the descriptor to get the data sent,
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// then move to the next descriptor, wrapping if necessary.
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if( uxTxBufferIndex >= ( ETHERNET_CONF_NB_TX_BUFFERS - 1 ) )
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{
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xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AVR32_LENGTH_FRAME )
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| ulLastBuffer
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| AVR32_TRANSMIT_WRAP;
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uxTxBufferIndex = 0;
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}
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else
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{
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xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AVR32_LENGTH_FRAME )
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| ulLastBuffer;
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uxTxBufferIndex++;
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}
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/* If this is the last buffer to be sent for this frame we can
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start the transmission. */
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if( ulLastBuffer )
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{
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macb->ncr |= AVR32_MACB_TSTART_MASK;
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}
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}
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portEXIT_CRITICAL();
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}
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return PASS;
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}
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unsigned long ulMACBInputLength( void )
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{
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register unsigned long ulIndex , ulLength = 0;
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unsigned int uiTemp;
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// Skip any fragments. We are looking for the first buffer that contains
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// data and has the SOF (start of frame) bit set.
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while( ( xRxDescriptors[ ulNextRxBuffer ].addr & AVR32_OWNERSHIP_BIT ) && !( xRxDescriptors[ ulNextRxBuffer ].U_Status.status & AVR32_SOF ) )
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{
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// Ignoring this buffer. Mark it as free again.
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uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr;
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xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT );
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ulNextRxBuffer++;
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if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS )
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{
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ulNextRxBuffer = 0;
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}
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}
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// We are going to walk through the descriptors that make up this frame,
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// but don't want to alter ulNextRxBuffer as this would prevent vMACBRead()
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// from finding the data. Therefore use a copy of ulNextRxBuffer instead.
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ulIndex = ulNextRxBuffer;
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// Walk through the descriptors until we find the last buffer for this frame.
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// The last buffer will give us the length of the entire frame.
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while( ( xRxDescriptors[ ulIndex ].addr & AVR32_OWNERSHIP_BIT ) && !ulLength )
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{
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ulLength = xRxDescriptors[ ulIndex ].U_Status.status & AVR32_LENGTH_FRAME;
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// Increment to the next buffer, wrapping if necessary.
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ulIndex++;
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if( ulIndex >= ETHERNET_CONF_NB_RX_BUFFERS )
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{
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ulIndex = 0;
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}
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}
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return ulLength;
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}
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/*-----------------------------------------------------------*/
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void vMACBRead( char *pcTo, unsigned long ulSectionLength, unsigned long ulTotalFrameLength )
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{
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static unsigned long ulSectionBytesReadSoFar = 0, ulBufferPosition = 0, ulFameBytesReadSoFar = 0;
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static char *pcSource;
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register unsigned long ulBytesRemainingInBuffer, ulRemainingSectionBytes;
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unsigned int uiTemp;
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// Read ulSectionLength bytes from the Rx buffers.
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// This is not necessarily any correspondence between the length of our Rx buffers,
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// and the length of the data we are returning or the length of the data being requested.
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// Therefore, between calls we have to remember not only which buffer we are currently
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// processing, but our position within that buffer.
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// This would be greatly simplified if PBUF_POOL_BUFSIZE could be guaranteed to be greater
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// than the size of each Rx buffer, and that memory fragmentation did not occur.
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// This function should only be called after a call to ulMACBInputLength().
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// This will ensure ulNextRxBuffer is set to the correct buffer. */
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// vMACBRead is called with pcTo set to NULL to indicate that we are about
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// to read a new frame. Any fragments remaining in the frame we were
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// processing during the last call should be dropped.
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if( pcTo == NULL )
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{
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// How many bytes are indicated as being in this buffer?
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// If none then the buffer is completely full and the frame is contained within more
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// than one buffer.
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// Reset our state variables ready for the next read from this buffer.
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pcSource = ( char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK );
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ulFameBytesReadSoFar = ( unsigned long ) 0;
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ulBufferPosition = ( unsigned long ) 0;
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}
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else
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{
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// Loop until we have obtained the required amount of data.
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ulSectionBytesReadSoFar = 0;
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while( ulSectionBytesReadSoFar < ulSectionLength )
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{
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// We may have already read some data from this buffer.
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// How much data remains in the buffer?
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ulBytesRemainingInBuffer = ( RX_BUFFER_SIZE - ulBufferPosition );
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// How many more bytes do we need to read before we have the
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// required amount of data?
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ulRemainingSectionBytes = ulSectionLength - ulSectionBytesReadSoFar;
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// Do we want more data than remains in the buffer?
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if( ulRemainingSectionBytes > ulBytesRemainingInBuffer )
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{
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// We want more data than remains in the buffer so we can
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// write the remains of the buffer to the destination, then move
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// onto the next buffer to get the rest.
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memcpy( &( pcTo[ ulSectionBytesReadSoFar ] ), &( pcSource[ ulBufferPosition ] ), ulBytesRemainingInBuffer );
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ulSectionBytesReadSoFar += ulBytesRemainingInBuffer;
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ulFameBytesReadSoFar += ulBytesRemainingInBuffer;
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// Mark the buffer as free again.
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uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr;
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xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT );
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// Move onto the next buffer.
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ulNextRxBuffer++;
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if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS )
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{
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ulNextRxBuffer = ( unsigned long ) 0;
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}
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// Reset the variables for the new buffer.
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pcSource = ( char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK );
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ulBufferPosition = ( unsigned long ) 0;
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}
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else
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{
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// We have enough data in this buffer to send back.
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// Read out enough data and remember how far we read up to.
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memcpy( &( pcTo[ ulSectionBytesReadSoFar ] ), &( pcSource[ ulBufferPosition ] ), ulRemainingSectionBytes );
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// There may be more data in this buffer yet.
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// Increment our position in this buffer past the data we have just read.
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ulBufferPosition += ulRemainingSectionBytes;
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ulSectionBytesReadSoFar += ulRemainingSectionBytes;
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ulFameBytesReadSoFar += ulRemainingSectionBytes;
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// Have we now finished with this buffer?
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if( ( ulBufferPosition >= RX_BUFFER_SIZE ) || ( ulFameBytesReadSoFar >= ulTotalFrameLength ) )
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{
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// Mark the buffer as free again.
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uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr;
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xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT );
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// Move onto the next buffer.
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ulNextRxBuffer++;
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if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS )
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{
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ulNextRxBuffer = 0;
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}
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pcSource = ( char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK );
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ulBufferPosition = 0;
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}
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}
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}
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}
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}
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/*-----------------------------------------------------------*/
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void vMACBSetMACAddress(const char * MACAddress)
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{
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memcpy(cMACAddress, MACAddress, sizeof(cMACAddress));
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}
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Bool xMACBInit( volatile avr32_macb_t * macb )
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{
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volatile unsigned long status;
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// set up registers
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macb->ncr = 0;
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macb->tsr = ~0UL;
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macb->rsr = ~0UL;
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macb->idr = ~0UL;
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status = macb->isr;
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#if ETHERNET_CONF_USE_RMII_INTERFACE
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// RMII used, set 0 to the USRIO Register
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macb->usrio &= ~AVR32_MACB_RMII_MASK;
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#else
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// RMII not used, set 1 to the USRIO Register
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macb->usrio |= AVR32_MACB_RMII_MASK;
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#endif
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// Load our MAC address into the MACB.
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prvSetupMACAddress(macb);
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// Setup the buffers and descriptors.
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prvSetupDescriptors(macb);
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#if ETHERNET_CONF_SYSTEM_CLOCK <= 20000000
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macb->ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV8 << AVR32_MACB_NCFGR_CLK_OFFSET);
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#elif ETHERNET_CONF_SYSTEM_CLOCK <= 40000000
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macb->ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV16 << AVR32_MACB_NCFGR_CLK_OFFSET);
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#elif ETHERNET_CONF_SYSTEM_CLOCK <= 80000000
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macb->ncfgr |= AVR32_MACB_NCFGR_CLK_DIV32 << AVR32_MACB_NCFGR_CLK_OFFSET;
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#elif ETHERNET_CONF_SYSTEM_CLOCK <= 160000000
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macb->ncfgr |= AVR32_MACB_NCFGR_CLK_DIV64 << AVR32_MACB_NCFGR_CLK_OFFSET;
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#else
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# error System clock too fast
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#endif
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// Are we connected?
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if( prvProbePHY(macb) == TRUE )
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{
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// Enable the interrupt!
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portENTER_CRITICAL();
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{
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prvSetupMACBInterrupt(macb);
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}
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portEXIT_CRITICAL();
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// Enable Rx and Tx, plus the stats register.
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macb->ncr = AVR32_MACB_NCR_TE_MASK | AVR32_MACB_NCR_RE_MASK;
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return (TRUE);
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}
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return (FALSE);
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}
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|
|
void vDisableMACBOperations(volatile avr32_macb_t * macb)
|
|
{
|
|
#if ETHERNET_CONF_USE_PHY_IT
|
|
volatile avr32_gpio_t *gpio = &AVR32_GPIO;
|
|
volatile avr32_gpio_port_t *gpio_port = &gpio->port[MACB_INTERRUPT_PIN/32];
|
|
|
|
gpio_port->ierc = 1 << (MACB_INTERRUPT_PIN%32);
|
|
#endif
|
|
|
|
// write the MACB control register : disable Tx & Rx
|
|
macb->ncr &= ~((1 << AVR32_MACB_RE_OFFSET) | (1 << AVR32_MACB_TE_OFFSET));
|
|
// We no more want to interrupt on Rx and Tx events.
|
|
macb->idr = AVR32_MACB_IER_RCOMP_MASK | AVR32_MACB_IER_TCOMP_MASK;
|
|
}
|
|
|
|
|
|
void vClearMACBTxBuffer( void )
|
|
{
|
|
static unsigned long uxNextBufferToClear = 0;
|
|
|
|
// Called on Tx interrupt events to set the AVR32_TRANSMIT_OK bit in each
|
|
// Tx buffer within the frame just transmitted. This marks all the buffers
|
|
// as available again.
|
|
|
|
// The first buffer in the frame should have the bit set automatically. */
|
|
if( xTxDescriptors[ uxNextBufferToClear ].U_Status.status & AVR32_TRANSMIT_OK )
|
|
{
|
|
// Loop through the other buffers in the frame.
|
|
while( !( xTxDescriptors[ uxNextBufferToClear ].U_Status.status & AVR32_LAST_BUFFER ) )
|
|
{
|
|
uxNextBufferToClear++;
|
|
|
|
if( uxNextBufferToClear >= ETHERNET_CONF_NB_TX_BUFFERS )
|
|
{
|
|
uxNextBufferToClear = 0;
|
|
}
|
|
|
|
xTxDescriptors[ uxNextBufferToClear ].U_Status.status |= AVR32_TRANSMIT_OK;
|
|
}
|
|
|
|
// Start with the next buffer the next time a Tx interrupt is called.
|
|
uxNextBufferToClear++;
|
|
|
|
// Do we need to wrap back to the first buffer?
|
|
if( uxNextBufferToClear >= ETHERNET_CONF_NB_TX_BUFFERS )
|
|
{
|
|
uxNextBufferToClear = 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void prvSetupDescriptors(volatile avr32_macb_t * macb)
|
|
{
|
|
unsigned long xIndex;
|
|
unsigned long ulAddress;
|
|
|
|
// Initialise xRxDescriptors descriptor.
|
|
for( xIndex = 0; xIndex < ETHERNET_CONF_NB_RX_BUFFERS; ++xIndex )
|
|
{
|
|
// Calculate the address of the nth buffer within the array.
|
|
ulAddress = ( unsigned long )( pcRxBuffer + ( xIndex * RX_BUFFER_SIZE ) );
|
|
|
|
// Write the buffer address into the descriptor.
|
|
// The DMA will place the data at this address when this descriptor is being used.
|
|
// Mask off the bottom bits of the address as these have special meaning.
|
|
xRxDescriptors[ xIndex ].addr = ulAddress & ADDRESS_MASK;
|
|
}
|
|
|
|
// The last buffer has the wrap bit set so the MACB knows to wrap back
|
|
// to the first buffer.
|
|
xRxDescriptors[ ETHERNET_CONF_NB_RX_BUFFERS - 1 ].addr |= RX_WRAP_BIT;
|
|
|
|
// Initialise xTxDescriptors.
|
|
for( xIndex = 0; xIndex < ETHERNET_CONF_NB_TX_BUFFERS; ++xIndex )
|
|
{
|
|
// Calculate the address of the nth buffer within the array.
|
|
ulAddress = ( unsigned long )( pcTxBuffer + ( xIndex * ETHERNET_CONF_TX_BUFFER_SIZE ) );
|
|
|
|
// Write the buffer address into the descriptor.
|
|
// The DMA will read data from here when the descriptor is being used.
|
|
xTxDescriptors[ xIndex ].addr = ulAddress & ADDRESS_MASK;
|
|
xTxDescriptors[ xIndex ].U_Status.status = AVR32_TRANSMIT_OK;
|
|
}
|
|
|
|
// The last buffer has the wrap bit set so the MACB knows to wrap back
|
|
// to the first buffer.
|
|
xTxDescriptors[ ETHERNET_CONF_NB_TX_BUFFERS - 1 ].U_Status.status = AVR32_TRANSMIT_WRAP | AVR32_TRANSMIT_OK;
|
|
|
|
// Tell the MACB where to find the descriptors.
|
|
macb->rbqp = ( unsigned long )xRxDescriptors;
|
|
macb->tbqp = ( unsigned long )xTxDescriptors;
|
|
|
|
// Enable the copy of data into the buffers, ignore broadcasts,
|
|
// and don't copy FCS.
|
|
macb->ncfgr |= (AVR32_MACB_CAF_MASK | AVR32_MACB_NBC_MASK | AVR32_MACB_NCFGR_DRFCS_MASK);
|
|
|
|
}
|
|
|
|
static void prvSetupMACAddress( volatile avr32_macb_t * macb )
|
|
{
|
|
// Must be written SA1L then SA1H.
|
|
macb->sa1b = ( ( unsigned long ) cMACAddress[ 3 ] << 24 ) |
|
|
( ( unsigned long ) cMACAddress[ 2 ] << 16 ) |
|
|
( ( unsigned long ) cMACAddress[ 1 ] << 8 ) |
|
|
cMACAddress[ 0 ];
|
|
|
|
macb->sa1t = ( ( unsigned long ) cMACAddress[ 5 ] << 8 ) |
|
|
cMACAddress[ 4 ];
|
|
}
|
|
|
|
static void prvSetupMACBInterrupt( volatile avr32_macb_t * macb )
|
|
{
|
|
#ifdef FREERTOS_USED
|
|
// Create the semaphore used to trigger the MACB task.
|
|
if (xSemaphore == NULL)
|
|
{
|
|
vSemaphoreCreateBinary( xSemaphore );
|
|
}
|
|
#else
|
|
// Create the flag used to trigger the MACB polling task.
|
|
DataToRead = FALSE;
|
|
#endif
|
|
|
|
|
|
#ifdef FREERTOS_USED
|
|
if( xSemaphore != NULL)
|
|
{
|
|
// We start by 'taking' the semaphore so the ISR can 'give' it when the
|
|
// first interrupt occurs.
|
|
xSemaphoreTake( xSemaphore, 0 );
|
|
#endif
|
|
// Setup the interrupt for MACB.
|
|
// Register the interrupt handler to the interrupt controller at interrupt level 2
|
|
INTC_register_interrupt((__int_handler)&vMACB_ISR, AVR32_MACB_IRQ, INT2);
|
|
|
|
#if ETHERNET_CONF_USE_PHY_IT
|
|
/* GPIO enable interrupt upon rising edge */
|
|
gpio_enable_pin_interrupt(MACB_INTERRUPT_PIN, GPIO_FALLING_EDGE);
|
|
// Setup the interrupt for PHY.
|
|
// Register the interrupt handler to the interrupt controller at interrupt level 2
|
|
INTC_register_interrupt((__int_handler)&vPHY_ISR, (AVR32_GPIO_IRQ_0 + (MACB_INTERRUPT_PIN/8)), INT2);
|
|
/* enable interrupts on INT pin */
|
|
vWriteMDIO( macb, PHY_MICR , ( MICR_INTEN | MICR_INTOE ));
|
|
/* enable "link change" interrupt for Phy */
|
|
vWriteMDIO( macb, PHY_MISR , MISR_LINK_INT_EN );
|
|
#endif
|
|
|
|
// We want to interrupt on Rx and Tx events
|
|
macb->ier = AVR32_MACB_IER_RCOMP_MASK | AVR32_MACB_IER_TCOMP_MASK;
|
|
#ifdef FREERTOS_USED
|
|
}
|
|
#endif
|
|
}
|
|
|
|
/*! Read a register on MDIO bus (access to the PHY)
|
|
* This function is looping until PHY gets ready
|
|
*
|
|
* \param macb Input. instance of the MACB to use
|
|
* \param usAddress Input. register to set.
|
|
*
|
|
* \return unsigned long data that has been read
|
|
*/
|
|
static unsigned long ulReadMDIO(volatile avr32_macb_t * macb, unsigned short usAddress)
|
|
{
|
|
unsigned long value, status;
|
|
|
|
// initiate transaction : enable management port
|
|
macb->ncr |= AVR32_MACB_NCR_MPE_MASK;
|
|
// Write the PHY configuration frame to the MAN register
|
|
macb->man = (AVR32_MACB_SOF_MASK & (0x01<<AVR32_MACB_SOF_OFFSET)) // SOF
|
|
| (2 << AVR32_MACB_CODE_OFFSET) // Code
|
|
| (2 << AVR32_MACB_RW_OFFSET) // Read operation
|
|
| ((ETHERNET_CONF_PHY_ADDR & 0x1f) << AVR32_MACB_PHYA_OFFSET) // Phy Add
|
|
| (usAddress << AVR32_MACB_REGA_OFFSET); // Reg Add
|
|
// wait for PHY to be ready
|
|
do {
|
|
status = macb->nsr;
|
|
} while (!(status & AVR32_MACB_NSR_IDLE_MASK));
|
|
// read the register value in maintenance register
|
|
value = macb->man & 0x0000ffff;
|
|
// disable management port
|
|
macb->ncr &= ~AVR32_MACB_NCR_MPE_MASK;
|
|
// return the read value
|
|
return (value);
|
|
}
|
|
|
|
/*! Write a given value to a register on MDIO bus (access to the PHY)
|
|
* This function is looping until PHY gets ready
|
|
*
|
|
* \param *macb Input. instance of the MACB to use
|
|
* \param usAddress Input. register to set.
|
|
* \param usValue Input. value to write.
|
|
*
|
|
*/
|
|
static void vWriteMDIO(volatile avr32_macb_t * macb, unsigned short usAddress, unsigned short usValue)
|
|
{
|
|
unsigned long status;
|
|
|
|
// initiate transaction : enable management port
|
|
macb->ncr |= AVR32_MACB_NCR_MPE_MASK;
|
|
// Write the PHY configuration frame to the MAN register
|
|
macb->man = (( AVR32_MACB_SOF_MASK & (0x01<<AVR32_MACB_SOF_OFFSET)) // SOF
|
|
| (2 << AVR32_MACB_CODE_OFFSET) // Code
|
|
| (1 << AVR32_MACB_RW_OFFSET) // Write operation
|
|
| ((ETHERNET_CONF_PHY_ADDR & 0x1f) << AVR32_MACB_PHYA_OFFSET) // Phy Add
|
|
| (usAddress << AVR32_MACB_REGA_OFFSET)) // Reg Add
|
|
| (usValue & 0xffff); // Data
|
|
// wait for PHY to be ready
|
|
do {
|
|
status = macb->nsr;
|
|
} while (!(status & AVR32_MACB_NSR_IDLE_MASK));
|
|
// disable management port
|
|
macb->ncr &= ~AVR32_MACB_NCR_MPE_MASK;
|
|
}
|
|
|
|
static Bool prvProbePHY( volatile avr32_macb_t * macb )
|
|
{
|
|
volatile unsigned long mii_status, phy_ctrl;
|
|
volatile unsigned long config;
|
|
unsigned long upper, lower, mode, advertise, lpa;
|
|
volatile unsigned long physID;
|
|
|
|
// Read Phy Identifier register 1 & 2
|
|
lower = ulReadMDIO(macb, PHY_PHYSID2);
|
|
upper = ulReadMDIO(macb, PHY_PHYSID1);
|
|
// get Phy ID, ignore Revision
|
|
physID = ((upper << 16) & 0xFFFF0000) | (lower & 0xFFF0);
|
|
// check if it match config
|
|
if (physID == ETHERNET_CONF_PHY_ID)
|
|
{
|
|
// read RBR
|
|
mode = ulReadMDIO(macb, PHY_RBR);
|
|
// set RMII mode if not done
|
|
if ((mode & RBR_RMII) != RBR_RMII)
|
|
{
|
|
// force RMII flag if strap options are wrong
|
|
mode |= RBR_RMII;
|
|
vWriteMDIO(macb, PHY_RBR, mode);
|
|
}
|
|
|
|
// set advertise register
|
|
#if ETHERNET_CONF_AN_ENABLE == 1
|
|
advertise = ADVERTISE_CSMA | ADVERTISE_ALL;
|
|
#else
|
|
advertise = ADVERTISE_CSMA;
|
|
#if ETHERNET_CONF_USE_100MB
|
|
#if ETHERNET_CONF_USE_FULL_DUPLEX
|
|
advertise |= ADVERTISE_100FULL;
|
|
#else
|
|
advertise |= ADVERTISE_100HALF;
|
|
#endif
|
|
#else
|
|
#if ETHERNET_CONF_USE_FULL_DUPLEX
|
|
advertise |= ADVERTISE_10FULL;
|
|
#else
|
|
advertise |= ADVERTISE_10HALF;
|
|
#endif
|
|
#endif
|
|
#endif
|
|
// write advertise register
|
|
vWriteMDIO(macb, PHY_ADVERTISE, advertise);
|
|
// read Control register
|
|
config = ulReadMDIO(macb, PHY_BMCR);
|
|
// read Phy Control register
|
|
phy_ctrl = ulReadMDIO(macb, PHY_PHYCR);
|
|
#if ETHERNET_CONF_AN_ENABLE
|
|
#if ETHERNET_CONF_AUTO_CROSS_ENABLE
|
|
// enable Auto MDIX
|
|
phy_ctrl |= PHYCR_MDIX_EN;
|
|
#else
|
|
// disable Auto MDIX
|
|
phy_ctrl &= ~PHYCR_MDIX_EN;
|
|
#if ETHERNET_CONF_CROSSED_LINK
|
|
// force direct link = Use crossed RJ45 cable
|
|
phy_ctrl &= ~PHYCR_MDIX_FORCE;
|
|
#else
|
|
// force crossed link = Use direct RJ45 cable
|
|
phy_ctrl |= PHYCR_MDIX_FORCE;
|
|
#endif
|
|
#endif
|
|
// reset auto-negociation capability
|
|
config |= (BMCR_ANRESTART | BMCR_ANENABLE);
|
|
#else
|
|
// disable Auto MDIX
|
|
phy_ctrl &= ~PHYCR_MDIX_EN;
|
|
#if ETHERNET_CONF_CROSSED_LINK
|
|
// force direct link = Use crossed RJ45 cable
|
|
phy_ctrl &= ~PHYCR_MDIX_FORCE;
|
|
#else
|
|
// force crossed link = Use direct RJ45 cable
|
|
phy_ctrl |= PHYCR_MDIX_FORCE;
|
|
#endif
|
|
// clear AN bit
|
|
config &= ~BMCR_ANENABLE;
|
|
|
|
#if ETHERNET_CONF_USE_100MB
|
|
config |= BMCR_SPEED100;
|
|
#else
|
|
config &= ~BMCR_SPEED100;
|
|
#endif
|
|
#if ETHERNET_CONF_USE_FULL_DUPLEX
|
|
config |= BMCR_FULLDPLX;
|
|
#else
|
|
config &= ~BMCR_FULLDPLX;
|
|
#endif
|
|
#endif
|
|
// update Phy ctrl register
|
|
vWriteMDIO(macb, PHY_PHYCR, phy_ctrl);
|
|
|
|
// update ctrl register
|
|
vWriteMDIO(macb, PHY_BMCR, config);
|
|
|
|
// loop while link status isn't OK
|
|
do {
|
|
mii_status = ulReadMDIO(macb, PHY_BMSR);
|
|
} while (!(mii_status & BMSR_LSTATUS));
|
|
|
|
// read the LPA configuration of the PHY
|
|
lpa = ulReadMDIO(macb, PHY_LPA);
|
|
|
|
// read the MACB config register
|
|
config = AVR32_MACB.ncfgr;
|
|
|
|
// if 100MB needed
|
|
if ((lpa & advertise) & (LPA_100HALF | LPA_100FULL))
|
|
{
|
|
config |= AVR32_MACB_SPD_MASK;
|
|
}
|
|
else
|
|
{
|
|
config &= ~(AVR32_MACB_SPD_MASK);
|
|
}
|
|
|
|
// if FULL DUPLEX needed
|
|
if ((lpa & advertise) & (LPA_10FULL | LPA_100FULL))
|
|
{
|
|
config |= AVR32_MACB_FD_MASK;
|
|
}
|
|
else
|
|
{
|
|
config &= ~(AVR32_MACB_FD_MASK);
|
|
}
|
|
|
|
// write the MACB config register
|
|
macb->ncfgr = config;
|
|
|
|
return TRUE;
|
|
}
|
|
return FALSE;
|
|
}
|
|
|
|
|
|
void vMACBWaitForInput( unsigned long ulTimeOut )
|
|
{
|
|
#ifdef FREERTOS_USED
|
|
// Just wait until we are signled from an ISR that data is available, or
|
|
// we simply time out.
|
|
xSemaphoreTake( xSemaphore, ulTimeOut );
|
|
#else
|
|
unsigned long i;
|
|
gpio_clr_gpio_pin(LED0_GPIO);
|
|
i = ulTimeOut * 1000;
|
|
// wait for an interrupt to occurs
|
|
do
|
|
{
|
|
if ( DataToRead == TRUE )
|
|
{
|
|
// IT occurs, reset interrupt flag
|
|
portENTER_CRITICAL();
|
|
DataToRead = FALSE;
|
|
portEXIT_CRITICAL();
|
|
break;
|
|
}
|
|
i--;
|
|
}
|
|
while(i != 0);
|
|
gpio_set_gpio_pin(LED0_GPIO);
|
|
#endif
|
|
}
|
|
|
|
|
|
/*
|
|
* The MACB ISR. Handles both Tx and Rx complete interrupts.
|
|
*/
|
|
#ifdef FREERTOS_USED
|
|
#if __GNUC__
|
|
__attribute__((naked))
|
|
#elif __ICCAVR32__
|
|
#pragma shadow_registers = full // Naked.
|
|
#endif
|
|
#else
|
|
#if __GNUC__
|
|
__attribute__((__interrupt__))
|
|
#elif __ICCAVR32__
|
|
__interrupt
|
|
#endif
|
|
#endif
|
|
void vMACB_ISR( void )
|
|
{
|
|
// This ISR can cause a context switch, so the first statement must be a
|
|
// call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
|
|
// variable declarations.
|
|
portENTER_SWITCHING_ISR();
|
|
|
|
// the return value is used by FreeRTOS to change the context if needed after rete instruction
|
|
// in standalone use, this value should be ignored
|
|
prvMACB_ISR_NonNakedBehaviour();
|
|
|
|
// Exit the ISR. If a task was woken by either a character being received
|
|
// or transmitted then a context switch will occur.
|
|
portEXIT_SWITCHING_ISR();
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if __GNUC__
|
|
__attribute__((__noinline__))
|
|
#elif __ICCAVR32__
|
|
#pragma optimize = no_inline
|
|
#endif
|
|
static long prvMACB_ISR_NonNakedBehaviour( void )
|
|
{
|
|
|
|
// Variable definitions can be made now.
|
|
volatile unsigned long ulIntStatus, ulEventStatus;
|
|
long xHigherPriorityTaskWoken = FALSE;
|
|
|
|
// Find the cause of the interrupt.
|
|
ulIntStatus = AVR32_MACB.isr;
|
|
ulEventStatus = AVR32_MACB.rsr;
|
|
|
|
if( ( ulIntStatus & AVR32_MACB_IDR_RCOMP_MASK ) || ( ulEventStatus & AVR32_MACB_REC_MASK ) )
|
|
{
|
|
// A frame has been received, signal the IP task so it can process
|
|
// the Rx descriptors.
|
|
portENTER_CRITICAL();
|
|
#ifdef FREERTOS_USED
|
|
xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
|
|
#else
|
|
DataToRead = TRUE;
|
|
#endif
|
|
portEXIT_CRITICAL();
|
|
AVR32_MACB.rsr = AVR32_MACB_REC_MASK;
|
|
AVR32_MACB.rsr;
|
|
}
|
|
|
|
if( ulIntStatus & AVR32_MACB_TCOMP_MASK )
|
|
{
|
|
// A frame has been transmitted. Mark all the buffers used by the
|
|
// frame just transmitted as free again.
|
|
vClearMACBTxBuffer();
|
|
AVR32_MACB.tsr = AVR32_MACB_TSR_COMP_MASK;
|
|
AVR32_MACB.tsr;
|
|
}
|
|
|
|
return ( xHigherPriorityTaskWoken );
|
|
}
|
|
|
|
|
|
|
|
#if ETHERNET_CONF_USE_PHY_IT
|
|
/*
|
|
* The PHY ISR. Handles Phy interrupts.
|
|
*/
|
|
#ifdef FREERTOS_USED
|
|
#if __GNUC__
|
|
__attribute__((naked))
|
|
#elif __ICCAVR32__
|
|
#pragma shadow_registers = full // Naked.
|
|
#endif
|
|
#else
|
|
#if __GNUC__
|
|
__attribute__((__interrupt__))
|
|
#elif __ICCAVR32__
|
|
__interrupt
|
|
#endif
|
|
#endif
|
|
void vPHY_ISR( void )
|
|
{
|
|
// This ISR can cause a context switch, so the first statement must be a
|
|
// call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
|
|
// variable declarations.
|
|
portENTER_SWITCHING_ISR();
|
|
|
|
// the return value is used by FreeRTOS to change the context if needed after rete instruction
|
|
// in standalone use, this value should be ignored
|
|
prvPHY_ISR_NonNakedBehaviour();
|
|
|
|
// Exit the ISR. If a task was woken by either a character being received
|
|
// or transmitted then a context switch will occur.
|
|
portEXIT_SWITCHING_ISR();
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if __GNUC__
|
|
__attribute__((__noinline__))
|
|
#elif __ICCAVR32__
|
|
#pragma optimize = no_inline
|
|
#endif
|
|
static long prvPHY_ISR_NonNakedBehaviour( void )
|
|
{
|
|
|
|
// Variable definitions can be made now.
|
|
volatile unsigned long ulIntStatus, ulEventStatus;
|
|
long xSwitchRequired = FALSE;
|
|
volatile avr32_gpio_t *gpio = &AVR32_GPIO;
|
|
volatile avr32_gpio_port_t *gpio_port = &gpio->port[MACB_INTERRUPT_PIN/32];
|
|
|
|
// read Phy Interrupt register Status
|
|
ulIntStatus = ulReadMDIO(&AVR32_MACB, PHY_MISR);
|
|
|
|
// read Phy status register
|
|
ulEventStatus = ulReadMDIO(&AVR32_MACB, PHY_BMSR);
|
|
// dummy read
|
|
ulEventStatus = ulReadMDIO(&AVR32_MACB, PHY_BMSR);
|
|
|
|
// clear interrupt flag on GPIO
|
|
gpio_port->ifrc = 1 << (MACB_INTERRUPT_PIN%32);
|
|
|
|
return ( xSwitchRequired );
|
|
}
|
|
#endif
|