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171 lines
6.0 KiB
ArmAsm
171 lines
6.0 KiB
ArmAsm
/*
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FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation and modified by the FreeRTOS exception.
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**NOTE** The exception to the GPL is included to allow you to distribute a
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combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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Alternative commercial license and support terms are also available upon
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request. See the licensing section of http://www.FreeRTOS.org for full
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license details.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along
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with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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***************************************************************************
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* *
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* The FreeRTOS eBook and reference manual are available to purchase for a *
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* small fee. Help yourself get started quickly while also helping the *
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* FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *
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* *
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***************************************************************************
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1 tab == 4 spaces!
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Please ensure to read the configuration and relevant port sections of the
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online documentation.
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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.extern vTaskSwitchContext
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.set noat
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# Exported to start the first task.
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.globl restore_sp_from_pxCurrentTCB
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# Entry point for exceptions.
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.section .exceptions.entry, "xa"
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# Save the entire context of a task.
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save_context:
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addi ea, ea, -4 # Point to the next instruction.
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addi sp, sp, -116 # Create space on the stack.
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stw ra, 0(sp)
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# Leave a gap for muldiv 0
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stw at, 8(sp)
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stw r2, 12(sp)
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stw r3, 16(sp)
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stw r4, 20(sp)
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stw r5, 24(sp)
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stw r6, 28(sp)
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stw r7, 32(sp)
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stw r8, 36(sp)
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stw r9, 40(sp)
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stw r10, 44(sp)
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stw r11, 48(sp)
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stw r12, 52(sp)
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stw r13, 56(sp)
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stw r14, 60(sp)
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stw r15, 64(sp)
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rdctl r5, estatus # Save the eStatus
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stw r5, 68(sp)
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stw ea, 72(sp) # Save the PC
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stw r16, 76(sp) # Save the remaining registers
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stw r17, 80(sp)
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stw r18, 84(sp)
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stw r19, 88(sp)
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stw r20, 92(sp)
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stw r21, 96(sp)
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stw r22, 100(sp)
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stw r23, 104(sp)
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stw gp, 108(sp)
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stw fp, 112(sp)
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save_sp_to_pxCurrentTCB:
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movia et, pxCurrentTCB # Load the address of the pxCurrentTCB pointer
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ldw et, (et) # Load the value of the pxCurrentTCB pointer
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stw sp, (et) # Store the stack pointer into the top of the TCB
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.section .exceptions.irqtest, "xa"
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hw_irq_test:
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/*
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* Test to see if the exception was a software exception or caused
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* by an external interrupt, and vector accordingly.
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*/
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rdctl r4, ipending # Load the Pending Interrupts indication
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rdctl r5, estatus # Load the eStatus (enabled interrupts).
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andi r2, r5, 1 # Are interrupts enabled globally.
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beq r2, zero, soft_exceptions # Interrupts are not enabled.
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beq r4, zero, soft_exceptions # There are no interrupts triggered.
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.section .exceptions.irqhandler, "xa"
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hw_irq_handler:
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call alt_irq_handler # Call the alt_irq_handler to deliver to the registered interrupt handler.
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.section .exceptions.irqreturn, "xa"
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restore_sp_from_pxCurrentTCB:
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movia et, pxCurrentTCB # Load the address of the pxCurrentTCB pointer
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ldw et, (et) # Load the value of the pxCurrentTCB pointer
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ldw sp, (et) # Load the stack pointer with the top value of the TCB
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restore_context:
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ldw ra, 0(sp) # Restore the registers.
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# Leave a gap for muldiv 0.
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ldw at, 8(sp)
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ldw r2, 12(sp)
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ldw r3, 16(sp)
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ldw r4, 20(sp)
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ldw r5, 24(sp)
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ldw r6, 28(sp)
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ldw r7, 32(sp)
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ldw r8, 36(sp)
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ldw r9, 40(sp)
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ldw r10, 44(sp)
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ldw r11, 48(sp)
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ldw r12, 52(sp)
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ldw r13, 56(sp)
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ldw r14, 60(sp)
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ldw r15, 64(sp)
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ldw et, 68(sp) # Load the eStatus
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wrctl estatus, et # Write the eStatus
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ldw ea, 72(sp) # Load the Program Counter
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ldw r16, 76(sp)
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ldw r17, 80(sp)
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ldw r18, 84(sp)
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ldw r19, 88(sp)
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ldw r20, 92(sp)
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ldw r21, 96(sp)
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ldw r22, 100(sp)
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ldw r23, 104(sp)
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ldw gp, 108(sp)
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ldw fp, 112(sp)
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addi sp, sp, 116 # Release stack space
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eret # Return to address ea, loading eStatus into Status.
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.section .exceptions.soft, "xa"
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soft_exceptions:
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ldw et, 0(ea) # Load the instruction where the interrupt occured.
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movhi at, %hi(0x003B683A) # Load the registers with the trap instruction code
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ori at, at, %lo(0x003B683A)
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cmpne et, et, at # Compare the trap instruction code to the last excuted instruction
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beq et, r0, call_scheduler # its a trap so switchcontext
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break # This is an un-implemented instruction or muldiv problem.
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br restore_context # its something else
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call_scheduler:
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addi ea, ea, 4 # A trap was called, increment the program counter so it is not called again.
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stw ea, 72(sp) # Save the new program counter to the context.
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call vTaskSwitchContext # Pick the next context.
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br restore_sp_from_pxCurrentTCB # Switch in the task context and restore.
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