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281 lines
12 KiB
C
281 lines
12 KiB
C
/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Hardware includes. */
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#include <microblaze_exceptions_i.h>
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#include <microblaze_exceptions_g.h>
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/* The Xilinx library defined exception entry point stacks a number of
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registers. These definitions are offsets from the stack pointer to the various
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stacked register values. */
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#define portexR3_STACK_OFFSET 4
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#define portexR4_STACK_OFFSET 5
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#define portexR5_STACK_OFFSET 6
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#define portexR6_STACK_OFFSET 7
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#define portexR7_STACK_OFFSET 8
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#define portexR8_STACK_OFFSET 9
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#define portexR9_STACK_OFFSET 10
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#define portexR10_STACK_OFFSET 11
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#define portexR11_STACK_OFFSET 12
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#define portexR12_STACK_OFFSET 13
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#define portexR15_STACK_OFFSET 16
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#define portexR18_STACK_OFFSET 19
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#define portexMSR_STACK_OFFSET 20
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#define portexR19_STACK_OFFSET -1
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/* This is defined to equal the size, in bytes, of the stack frame generated by
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the Xilinx standard library exception entry point. It is required to determine
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the stack pointer value prior to the exception being entered. */
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#define portexASM_HANDLER_STACK_FRAME_SIZE 84UL
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/* The number of bytes a MicroBlaze instruction consumes. */
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#define portexINSTRUCTION_SIZE 4
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/* Exclude this entire file if the MicroBlaze is not configured to handle
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exceptions, or the application defined configuration constant
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configINSTALL_EXCEPTION_HANDLERS is not set to 1. */
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#if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )
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/* This variable is set in the exception entry code, before
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vPortExceptionHandler is called. */
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uint32_t *pulStackPointerOnFunctionEntry = NULL;
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/* This is the structure that is filled with the MicroBlaze context as it
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existed immediately prior to the exception occurrence. A pointer to this
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structure is passed into the vApplicationExceptionRegisterDump() callback
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function, if one is defined. */
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static xPortRegisterDump xRegisterDump;
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/* This is the FreeRTOS exception handler that is installed for all exception
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types. It is called from vPortExceptionHanlderEntry() - which is itself defined
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in portasm.S. */
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void vPortExceptionHandler( void *pvExceptionID );
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extern void vPortExceptionHandlerEntry( void *pvExceptionID );
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/*-----------------------------------------------------------*/
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/* vApplicationExceptionRegisterDump() is a callback function that the
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application can optionally define to receive a populated xPortRegisterDump
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structure. If the application chooses not to define a version of
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vApplicationExceptionRegisterDump() then this weekly defined default
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implementation will be called instead. */
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extern void vApplicationExceptionRegisterDump( xPortRegisterDump *xRegisterDump ) __attribute__((weak));
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void vApplicationExceptionRegisterDump( xPortRegisterDump *xRegisterDump )
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{
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( void ) xRegisterDump;
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for( ;; )
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{
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portNOP();
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}
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}
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/*-----------------------------------------------------------*/
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void vPortExceptionHandler( void *pvExceptionID )
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{
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extern void *pxCurrentTCB;
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/* Fill an xPortRegisterDump structure with the MicroBlaze context as it
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was immediately before the exception occurrence. */
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/* First fill in the name and handle of the task that was in the Running
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state when the exception occurred. */
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xRegisterDump.xCurrentTaskHandle = pxCurrentTCB;
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xRegisterDump.pcCurrentTaskName = pcTaskGetName( NULL );
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configASSERT( pulStackPointerOnFunctionEntry );
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/* Obtain the values of registers that were stacked prior to this function
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being called, and may have changed since they were stacked. */
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xRegisterDump.ulR3 = pulStackPointerOnFunctionEntry[ portexR3_STACK_OFFSET ];
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xRegisterDump.ulR4 = pulStackPointerOnFunctionEntry[ portexR4_STACK_OFFSET ];
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xRegisterDump.ulR5 = pulStackPointerOnFunctionEntry[ portexR5_STACK_OFFSET ];
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xRegisterDump.ulR6 = pulStackPointerOnFunctionEntry[ portexR6_STACK_OFFSET ];
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xRegisterDump.ulR7 = pulStackPointerOnFunctionEntry[ portexR7_STACK_OFFSET ];
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xRegisterDump.ulR8 = pulStackPointerOnFunctionEntry[ portexR8_STACK_OFFSET ];
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xRegisterDump.ulR9 = pulStackPointerOnFunctionEntry[ portexR9_STACK_OFFSET ];
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xRegisterDump.ulR10 = pulStackPointerOnFunctionEntry[ portexR10_STACK_OFFSET ];
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xRegisterDump.ulR11 = pulStackPointerOnFunctionEntry[ portexR11_STACK_OFFSET ];
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xRegisterDump.ulR12 = pulStackPointerOnFunctionEntry[ portexR12_STACK_OFFSET ];
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xRegisterDump.ulR15_return_address_from_subroutine = pulStackPointerOnFunctionEntry[ portexR15_STACK_OFFSET ];
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xRegisterDump.ulR18 = pulStackPointerOnFunctionEntry[ portexR18_STACK_OFFSET ];
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xRegisterDump.ulR19 = pulStackPointerOnFunctionEntry[ portexR19_STACK_OFFSET ];
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xRegisterDump.ulMSR = pulStackPointerOnFunctionEntry[ portexMSR_STACK_OFFSET ];
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/* Obtain the value of all other registers. */
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xRegisterDump.ulR2_small_data_area = mfgpr( R2 );
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xRegisterDump.ulR13_read_write_small_data_area = mfgpr( R13 );
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xRegisterDump.ulR14_return_address_from_interrupt = mfgpr( R14 );
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xRegisterDump.ulR16_return_address_from_trap = mfgpr( R16 );
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xRegisterDump.ulR17_return_address_from_exceptions = mfgpr( R17 );
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xRegisterDump.ulR20 = mfgpr( R20 );
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xRegisterDump.ulR21 = mfgpr( R21 );
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xRegisterDump.ulR22 = mfgpr( R22 );
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xRegisterDump.ulR23 = mfgpr( R23 );
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xRegisterDump.ulR24 = mfgpr( R24 );
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xRegisterDump.ulR25 = mfgpr( R25 );
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xRegisterDump.ulR26 = mfgpr( R26 );
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xRegisterDump.ulR27 = mfgpr( R27 );
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xRegisterDump.ulR28 = mfgpr( R28 );
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xRegisterDump.ulR29 = mfgpr( R29 );
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xRegisterDump.ulR30 = mfgpr( R30 );
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xRegisterDump.ulR31 = mfgpr( R31 );
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xRegisterDump.ulR1_SP = ( ( uint32_t ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;
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xRegisterDump.ulEAR = mfear();
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xRegisterDump.ulESR = mfesr();
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xRegisterDump.ulEDR = mfedr();
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/* Move the saved program counter back to the instruction that was executed
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when the exception occurred. This is only valid for certain types of
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exception. */
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xRegisterDump.ulPC = xRegisterDump.ulR17_return_address_from_exceptions - portexINSTRUCTION_SIZE;
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#if( XPAR_MICROBLAZE_USE_FPU != 0 )
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{
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xRegisterDump.ulFSR = mffsr();
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}
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#else
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{
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xRegisterDump.ulFSR = 0UL;
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}
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#endif
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/* Also fill in a string that describes what type of exception this is.
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The string uses the same ID names as defined in the MicroBlaze standard
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library exception header files. */
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switch( ( uint32_t ) pvExceptionID )
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{
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case XEXC_ID_FSL :
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xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FSL";
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break;
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case XEXC_ID_UNALIGNED_ACCESS :
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xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_UNALIGNED_ACCESS";
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break;
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case XEXC_ID_ILLEGAL_OPCODE :
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xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_ILLEGAL_OPCODE";
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break;
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case XEXC_ID_M_AXI_I_EXCEPTION :
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xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";
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break;
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case XEXC_ID_M_AXI_D_EXCEPTION :
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xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";
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break;
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case XEXC_ID_DIV_BY_ZERO :
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xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_DIV_BY_ZERO";
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break;
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case XEXC_ID_STACK_VIOLATION :
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xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";
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break;
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#if( XPAR_MICROBLAZE_USE_FPU != 0 )
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case XEXC_ID_FPU :
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xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FPU see ulFSR value";
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break;
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#endif /* XPAR_MICROBLAZE_USE_FPU */
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}
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/* vApplicationExceptionRegisterDump() is a callback function that the
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application can optionally define to receive the populated xPortRegisterDump
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structure. If the application chooses not to define a version of
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vApplicationExceptionRegisterDump() then the weekly defined default
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implementation within this file will be called instead. */
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vApplicationExceptionRegisterDump( &xRegisterDump );
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/* Must not attempt to leave this function! */
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for( ;; )
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{
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portNOP();
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}
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}
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/*-----------------------------------------------------------*/
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void vPortExceptionsInstallHandlers( void )
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{
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static uint32_t ulHandlersAlreadyInstalled = pdFALSE;
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if( ulHandlersAlreadyInstalled == pdFALSE )
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{
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ulHandlersAlreadyInstalled = pdTRUE;
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#if XPAR_MICROBLAZE_UNALIGNED_EXCEPTIONS == 1
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microblaze_register_exception_handler( XEXC_ID_UNALIGNED_ACCESS, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_UNALIGNED_ACCESS );
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#endif /* XPAR_MICROBLAZE_UNALIGNED_EXCEPTIONS*/
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#if XPAR_MICROBLAZE_ILL_OPCODE_EXCEPTION == 1
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microblaze_register_exception_handler( XEXC_ID_ILLEGAL_OPCODE, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_ILLEGAL_OPCODE );
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#endif /* XPAR_MICROBLAZE_ILL_OPCODE_EXCEPTION */
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#if XPAR_MICROBLAZE_M_AXI_I_BUS_EXCEPTION == 1
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microblaze_register_exception_handler( XEXC_ID_M_AXI_I_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_M_AXI_I_EXCEPTION );
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#endif /* XPAR_MICROBLAZE_M_AXI_I_BUS_EXCEPTION */
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#if XPAR_MICROBLAZE_M_AXI_D_BUS_EXCEPTION == 1
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microblaze_register_exception_handler( XEXC_ID_M_AXI_D_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_M_AXI_D_EXCEPTION );
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#endif /* XPAR_MICROBLAZE_M_AXI_D_BUS_EXCEPTION */
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#if XPAR_MICROBLAZE_IPLB_BUS_EXCEPTION == 1
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microblaze_register_exception_handler( XEXC_ID_IPLB_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_IPLB_EXCEPTION );
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#endif /* XPAR_MICROBLAZE_IPLB_BUS_EXCEPTION */
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#if XPAR_MICROBLAZE_DPLB_BUS_EXCEPTION == 1
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microblaze_register_exception_handler( XEXC_ID_DPLB_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_DPLB_EXCEPTION );
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#endif /* XPAR_MICROBLAZE_DPLB_BUS_EXCEPTION */
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#if XPAR_MICROBLAZE_DIV_ZERO_EXCEPTION == 1
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microblaze_register_exception_handler( XEXC_ID_DIV_BY_ZERO, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_DIV_BY_ZERO );
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#endif /* XPAR_MICROBLAZE_DIV_ZERO_EXCEPTION */
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#if XPAR_MICROBLAZE_FPU_EXCEPTION == 1
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microblaze_register_exception_handler( XEXC_ID_FPU, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_FPU );
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#endif /* XPAR_MICROBLAZE_FPU_EXCEPTION */
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#if XPAR_MICROBLAZE_FSL_EXCEPTION == 1
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microblaze_register_exception_handler( XEXC_ID_FSL, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_FSL );
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#endif /* XPAR_MICROBLAZE_FSL_EXCEPTION */
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microblaze_enable_exceptions();
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}
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}
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/* Exclude the entire file if the MicroBlaze is not configured to handle
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exceptions, or the application defined configuration item
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configINSTALL_EXCEPTION_HANDLERS is not set to 1. */
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#endif /* ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 ) */
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