FreeRTOS-Kernel

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History

Vishwanath Martur b4a970729b Fix RISC-V configMTIMECMP_BASE_ADDRESS (64-bit) stored in 32-bit int (#1176 ) Related to #189 Update `configMTIMECMP_BASE_ADDRESS` to be stored in a 64-bit integer. * Change the type of `ullMachineTimerCompareRegisterBase` to `uint64_t` in `portable/GCC/RISC-V/port.c`. * Change the type of `ullMachineTimerCompareRegisterBase` to `uint64_t` in `portable/IAR/RISC-V/port.c`. * Update the initialization of `ullMachineTimerCompareRegisterBase` to use `configMTIMECMP_BASE_ADDRESS` in both files. Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>		4 months ago
..
chip_specific_extensions	Use Regex for Copyright Year in Header Check (#1002 )	1 year ago
Documentation.url	Normalize line endings and whitespace in source files	2 years ago
chip_extensions.cmake	Support configurable RISC-V chip extension (#773 )	1 year ago
port.c	Fix RISC-V configMTIMECMP_BASE_ADDRESS (64-bit) stored in 32-bit int (#1176 )	4 months ago
portASM.s	Fix the pxTopcOfStack typo in the RISC-V ports. (#1030 )	11 months ago
portContext.h	Use Regex for Copyright Year in Header Check (#1002 )	1 year ago
portmacro.h	Use Regex for Copyright Year in Header Check (#1002 )	1 year ago
readme.txt	Normalize line endings and whitespace in source files	2 years ago

readme.txt

/*
 * The FreeRTOS kernel's RISC-V port is split between the the code that is
 * common across all currently supported RISC-V chips (implementations of the
 * RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
 *
 * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
 *   is common to all currently supported RISC-V chips.  There is only one
 *   portASM.S file because the same file is built for all RISC-V target chips.
 *
 * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
 *   code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
 *   chip.  There are multiple freertos_risc_v_chip_specific_extensions.h files
 *   as there are multiple RISC-V chip implementations.
 *
 * !!!NOTE!!!
 * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
 * HEADER FILE FOR THE CHIP IN USE.  This is done using the assembler's (not the
 * compiler's!) include path.  For example, if the chip in use includes a core
 * local interrupter (CLINT) and does not include any chip specific register
 * extensions then add the path below to the assembler's include path:
 * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
 *
 */