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548 lines
15 KiB
C
548 lines
15 KiB
C
/*
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* FreeRTOS Kernel V10.2.0
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* Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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/**
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* @file atomic.h
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* @brief FreeRTOS atomic operation support.
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*
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* Two implementations of atomic are given in this header file:
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* 1. Disabling interrupt globally.
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* 2. ISA native atomic support.
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* The former is available to all ports (compiler-architecture combination),
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* while the latter is only available to ports compiling with GCC (version at
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* least 4.7.0), which also have ISA atomic support.
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*
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* User can select which implementation to use by:
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* setting/clearing configUSE_ATOMIC_INSTRUCTION in FreeRTOSConfig.h.
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* Define AND set configUSE_ATOMIC_INSTRUCTION to 1 for ISA native atomic support.
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* Undefine OR clear configUSE_ATOMIC_INSTRUCTION for disabling global interrupt
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* implementation.
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*
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* @see GCC Built-in Functions for Memory Model Aware Atomic Operations
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* https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html
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*/
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#ifndef ATOMIC_H
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#define ATOMIC_H
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#ifndef INC_FREERTOS_H
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#error "include FreeRTOS.h must appear in source files before include atomic.h"
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#endif
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/* Standard includes. */
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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/* Needed for __atomic_compare_exchange() weak=false. */
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#include <stdbool.h>
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/* This branch is for GCC compiler and GCC compiler only. */
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#ifndef portFORCE_INLINE
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#define portFORCE_INLINE inline __attribute__((always_inline))
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#endif
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#else
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/* Port specific definitions -- entering/exiting critical section.
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* Refer template -- ./lib/FreeRTOS/portable/Compiler/Arch/portmacro.h
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*
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* Every call to ATOMIC_EXIT_CRITICAL() must be closely paired with
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* ATOMIC_ENTER_CRITICAL().
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*/
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#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
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/* Nested interrupt scheme is supported in this port. */
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#define ATOMIC_ENTER_CRITICAL() \
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UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR()
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#define ATOMIC_EXIT_CRITICAL() \
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portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType )
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#else
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/* Nested interrupt scheme is NOT supported in this port. */
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#define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL()
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#define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL()
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#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */
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/* Port specific definition -- "always inline".
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* Inline is compiler specific, and may not always get inlined depending on your optimization level.
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* Also, inline is considerred as performance optimization for atomic.
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* Thus, if portFORCE_INLINE is not provided by portmacro.h, instead of resulting error,
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* simply define it.
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*/
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#ifndef portFORCE_INLINE
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#define portFORCE_INLINE
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#endif
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#endif /* configUSE_GCC_BUILTIN_ATOMICS */
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#define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */
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#define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */
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/*----------------------------- Swap && CAS ------------------------------*/
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/**
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* Atomic compare-and-swap
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*
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* @brief Performs an atomic compare-and-swap operation on the specified values.
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*
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* @param[in, out] pDestination Pointer to memory location from where value is
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* to be loaded and checked.
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* @param[in] ulExchange If condition meets, write this value to memory.
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* @param[in] ulComparand Swap condition.
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*
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* @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
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*
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* @note This function only swaps *pDestination with ulExchange, if previous
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* *pDestination value equals ulComparand.
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*/
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static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32(
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uint32_t volatile * pDestination,
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uint32_t ulExchange,
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uint32_t ulComparand )
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{
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uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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if ( __atomic_compare_exchange( pDestination,
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&ulComparand,
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&ulExchange,
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false,
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__ATOMIC_SEQ_CST,
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__ATOMIC_SEQ_CST ) )
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{
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ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
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}
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#else
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ATOMIC_ENTER_CRITICAL();
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if ( *pDestination == ulComparand )
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{
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*pDestination = ulExchange;
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ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
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}
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ATOMIC_EXIT_CRITICAL();
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#endif
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return ulReturnValue;
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}
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/**
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* Atomic swap (pointers)
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*
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* @brief Atomically sets the address pointed to by *ppDestination to the value
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* of *pExchange.
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*
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* @param[in, out] ppDestination Pointer to memory location from where a pointer
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* value is to be loaded and written back to.
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* @param[in] pExchange Pointer value to be written to *ppDestination.
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*
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* @return The initial value of *ppDestination.
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*/
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static portFORCE_INLINE void * Atomic_SwapPointers_p32(
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void * volatile * ppDestination,
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void * pExchange )
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{
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void * pReturnValue;
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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__atomic_exchange( ppDestination, &pExchange, &pReturnValue, __ATOMIC_SEQ_CST );
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#else
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ATOMIC_ENTER_CRITICAL();
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pReturnValue = *ppDestination;
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*ppDestination = pExchange;
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ATOMIC_EXIT_CRITICAL();
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#endif
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return pReturnValue;
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}
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/**
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* Atomic compare-and-swap (pointers)
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*
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* @brief Performs an atomic compare-and-swap operation on the specified pointer
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* values.
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*
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* @param[in, out] ppDestination Pointer to memory location from where a pointer
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* value is to be loaded and checked.
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* @param[in] pExchange If condition meets, write this value to memory.
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* @param[in] pComparand Swap condition.
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*
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* @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
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*
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* @note This function only swaps *ppDestination with pExchange, if previous
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* *ppDestination value equals pComparand.
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*/
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static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32(
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void * volatile * ppDestination,
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void * pExchange, void * pComparand )
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{
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uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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if ( __atomic_compare_exchange( ppDestination,
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&pComparand,
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&pExchange,
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false,
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__ATOMIC_SEQ_CST,
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__ATOMIC_SEQ_CST ) )
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{
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ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
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}
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#else
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ATOMIC_ENTER_CRITICAL();
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if ( *ppDestination == pComparand )
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{
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*ppDestination = pExchange;
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ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
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}
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ATOMIC_EXIT_CRITICAL();
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#endif
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return ulReturnValue;
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}
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/*----------------------------- Arithmetic ------------------------------*/
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/**
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* Atomic add
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*
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* @brief Atomically adds count to the value of the specified pointer points to.
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*
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* @param[in,out] pAddend Pointer to memory location from where value is to be
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* loaded and written back to.
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* @param[in] ulCount Value to be added to *pAddend.
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*
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* @return previous *pAddend value.
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*/
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static portFORCE_INLINE uint32_t Atomic_Add_u32(
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uint32_t volatile * pAddend,
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uint32_t ulCount )
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{
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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return __atomic_fetch_add(pAddend, ulCount, __ATOMIC_SEQ_CST);
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#else
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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ulCurrent = *pAddend;
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*pAddend += ulCount;
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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#endif
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}
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/**
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* Atomic subtract
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*
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* @brief Atomically subtracts count from the value of the specified pointer
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* pointers to.
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*
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* @param[in,out] pAddend Pointer to memory location from where value is to be
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* loaded and written back to.
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* @param[in] ulCount Value to be subtract from *pAddend.
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*
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* @return previous *pAddend value.
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*/
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static portFORCE_INLINE uint32_t Atomic_Subtract_u32(
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uint32_t volatile * pAddend,
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uint32_t ulCount )
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{
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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return __atomic_fetch_sub(pAddend, ulCount, __ATOMIC_SEQ_CST);
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#else
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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ulCurrent = *pAddend;
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*pAddend -= ulCount;
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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#endif
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}
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/**
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* Atomic increment
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*
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* @brief Atomically increments the value of the specified pointer points to.
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*
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* @param[in,out] pAddend Pointer to memory location from where value is to be
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* loaded and written back to.
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*
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* @return *pAddend value before increment.
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*/
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static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pAddend )
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{
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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return __atomic_fetch_add(pAddend, 1, __ATOMIC_SEQ_CST);
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#else
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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ulCurrent = *pAddend;
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*pAddend += 1;
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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#endif
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}
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/**
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* Atomic decrement
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*
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* @brief Atomically decrements the value of the specified pointer points to
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*
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* @param[in,out] pAddend Pointer to memory location from where value is to be
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* loaded and written back to.
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*
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* @return *pAddend value before decrement.
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*/
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static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pAddend )
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{
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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return __atomic_fetch_sub(pAddend, 1, __ATOMIC_SEQ_CST);
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#else
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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ulCurrent = *pAddend;
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*pAddend -= 1;
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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#endif
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}
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/*----------------------------- Bitwise Logical ------------------------------*/
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/**
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* Atomic OR
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*
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* @brief Performs an atomic OR operation on the specified values.
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*
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* @param [in, out] pDestination Pointer to memory location from where value is
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* to be loaded and written back to.
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* @param [in] ulValue Value to be ORed with *pDestination.
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*
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* @return The original value of *pDestination.
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*/
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static portFORCE_INLINE uint32_t Atomic_OR_u32(
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uint32_t volatile * pDestination,
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uint32_t ulValue )
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{
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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return __atomic_fetch_or(pDestination, ulValue, __ATOMIC_SEQ_CST);
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#else
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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ulCurrent = *pDestination;
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*pDestination |= ulValue;
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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#endif
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}
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/**
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* Atomic AND
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*
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* @brief Performs an atomic AND operation on the specified values.
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*
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* @param [in, out] pDestination Pointer to memory location from where value is
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* to be loaded and written back to.
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* @param [in] ulValue Value to be ANDed with *pDestination.
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*
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* @return The original value of *pDestination.
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*/
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static portFORCE_INLINE uint32_t Atomic_AND_u32(
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uint32_t volatile * pDestination,
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uint32_t ulValue )
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{
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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return __atomic_fetch_and(pDestination, ulValue, __ATOMIC_SEQ_CST);
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#else
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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ulCurrent = *pDestination;
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*pDestination &= ulValue;
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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#endif
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}
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/**
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* Atomic NAND
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*
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* @brief Performs an atomic NAND operation on the specified values.
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*
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* @param [in, out] pDestination Pointer to memory location from where value is
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* to be loaded and written back to.
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* @param [in] ulValue Value to be NANDed with *pDestination.
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*
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* @return The original value of *pDestination.
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*/
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static portFORCE_INLINE uint32_t Atomic_NAND_u32(
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uint32_t volatile * pDestination,
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uint32_t ulValue )
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{
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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return __atomic_fetch_nand(pDestination, ulValue, __ATOMIC_SEQ_CST);
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#else
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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ulCurrent = *pDestination;
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*pDestination = ~(ulCurrent & ulValue);
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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#endif
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}
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/**
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* Atomic XOR
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*
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* @brief Performs an atomic XOR operation on the specified values.
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*
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* @param [in, out] pDestination Pointer to memory location from where value is
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* to be loaded and written back to.
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* @param [in] ulValue Value to be XORed with *pDestination.
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*
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* @return The original value of *pDestination.
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*/
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static portFORCE_INLINE uint32_t Atomic_XOR_u32(
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uint32_t volatile * pDestination,
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uint32_t ulValue )
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{
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#if defined ( configUSE_GCC_BUILTIN_ATOMICS ) && ( configUSE_GCC_BUILTIN_ATOMICS == 1 )
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return __atomic_fetch_xor(pDestination, ulValue, __ATOMIC_SEQ_CST);
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#else
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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ulCurrent = *pDestination;
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*pDestination ^= ulValue;
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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#endif
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* ATOMIC_H */
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