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989bc332b2
* Add XMOS XCore ports Some minor modifications are also made to the kernel to support the XCore compiler's automatic stack size calculation. * Update kernel to support SMP The XMOS XCore ports are also updated to support SMP. * Fix compiler warnings in xcore ports The port set and clear interrupt mask from ISR macros were removed from the ports so that the default macros found in FreeRTOS.h are used instead. The default macros do not result in warnings when they are used. * Remove inline function from timers.h Inline function converted to macro. This should now build when optimizations are off and inlining is disabled. * Fix compiler warnings in xcore ports and tasks.c * fixed documentation for ulTaskNotifyTake() and ulTaskNotifyTakeIndexed() * spelling fixes for tasks.c Co-authored-by: Michael Bruno <mikeb@xmos.com> |
4 years ago | |
|---|---|---|
| .. | ||
| chip_specific_extensions | 4 years ago | |
| Documentation.url | 4 years ago | |
| port.c | 4 years ago | |
| portASM.S | 4 years ago | |
| portmacro.h | 4 years ago | |
| readme.txt | 4 years ago | |
readme.txt
/* * The FreeRTOS kernel's RISC-V port is split between the the code that is * common across all currently supported RISC-V chips (implementations of the * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: * * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that * is common to all currently supported RISC-V chips. There is only one * portASM.S file because the same file is built for all RISC-V target chips. * * + Header files called freertos_risc_v_chip_specific_extensions.h contain the * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files * as there are multiple RISC-V chip implementations. * * !!!NOTE!!! * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the * compiler's!) include path. For example, if the chip in use includes a core * local interrupter (CLINT) and does not include any chip specific register * extensions then add the path below to the assembler's include path: * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions * */