;/*
;    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
;
;    ***************************************************************************
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;
;    This file is part of the FreeRTOS distribution.
;
;    FreeRTOS is free software; you can redistribute it and/or modify it under
;    the terms of the GNU General Public License (version 2) as published by the
;    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
;    ***NOTE*** The exception to the GPL is included to allow you to distribute
;    a combined work that includes FreeRTOS without being obliged to provide the
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;    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
;    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
;    more details. You should have received a copy of the GNU General Public 
;    License and the FreeRTOS license exception along with FreeRTOS; if not it 
;    can be viewed here: http://www.freertos.org/a00114.html and also obtained 
;    by writing to Richard Barry, contact details for whom are available on the
;    FreeRTOS WEB site.
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;
;    http://www.FreeRTOS.org - Documentation, latest information, license and
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;*/
#include "ISR_Support.h"
;------------------------------------------------------------------------------

#if __CORE__ != __78K0R__
	#error "This file is only for 78K0R Devices"
#endif

#define CS                    0xFFFFC
#define ES                    0xFFFFD

; Functions implemented in this file
;------------------------------------------------------------------------------
	PUBLIC    vPortYield
	PUBLIC    vPortStart

; Functions used by scheduler
;------------------------------------------------------------------------------
	EXTERN    vTaskSwitchContext
	EXTERN    vTaskIncrementTick

; Tick ISR Prototype
;------------------------------------------------------------------------------
;	EXTERN    ?CL78K0R_V2_L00

	PUBWEAK   `??MD_INTTM05??INTVEC 68`
	PUBLIC    MD_INTTM05

MD_INTTM05    SYMBOL "MD_INTTM05"
`??MD_INTTM05??INTVEC 68` SYMBOL "??INTVEC 68", MD_INTTM05



;------------------------------------------------------------------------------
;   Yield to another task.  Implemented as a software interrupt.  The return
;   address and PSW will have been saved to the stack automatically before
;   this code runs.
;
;   Input:  NONE
;
;   Call:   CALL    vPortYield
;
;   Output: NONE
;
;------------------------------------------------------------------------------
    RSEG CODE:CODE
vPortYield:
	portSAVE_CONTEXT		        ; Save the context of the current task.
	call      vTaskSwitchContext    ; Call the scheduler to select the next task.
	portRESTORE_CONTEXT		        ; Restore the context of the next task to run.
	retb

	
;------------------------------------------------------------------------------
;   Restore the context of the first task that is going to run.
;
;   Input:  NONE
;
;   Call:   CALL    vPortStart
;
;   Output: NONE
;
;------------------------------------------------------------------------------	
    RSEG CODE:CODE
vPortStart:
	portRESTORE_CONTEXT	            ; Restore the context of whichever task the ...
	reti					        ; An interrupt stack frame is used so the task
                                    ; is started using a RETI instruction.

;------------------------------------------------------------------------------
;   Perform the necessary steps of the Tick Count Increment and Task Switch
;   depending on the chosen kernel configuration
;
;   Input:  NONE
;
;   Call:   ISR
;
;   Output: NONE
;
;------------------------------------------------------------------------------	

MD_INTTM05:

	portSAVE_CONTEXT		        ; Save the context of the current task.
	call      vTaskIncrementTick    ; Call the timer tick function.
#if configUSE_PREEMPTION == 1
	call      vTaskSwitchContext    ; Call the scheduler to select the next task.
#endif
	portRESTORE_CONTEXT		        ; Restore the context of the next task to run.
	reti



;	REQUIRE ?CL78K0R_V2_L00
	COMMON INTVEC:CODE:ROOT(1)      ; Set ISR location to the Interrupt vector table.
	ORG 68
`??MD_INTTM05??INTVEC 68`:
	DW MD_INTTM05

	COMMON INTVEC:CODE:ROOT(1)      ; Set ISR location to the Interrupt vector table.
	ORG 126
`??vPortYield??INTVEC 126`:
	DW vPortYield

									; Set value for the usCriticalNesting.
	RSEG NEAR_ID:CONST:SORT:NOROOT(1)
`?<Initializer for usCriticalNesting>`:
	DW 10

;#endif

      END