Commit Graph

92 Commits (fd02010886d1f709911d5a880b0bc5a426210cc2)

Author SHA1 Message Date
Richard Barry fd02010886 Kernel changes:
+ Made xTaskNotifyGiveFromISR() its own function, rather than a macro that calls xTaskNotifyFromISR() (minor performance improvement).
+ GCC and Keil Cortex-M4F ports now use vPortRaiseBASEPRI() in place of ulPortRaiseBASEPRI() where the return value is not required (minor performance improvement).

Demo changes:
Change the [very basic] FreeRTOS+UDP SAM4E driver to use task notifications rather than a semaphore (execution time now 55% what it was in FreeRTOS V8.1.2!).
Robustness improvements to IntQueue.c standard demo task.h.
Added the latest standard demo tasks, reg test tasks and int q  tasks to the SAM4E demo.
10 years ago
Richard Barry 2de32c0141 Kernel changes:
+ Do not attempt to free the stack of a deleted task if the stack was statically allocated.
+ Introduce configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES - which optionally writes known values into the list and list item data structures in order to assist with the detection of memory corruptions.

Microblase port:  
+Change occurrences of #if XPAR_MICROBLAZE_0_USE_FPU == 1 to 	#if XPAR_MICROBLAZE_0_USE_FPU != 0 as the value can also be 2 or 3.

Demo app modifications:
+ Update Zynq project to use the 2014.4 tools and add in tests for the new task notification feature.
+ Update SAM4S project to include tests for the new task notification feature.
10 years ago
Richard Barry f407b70dcc + Update demos that use FreeRTOS+Trace to work with the latest trace recorder library.
+ Fix a few compiler warnings.
+ Add TickType_t specific critical sections so critical sections are not used when accessing the tick count in cases where the access is atomic (32-bit tick count, 32-bit architecture).
10 years ago
Richard Barry 85fb1cc024 + New feature added: Task notifications.
+ Optimise Cortex-M4F ports by inlining some critical section macros.
+ Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h.
+ Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked.
+ Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos.
+ Update trace recorder code, and some demos to use the new version (more to do).
+ Introduce uxTaskPriorityGetFromISR().
+ Minor typo corrections.
+ Update MingW simulator demo to match the MSVC simulator demo.
10 years ago
Richard Barry 9e66637bec Core kernel files:
+ Change how queues are allocated and deleted so only one pvPortMalloc() or vPortFree() is required in place of the previous 2.
+ Where the TCB is allocated in relation to the stack is now dependent on the stack growth direction.  The stack will not grow into the TCB.
+ Introduce the configAPPLICATION_ALLOCATED_HEAP constant to allow the application to provide the array used by heap_4.c as its heap.  This allows the application writer to use qualifiers on the array to, for example, force the memory into faster RAM.

Demo application:
+ Add demo for SAMA5D4 using IAR.
10 years ago
Richard Barry d55e7e77a2 Update version number to 8.1.2 after moving the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into individual port layers so it does not affect ports that do not support the definition. 11 years ago
Richard Barry a60ce58731 Update version number to 8.1.1 for patch release that re-enables mutexes to be given from an interrupt. 11 years ago
Richard Barry d33a14b5fb ***IMMINENT RELEASE NOTICE***
Update version numbers ready for FreeRTOS V8.1.0 release in about 10 days.
11 years ago
Richard Barry 52e687086c Demo application related:
+ Update the RZ IAR project so it targets the RZ RSK rather than custom hardware.
+ Update the RZ ARM/DS-5 project so it targets the RZ RSK rather than custom hardware.
+ Updated RX64M demos to use the new iodefine.h naming.

Cortex-A9 port related:
+ Update IAR, ARM and GCC Cortex-A9 port layers to include a 'task exit error' function which is called if a task attempts to incorrectly exit its implementing function.
+ Moved the instruction which switches into system mode out of the restore context macro, as it is only needed when starting the first task.

Core kernel files related:
+ Ensure there are no references to the mutexes held count when mutexes are excluded from the build.
11 years ago
Richard Barry 113220628f Add code to assert() if non ISR safe API function is called from ISR in IAR and GCC CM3 and CM4F ports - Keil and tasking to follow. 11 years ago
Richard Barry 4723209074 Simplify the assert that checks if a non-ISR safe function is called from an ISR in the GCC Cortex-A9 port. 11 years ago
Richard Barry 8426eba8e7 Added portASSERT_IF_IN_INTERRUPT() macro to the GCC Cortex A9 port layer. 11 years ago
Richard Barry 9efb5c8b2f Check in RL78 GCC port layer now it has been verified with the fixed compiler. 11 years ago
Richard Barry 1130a53ec8 Reverse order of projdefs.h and FreeRTOSConfig.h includes in FreeRTOS.h to allow addition of pdMS_TO_TICKS() macro.
Update RXv2 GCC port to match RXv2 Renesas port.
11 years ago
Richard Barry b215310e63 Add some missing volatiles to __asm statements in the CA9 GCC port. 11 years ago
Richard Barry 0bb794301a Update version number ready for release. 11 years ago
Richard Barry 911e82a909 Add xQueueGetMutexHolder() to MPU functions. 11 years ago
Richard Barry f25503977e Event Groups: Convert the 'clear bits from ISR' function into a pended function to fix reentrancy issue.
Event Groups: Ensure the 'wait bits' and 'sync' functions don't return values that still contain some internal control bits.
11 years ago
Richard Barry 29a08b5e24 Update Cortex-A port layers to ensure the ICCRPR and ICCPMR registers are always accessed as 32-bit values. 11 years ago
Richard Barry e101e7e437 Update version number to V8.0.0 (without the release candidate number). 11 years ago
Richard Barry 84f4ae9aa0 Make xTaskIsTaskSuspended() a private function as it should only be called from within critical sections.
Fix issue in and simplify the xTaskRemoveFromUnorderedEventList() function.  The function is new to the V8 release candidates so does not effect official released code.
11 years ago
Richard Barry f843888e60 Complete GCC/Cortex-A9 port. 11 years ago
Richard Barry 51ea2639a9 vQueueAddToRegistry() now takes a const char * instead of a char *.
tmrCOMMAND_CHANGE_PERIOD_FROM_ISR constant added for the "FromISR" version of the software timer change period API function.
11 years ago
Richard Barry b352be2e23 Tidy up GCC Cortex-A port layer - still a work in progress. 11 years ago
Richard Barry 14f895478d Continue work on GCC/Cortex-A port layer. 11 years ago
Richard Barry d0323e67ae Continue working on GCC/CA_9 port layer - tick interrupt now working but needs tidy up. 11 years ago
Richard Barry 3e430b3801 Carry on working on the Cortex-A/GCC port layer - still a work in progress. 11 years ago
Richard Barry 86023aa5a6 Beginnings of GCC Cortex-A port - not yet completely converted from IAR version. 11 years ago
Richard Barry f01bf9fdc3 Add additional NOP after EINT instruction in MSP430 ports. 11 years ago
Richard Barry 1aaa80fba6 Map portTICK_RATE_MS to portTICK_PERIOD_MS. 11 years ago
Richard Barry a56d4b998c Minor tidy ups that don't effect code generation, plus:
When a task is unblocked the need for a context switch is only signalled if the unblocked task has a priority higher than the currently running task, instead of higher than or equal to the priority of the currently running task.
11 years ago
Richard Barry a8836b5c43 Change version numbers ready for V8.0.0 release candidate 1 tag. 11 years ago
Richard Barry 2aa19f1a14 Add xEventGroupClearBitsFromISR() and xEventGroupGetBitsFromISR() functions.
Move some types defines out of generic kernel headers into feature specific headers.
Convert the function prototype dypedefs to the new _t naming.
11 years ago
Richard Barry e95b482f56 Minor updates to demo projects to ensure correct building with V8 rc1. 11 years ago
Richard Barry 2b6eb1c5ab Revert some library files back to using standard types as they are not FreeRTOS files. 11 years ago
Richard Barry 3e20aa7d60 Replace standard types with stdint.h types.
Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
11 years ago
Richard Barry b4116a7c7d Change the type used for strings and single characters from signed char to just char. 11 years ago
Richard Barry 4b2f9dad42 Force the SysTick clock bit to be set in Cortex-M3 and Cortex-M4F bits if configSYSTICK_CLOCK_HZ is not defined, otherwise leave the bit as it is found as the SysTick may use a divided clock. 11 years ago
Richard Barry 0d1e12522b Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ).
Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
11 years ago
Richard Barry 00ad1a0200 Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review. 11 years ago
Richard Barry 0cd79ad81d Change version numbers in preparation for V7.6.0 release. 11 years ago
Richard Barry b181a3af99 Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports).
Remove duplicate save/restore of r14 in Cortex-M4F ports.
11 years ago
Richard Barry dcd261bb8b Update the Keil and IAR CM0 port layers to match the changes made to the GCC version. 11 years ago
Richard Barry 41fe693968 Improve how the scheduler is started in the GCC Cortex-M0 port. 11 years ago
Richard Barry a12ea2d212 Update FreeRTOS version number to V7.5.3
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
11 years ago
Richard Barry 0c56f5018d Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete. 11 years ago
Richard Barry aedf7824cb Introduce the prvTaskExitError() function for all ARM_CMn ports.
Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
11 years ago
Richard Barry eaacbb099a Clear up a few compiler warnings.
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt.  Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
11 years ago
Richard Barry 73606369c4 Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
12 years ago
Richard Barry 2f754d9b0c Add additional critical section to the default tickless implementations.
Update version number for maintenance release.
12 years ago