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V10.4.3-LTS-Patch-3
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V202110.00-SMP
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V10.3.0
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Commit Graph

2 Commits (e4e86a464ee7146a4e1373f4efc3af5752603e45)

Author SHA1 Message Date
Richard Barry b2b1b09ea5 Fix bug in core_cm3.c atomic macros. 
Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
 6 years ago
Richard Barry f7102f2342 Add a starting point for a Freedom Studio Risc V project. 6 years ago