Richard Barry
96bad0f6c3
Minor bug fix in NTPDemo.c -> use of FREERTOS_INVALID_SOCKET in place of NULL.
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Update trace recorder code to account for uxPendedTicks renaming to xPendedTicks.
6 years ago
Richard Barry
b51529a284
Update version number ready for next release.
6 years ago
Richard Barry
58ba10eee8
Update version number in readiness for V10.2.0 release.
6 years ago
Richard Barry
6844bef74f
Replace the pdf RISC-V documentation with links to the documentation web pages.
6 years ago
Richard Barry
b2b1b09ea5
Fix bug in core_cm3.c atomic macros.
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Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
6 years ago
Richard Barry
fb73829148
Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().
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Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
6 years ago
Richard Barry
80df5cd517
Update the pin mux setup on the Vega board demo to enable the LED.
6 years ago
Richard Barry
11d9c440b8
Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
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Add a project for the Vega board's RI5CY core.
6 years ago