+ Updated all ARM Cortex-M0 ports to include an additional ISB instruction as the scheduler is started.
Demo app files:
+ Fixex build issues in XMC1000 demos.
+ Fix a few compiler warnings.
+ Add TickType_t specific critical sections so critical sections are not used when accessing the tick count in cases where the access is atomic (32-bit tick count, 32-bit architecture).
Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt. Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
Add portYIELD_FROM_ISR() macros to Cortex-M ports. The new macro just calls the exiting portEND_SWITCHING_ISR() macro.
Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
Richard Barry