Commit Graph

94 Commits (a22d5ff5a57ca4e4e42d4157ed39ef5a21cca578)

Author SHA1 Message Date
Richard Barry f54f21b8f6 Add event_groups.c and associated functions in other core files.
Added xTimerPendCallbackFromISR() to provide a centralised deferred interrupt handling mechanism.
Add xPortGetLowestEverFreeHeapSize() to heap_4.c.
11 years ago
Richard Barry fa002f7fdd Final tidy up before V7.6.0 zip file creation. 11 years ago
Richard Barry 0cd79ad81d Change version numbers in preparation for V7.6.0 release. 11 years ago
Richard Barry b181a3af99 Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports).
Remove duplicate save/restore of r14 in Cortex-M4F ports.
11 years ago
Richard Barry 30bc6c01a9 Add ehb instructions back into PIC32 port layer (upon advice).
Add configCLEAR_TICK_TIMER_INTERRUPT into PIC32 port layer to allow the timer configuration to be changed without any edits to the port layer being required.
Add prvTaskExitError() into the PIC32 port layer to trap tasks that attempt to exit from their implementing function.
Provide the ability to trap interrupt stack overflows in the PIC32 port.
Radically improve the timing in the Win32 simulator port layer.
11 years ago
Richard Barry dcd261bb8b Update the Keil and IAR CM0 port layers to match the changes made to the GCC version. 11 years ago
Richard Barry 41fe693968 Improve how the scheduler is started in the GCC Cortex-M0 port. 11 years ago
Richard Barry a12ea2d212 Update FreeRTOS version number to V7.5.3
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
11 years ago
Richard Barry 94607d83f9 Add workaround to XMC4000 silicon bug to Tasking Cortex-M4F port layer. 11 years ago
Richard Barry 0c56f5018d Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete. 11 years ago
Richard Barry aedf7824cb Introduce the prvTaskExitError() function for all ARM_CMn ports.
Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
11 years ago
Richard Barry eaacbb099a Clear up a few compiler warnings.
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt.  Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
11 years ago
Richard Barry 7ec4773131 Add traceMALLOC() and traceFREE() macros. 11 years ago
Richard Barry 73606369c4 Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
12 years ago
Richard Barry 574f5044a6 Starting point for Keil Cortex-M0 port. 12 years ago
Richard Barry c40370e96a Fix a few typos and remove the "register" keyword. 12 years ago
Richard Barry 2f754d9b0c Add additional critical section to the default tickless implementations.
Update version number for maintenance release.
12 years ago
Richard Barry 3cbe0a724d Update version number. 12 years ago
Richard Barry bb2093cf5d Update the header file included in the PIC32 port_asm.S file to use the header for the latest compiler version. 12 years ago
Richard Barry 679a3c670c Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library. 12 years ago
Richard Barry 203ae64600 Rename xTaskGetSystemState() uxTaskGetSystemState(). 12 years ago
Richard Barry 7d6758ee1a Minor updates and change version number for V7.5.0 release. 12 years ago
Richard Barry 7d1292ced2 Linting and MISRA checking 12 years ago
Richard Barry ce9c3b7413 Variable name change in the PIC32 port layer only. 12 years ago
Richard Barry da0fff63c9 Update Cortex-M MPU version to include new API functions. 12 years ago
Richard Barry e5d9640863 Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined. 12 years ago
Richard Barry 4b964814de Implement portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for PIC32. 12 years ago
Richard Barry ad8fa53043 Kernel optimisations. 12 years ago
Richard Barry 5d902f2b9c Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports. 12 years ago
Richard Barry 65704174c9 Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler.
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
12 years ago
Richard Barry 0f6b0d3a59 Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed.
Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
12 years ago
Richard Barry c4eef61d39 Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports. 12 years ago
Richard Barry 0c0b54c175 Refine the default tickless idle implementation in the Cortex-M3 port layers. 12 years ago
Richard Barry a7c47131fa Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose. 12 years ago
Richard Barry 6cbbfd2eb5 Slight correction to coding standard in heap_2.c and heap_4.c. 12 years ago
Richard Barry fb47260e80 Improve efficiency of memory allocation when the memory block is already aligned correctly. 12 years ago
Richard Barry c3f9e3c5ff Update RVDS port layer to match IAR port layer. 12 years ago
Richard Barry 5013baa2cd RVDS ARM Cortex-A port layer. 12 years ago
Richard Barry 04dafed839 IAR ARM Cortex-A port layer. 12 years ago
Richard Barry 2fd431e971 Modify the GCC/AVR port to make use of the xTaskIncrementTick return value.
Add pre-processor directives in the dsPIC and PIC24 port layers that allows both port files to be included in the same project.
12 years ago
Richard Barry 62c0ae0926 Update port layers to make better use of the xTaskIncrementTick() return value. 12 years ago
Richard Barry 59a834eb86 Update ports that have their tick configuration in an application callback to use xTaskIncrementTick() in place of vTaskIncrementTick(). 12 years ago
Richard Barry c04b074707 Convert the remaining ports to use xTaskIncrementTick() in place of vTaskIncremenTick(). 12 years ago
Richard Barry 2fc9d033c6 Update the PIC32 port to use xTaskIncrementTick() and change the macro used to detect if XC is being used. 12 years ago
Richard Barry 51d9ee0c1c Add configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS mechanism to the relevant port.c file to allow the user to define functions that will execute in privileged mode. 12 years ago
Richard Barry f904d26957 Convert more ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 12 years ago
Richard Barry 15ec6c87f7 Convert mpre ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 12 years ago
Richard Barry 686d190798 Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
Move DSB instructions to before WFI instructions in line with ARM recommendations.
12 years ago
Richard Barry 06953169ba Update RM48/TMS570 port to use xTaskIncrementTick in place of vTaskIncrementTick. 12 years ago
Richard Barry a03b171992 Fix compiler warning in psp_test.c when compiled with ARM compiler.
Add portYIELD_FROM_ISR() macros to Cortex-M ports.  The new macro just calls the exiting portEND_SWITCHING_ISR() macro.
Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
12 years ago