main
smp
V11.1.0
V11.0.1
V11.0.0
V10.6.2
V10.6.1
V10.6.0
V10.5.1
V10.5.0
V10.4.3-LTS-Patch-3
V10.4.6
V10.4.3-LTS-Patch-2
V202110.00-SMP
V10.4.5
V10.4.3-LTS-Patch-1
V10.4.4
V10.4.0-kernel-only
V10.3.0-kernel-only
V10.3.0
PartialReleases
V10.2.1
V10.2.0
V10.1.1
V10.1.0
V10.0.1
V10.0.0
V8.0.1
V9.0.0
V9.0.0rc2
V9.0.0rc1
V8.2.3
V8.2.2
V8.2.1
V8.2.0
V8.2.0rc1
V8.1.2
V8.1.1
V8.1.0
V8.0.0
V8.0.0rc1
V7.6.0
V7.5.3
V7.5.2
V7.5.1
V7.5.0
V7.4.2
V7.4.1
V7.4.0
V7.3.0
V7.2.0
V7.1.1
BackupPoints
V7.1.0
V7.0.2
V7.0.1
V7.0.0
V6.1.1
V6.1.0
V6.0.5
V6.0.4
V6.0.3
V6.0.1
V6.0.0
V5.4.2
V5.4.1
V5.3.1
V5.3.0
V5.2.0
V5.1.2
V5.0.3
V5.0.2
V5.0.0
V4.8.0
V4.7.2
V4.7.1
V4.7.0
V4.6.1
V4.5.0
V4.4.0
V4.3.1
V4.3.0
V4.2.1
V4.2.0
V4.1.3
V4.1.2
V4.1.1
V4.1.0
V4.0.5
V4.0.3
V4.0.2
V4.0.1
V10.3.1-kernel-only
V10.4.1-kernel-only
V10.4.2
V10.4.3
V8.0.0-rc1
V8.2.0-rc1
V9.0.0-rc1
V9.0.0-rc2
${ noResults }
1 Commits (9af72db3ec82993df2f50170bccdf2958ad19137)
| Author | SHA1 | Message | Date |
|---|---|---|---|
Gaurav-Aggarwal-AWS
|
4e3bf0f5c0
|
Add Cortex-A53 port with system register interface for CPU interface access (#357)
The difference between this port and portable/GCC/ARM_CA53_64_BIT is that this port uses System Register interface to access CPU interface while the other one uses Memory-mapped interface. Signed-off-by: Gaurav Aggarwal Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com> |
4 years ago |