Commit Graph

7 Commits (8ca40d80a9836e7a40ecd4b330ebfac235848fac)

Author SHA1 Message Date
Richard Barry 464c2660ad Updates to the Cortex-M tickless idle code to reduce clock slippage.
Updates to prevent the vTaskSwitchContext() function being removed from GCC builds when link time optimisation is used.
8 years ago
Richard Barry 8d041c8e21 Update version number in preparation for maintenance release. 8 years ago
Richard Barry 75ffac21d7 Changes to core code and port layer:
+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
      bit settings.
    + Clear the 'control' register before starting ARM Cortex-M4F ports in case
      the FPU is used before the scheduler is started.  This just saves a few
      bytes on the main stack as it prevents space being left for a later save
      of FPU registers.
    + Added xSemaphoreGetMutexHolderFromISR().
    + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
9 years ago
Richard Barry bdbf347c22 Remove clrex instruction from Cortex-M ports again as it is implicit in interrupt entry. 9 years ago
Richard Barry c296e2cff8 Improvements to the Cortex-M ports:
- Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler).
- Ensure atomic operations are thread safe by executing clrex in the context switch.
9 years ago
Richard Barry 2bd7884ace Prepare for V9.0.0 release:
+ Change version number from V9.0.0rc2 to V9.0.0.
9 years ago
Richard Barry 0721cf102a Completely re-generate the Zynq 7000 demo using the 2016.1 SDK tools.
Introduce configUSE_TASK_FPU_SUPPORT into the GCC Cortex-A9 port to allow tasks to have an FPU context by default.
Add MikroC Cortex-M4F port.
9 years ago