Commit Graph

16 Commits (53842d4cac09e40ce6a1c72338bae98eefa881f8)

Author SHA1 Message Date
Richard Barry b51529a284 Update version number ready for next release. 6 years ago
Richard Barry c3c9c12ce2 Update the common demo death.c to use the updated macro name to give it a secure context. 6 years ago
Gaurav Aggarwal ce576f3683 First Official Release of ARMV8M Support. This release removes Pre-Release from all the ARMv8M files licensees. 6 years ago
Richard Barry 58ba10eee8 Update version number in readiness for V10.2.0 release. 6 years ago
Richard Barry 92ae8e7aff Update version numbers ready for release. 7 years ago
Richard Barry 3a1631fda3 Update copyright date ready for tagging V10.1.0. 7 years ago
Richard Barry fb9de58f56 Update version numbers in preparation for a new release. 7 years ago
Richard Barry 13651934be Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 ready for release. 7 years ago
Richard Barry cfc268814a Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt 7 years ago
Richard Barry 6eea3d8d4b Correct long time mis-spelled portINITIAL_EXEC_RETURN to portINITIAL_EXC_RETURN 8 years ago
Richard Barry 8d041c8e21 Update version number in preparation for maintenance release. 8 years ago
Richard Barry 75ffac21d7 Changes to core code and port layer:
+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
      bit settings.
    + Clear the 'control' register before starting ARM Cortex-M4F ports in case
      the FPU is used before the scheduler is started.  This just saves a few
      bytes on the main stack as it prevents space being left for a later save
      of FPU registers.
    + Added xSemaphoreGetMutexHolderFromISR().
    + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
9 years ago
Richard Barry bdbf347c22 Remove clrex instruction from Cortex-M ports again as it is implicit in interrupt entry. 9 years ago
Richard Barry c296e2cff8 Improvements to the Cortex-M ports:
- Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler).
- Ensure atomic operations are thread safe by executing clrex in the context switch.
9 years ago
Richard Barry 2bd7884ace Prepare for V9.0.0 release:
+ Change version number from V9.0.0rc2 to V9.0.0.
9 years ago
Richard Barry ee9cd40b6d Add GCC ARM Cortex-M4F MPU port.
Add RVDS ARM Cortex-M4F MPU port.
Increase the size of each buffer allocated to pbufs in the Microblaze lwIP demo to prevent pbufs chaining.
Use _start as the top of the stack for each Microblaze task, rather than NULL, as NULL was causing the Xilinx SDK to try and unwind the stack too far.
9 years ago