5 Commits (3f74cd483b24b2326540e8fea6a58f5ce1a909c5)

Author	SHA1	Message	Date
Richard Barry	8d041c8e21	Update version number in preparation for maintenance release.	8 years ago
Richard Barry	979e41c9da	Update UltraScale R5 hardware definition and BSP for 2016.4 SDK tools.	8 years ago
Richard Barry	992a3c8c71	Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions. ... Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise). Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.	8 years ago
Richard Barry	2bd7884ace	Prepare for V9.0.0 release: ... + Change version number from V9.0.0rc2 to V9.0.0.	9 years ago
Richard Barry	324127837c	Update some more standard demos for use on 64-bit architectures. ... Update the Xilinx Ultrascale+ Cortex-A53 (64-bit) and Cortex-R5 (32-bit) demos to use version 2016.1 of the SDK.	9 years ago