Commit Graph

134 Commits (2ee43fbc6426591def2c291e84627bd78c0775b5)

Author SHA1 Message Date
Richard Barry dcd261bb8b Update the Keil and IAR CM0 port layers to match the changes made to the GCC version. 11 years ago
Richard Barry 41fe693968 Improve how the scheduler is started in the GCC Cortex-M0 port. 11 years ago
Richard Barry 25bab250b6 Added a little intelligence to eTaskGetState() so it can distinguish between a suspended task and a task that is indefinitely blocked on an event. 11 years ago
Richard Barry a12ea2d212 Update FreeRTOS version number to V7.5.3
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
11 years ago
Richard Barry 94607d83f9 Add workaround to XMC4000 silicon bug to Tasking Cortex-M4F port layer. 11 years ago
Richard Barry 0c56f5018d Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete. 11 years ago
Richard Barry aedf7824cb Introduce the prvTaskExitError() function for all ARM_CMn ports.
Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
11 years ago
Richard Barry eaacbb099a Clear up a few compiler warnings.
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt.  Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
11 years ago
Richard Barry 7ec4773131 Add traceMALLOC() and traceFREE() macros. 11 years ago
Richard Barry 1902d2b64a Add the uxQueueSpacesAvailable() API function.
Move a configASSERT() call in timers.c to prevent a "condition is always true" compiler warning.
12 years ago
Richard Barry 73606369c4 Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
12 years ago
Richard Barry 574f5044a6 Starting point for Keil Cortex-M0 port. 12 years ago
Richard Barry c40370e96a Fix a few typos and remove the "register" keyword. 12 years ago
Richard Barry 63e8044d33 Allow compilation when portALT_GET_RUN_TIME_COUNTER_VALUE() is defined. 12 years ago
Richard Barry 2f754d9b0c Add additional critical section to the default tickless implementations.
Update version number for maintenance release.
12 years ago
Richard Barry 3cbe0a724d Update version number. 12 years ago
Richard Barry 8ceb665994 Void a few unused return values and make casting more C++ friendly. 12 years ago
Richard Barry bb2093cf5d Update the header file included in the PIC32 port_asm.S file to use the header for the latest compiler version. 12 years ago
Richard Barry 679a3c670c Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library. 12 years ago
Richard Barry 9054485f1a Tidy up pre-processor as final act before tagging as V7.5.0 12 years ago
Richard Barry 08057fa77f Changes to comments only. 12 years ago
Richard Barry 203ae64600 Rename xTaskGetSystemState() uxTaskGetSystemState(). 12 years ago
Richard Barry 92fae7d262 For consistency change the name of configINCLUDE_STATS_FORMATTING_FUNCTIONS to configUSE_STATS_FORMATTING_FUNCTIONS. 12 years ago
Richard Barry 7d6758ee1a Minor updates and change version number for V7.5.0 release. 12 years ago
Richard Barry 7d1292ced2 Linting and MISRA checking 12 years ago
Richard Barry e83b93f5fc Tidy up comments only. 12 years ago
Richard Barry ce9c3b7413 Variable name change in the PIC32 port layer only. 12 years ago
Richard Barry 1e17924fa8 Update doxygen comments. 12 years ago
Richard Barry da0fff63c9 Update Cortex-M MPU version to include new API functions. 12 years ago
Richard Barry e5d9640863 Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined. 12 years ago
Richard Barry 4b964814de Implement portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for PIC32. 12 years ago
Richard Barry ad8fa53043 Kernel optimisations. 12 years ago
Richard Barry c9d9bddc3c Add comments to the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() calls in the core queue.c and tasks.c files. 12 years ago
Richard Barry 5d902f2b9c Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports. 12 years ago
Richard Barry 65704174c9 Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler.
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
12 years ago
Richard Barry 0f6b0d3a59 Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed.
Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
12 years ago
Richard Barry c4eef61d39 Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports. 12 years ago
Richard Barry b521d70e7e Remove compiler warnings. 12 years ago
Richard Barry c1b4fc58d2 Add new xTaskGetSystemState() API function to return raw data on each task in the system.
Relegate the vTaskList() and vTaskGetRunTimeStats() functions to "sample" functions demonstrating how to use xTaskGetSystemState() to generate human readable status information.
Introduce and default configINCLUDE_STATS_FORMATTING_FUNCTIONS which must now be defined to use vTaskList() and vTaskGetRunTimeStats().
12 years ago
Richard Barry 877ce218a4 Add additional comment only. 12 years ago
Richard Barry 0c0b54c175 Refine the default tickless idle implementation in the Cortex-M3 port layers. 12 years ago
Richard Barry b8a219b30c Update QueueOverwrite.c to include a call to xQueuePeekFromISR().
Default new QueuePeekFromISR() trace macros.
12 years ago
Richard Barry 3b02b4c8f8 Add xQueueOverwriteFromISR() and update the QueueOverwrite.c to demonstrate its use. 12 years ago
Richard Barry 671949ad78 Add xQueueOverwrite() and a common demo task to demonstrate its use.
Update MSVC Win32 demo to include the xQueueOverwrite() common demo tasks.
12 years ago
Richard Barry 59f75a12f6 Add Newlib reent support. 12 years ago
Richard Barry 4444b4ee68 Improve efficiency and behaviour of vListInsertEnd(). 12 years ago
Richard Barry f11635ed91 Remove reliance on strncpy() function. 12 years ago
Richard Barry a7c47131fa Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose. 12 years ago
Richard Barry 6cbbfd2eb5 Slight correction to coding standard in heap_2.c and heap_4.c. 12 years ago
Richard Barry fb47260e80 Improve efficiency of memory allocation when the memory block is already aligned correctly. 12 years ago