6844bef74f
Replace the pdf RISC-V documentation with links to the documentation web pages.
6 years ago
b2b1b09ea5
Fix bug in core_cm3.c atomic macros.
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Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
6 years ago
3153131fa7
Add Dornerworks attribution to makefiles that build the Freedom Studio RISC-V project.
6 years ago
7e08fd6d07
Add makefiles that build the FreedomStudio project (provided by Dornerworks - thanks).
6 years ago
fb73829148
Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().
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Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
6 years ago
df5952f655
Add xTaskGetIdleRunTimeCounter() API function to return the run time stats counter for the idle task - useful for POSIX time implementations.
6 years ago
a4941ac5db
Update main.c() for the WIN32-MingW project so the trace recorder is initialized even when the simple blinky demo is used - otherwise the trace recorder causes an exception as it is used without first being initialized.
6 years ago
80df5cd517
Update the pin mux setup on the Vega board demo to enable the LED.
6 years ago
11d9c440b8
Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
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Add a project for the Vega board's RI5CY core.
6 years ago
e2af102c80
Re-org of RISC-V file structure and naming step 2.
6 years ago
60b133b2c6
Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack.
6 years ago
911a1de273
Correct accidental deletion in GenQTest.c.
6 years ago
d369110167
Allow the size of the stack used by many of the standard demo/test tasks to be overridden by FreeRTOSConfig.h settings.
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Update the Freedom Studio RISC-V project so the 'full' build configuration is now functional.
6 years ago
178fe4f143
Update the Freedom Studio RISC-V project so the gdbinit options are now specified on the command line.
6 years ago
e5daf23d75
Update Freedom Studio RISC-V demo for the latest GCC RISC-V port - not yet tested.
6 years ago
80f6f3e59b
Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.
6 years ago
2181c0375e
Backup Microsemi Renode project before adding a build configuration for the target hardware.
6 years ago
8d213b42f2
Add vTimerSetReloadMode() calls to the code coverage tests.
6 years ago
6edabbe7ea
Update the the MPU simulator project to exercise the timer API.
6 years ago
8285ca6b5f
Update RISC-V_IGLOO2_Creative_SoftConsole demo to make use of new RISC-V porting layer structure and exercise some external interrupts - all tests currently passing in Renode.
6 years ago
866635d2ad
Microsemi RISC-V project:
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Reorganize project to separate Microsemi code into its own directory.
Add many more demo and tests.
6 years ago
6b37800ade
Backup checkin of MiFive demo running in ReNode emulator.
6 years ago
9a136a52df
Backup check in of the Microsemi IGLOO2 Creative Board RISC-V demo - still a work in progress.
6 years ago
4b9dd38d1c
Backup checking of the Freedom Studio RISC-V project - still a work in progress.
6 years ago
dc99300fa9
First task running in RISC-V-Qemu-sifive_e-FreedomStudio demo.
6 years ago
d0ef322b13
Add kernel code to the RISC-V-Qemu-sifive_e-FreedomStudio demo.
6 years ago
f7102f2342
Add a starting point for a Freedom Studio Risc V project.
6 years ago
6fab2b9e0d
Add xTaskGetApplicationTaskTagFromISR(), which is an interrupt safe version of xTaskGetApplicationTaskTagFrom().
6 years ago
1af80854e6
Fix Xtensa project file and some documentation improvements.
6 years ago
c6de0001fa
Added uxTaskGetStackHighWaterMark2(), which is the same as uxTaskGetStackHighWaterMark() other than the return type.
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Allows the task name parameter passed into xTaskCreate() to be NULL.
6 years ago
92ae8e7aff
Update version numbers ready for release.
7 years ago
1a235efd2b
Update trace configuration files for the updated trace recorder code.
7 years ago
be9c0730c3
Update trace recorder code to the latest.
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Some minor changes to enable the configREMOVE_STATIC_QUALIFIER constant to be used by those debuggers that cannot cope with statics being used.
7 years ago
893db45834
Changes required for the IAR StateViewer plug-in to work with FreeRTOS V10.1.0.
7 years ago
b0ce1f61c9
Move some variables from function scope back to being file scope for the benefit of some kernel aware debuggers that were left working in a non-functioning mode after the V10.1.0 release - not last change for this purpose.
7 years ago
a11b1a494d
FreeRTOS+UDP was removed in FreeRTOS V10.1.0 as it was replaced by FreeRTOS+TCP,
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which was brought into the main download in FreeRTOS V10.0.0. FreeRTOS+TCP can
be configured as a UDP only stack, and FreeRTOS+UDP does not contain the patches
applied to FreeRTOS+TCP.
7 years ago
3a1631fda3
Update copyright date ready for tagging V10.1.0.
7 years ago
bdb088e66f
Fix some build issues in older kernel demo projects.
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Update to V2.0.7 of the TCP/IP stack:
+ Multiple security improvements and fixes in packet parsing routines, DNS
caching, and TCP sequence number and ID generation.
+ Disable NBNS and LLMNR by default.
+ Add TCP hang protection by default.
We thank Ori Karliner of Zimperium zLabs Team for reporting these issues.
7 years ago
fb9de58f56
Update version numbers in preparation for a new release.
7 years ago
722ca8fb2b
Update demo project for Tensilita - work in progres..
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Add support for POSIX style errno - work in progress.
7 years ago
56dc0dd9b4
Merge bug fixes from Cadence
7 years ago
f6cbf20019
Update RISC-V project to used official port stubs in place of third party port.
7 years ago
f7fc215247
Update stream buffer tests to try resetting a statically allocated stream buffer before deleting it (tests fix in code).
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Update trace recorder library.
7 years ago
9119e1e0e3
Add starting point for IGLOO2 RISV-V demo project.
7 years ago
10eea4aded
Remove period from the URL that links to the web page that describes the FreeRTOSConfig.h parameters.
7 years ago
c4b1afc4ef
Add Xtensa port
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The project file is for Xtensa Xplorer simulator.
Also add tests for one size stream buffer.
7 years ago
d6fcd5dbba
Add the option to specify a stack size in the standard demo MessageBuffer tests.
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Add stream and message buffer tests into the Zynq demo project.
7 years ago
7a9f453f96
Remove casts from EventGroupHandle_t to EventGroup_t, and corresponding lint comments, which are not required now EventGroupHandle_t is type safe.
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Fix the prototype of prvTimerCallback() in the MPU simulator demo (caught due to the new type safety in tasks.c).
7 years ago
d30249789b
Previously the MPSoC Cortex-A53 demo was updated to the latest Xilinx SDK tools to the point where it was building, but not tested. This check in modifies the project files slightly following testing.
7 years ago
26d8c76996
Update Zynq, MPSoc Cortex-A53 and MPSoc Cortex-R5 demo projects to build with the 18.1 version of the Xilinx SDK - building BUT NOT YET TESTED.
7 years ago
Richard Barry
Gaurav Aggarwal