Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
Tidy up CEC1302 demo.
Ensure bit 0 of the task address is clear when setting up stack of initial Cortex-M3/4/7 stacks (for strict compliance, although not practically necessary).
vTaskGetTaskInfo() changed to vTaskGetInfo() - with a macro added for backward compatibility.
Kernel source changes:
- Added xTaskNotifyStateClear() API function.
- Added the GCC Cortex-R port (existed for a while) into the main download.
- Improved the IAR RL78 port's handling of different memory model combinations.
- Removed some compiler warnings in heap_5.c.
Demo app changes:
- Added example use of xTaskNotifyStateClear() to the TaskNotify standard demo tasks.
Richard Barry