113220628f
Add code to assert() if non ISR safe API function is called from ISR in IAR and GCC CM3 and CM4F ports - Keil and tasking to follow.
11 years ago
4723209074
Simplify the assert that checks if a non-ISR safe function is called from an ISR in the GCC Cortex-A9 port.
11 years ago
8426eba8e7
Added portASSERT_IF_IN_INTERRUPT() macro to the GCC Cortex A9 port layer.
11 years ago
9efb5c8b2f
Check in RL78 GCC port layer now it has been verified with the fixed compiler.
11 years ago
1130a53ec8
Reverse order of projdefs.h and FreeRTOSConfig.h includes in FreeRTOS.h to allow addition of pdMS_TO_TICKS() macro.
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Update RXv2 GCC port to match RXv2 Renesas port.
11 years ago
b215310e63
Add some missing volatiles to __asm statements in the CA9 GCC port.
11 years ago
0bb794301a
Update version number ready for release.
11 years ago
911e82a909
Add xQueueGetMutexHolder() to MPU functions.
11 years ago
f25503977e
Event Groups: Convert the 'clear bits from ISR' function into a pended function to fix reentrancy issue.
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Event Groups: Ensure the 'wait bits' and 'sync' functions don't return values that still contain some internal control bits.
11 years ago
29a08b5e24
Update Cortex-A port layers to ensure the ICCRPR and ICCPMR registers are always accessed as 32-bit values.
11 years ago
e101e7e437
Update version number to V8.0.0 (without the release candidate number).
11 years ago
84f4ae9aa0
Make xTaskIsTaskSuspended() a private function as it should only be called from within critical sections.
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Fix issue in and simplify the xTaskRemoveFromUnorderedEventList() function. The function is new to the V8 release candidates so does not effect official released code.
11 years ago
f843888e60
Complete GCC/Cortex-A9 port.
11 years ago
51ea2639a9
vQueueAddToRegistry() now takes a const char * instead of a char *.
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tmrCOMMAND_CHANGE_PERIOD_FROM_ISR constant added for the "FromISR" version of the software timer change period API function.
11 years ago
b352be2e23
Tidy up GCC Cortex-A port layer - still a work in progress.
11 years ago
14f895478d
Continue work on GCC/Cortex-A port layer.
11 years ago
d0323e67ae
Continue working on GCC/CA_9 port layer - tick interrupt now working but needs tidy up.
11 years ago
3e430b3801
Carry on working on the Cortex-A/GCC port layer - still a work in progress.
11 years ago
86023aa5a6
Beginnings of GCC Cortex-A port - not yet completely converted from IAR version.
11 years ago
f01bf9fdc3
Add additional NOP after EINT instruction in MSP430 ports.
11 years ago
1aaa80fba6
Map portTICK_RATE_MS to portTICK_PERIOD_MS.
11 years ago
a56d4b998c
Minor tidy ups that don't effect code generation, plus:
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When a task is unblocked the need for a context switch is only signalled if the unblocked task has a priority higher than the currently running task, instead of higher than or equal to the priority of the currently running task.
11 years ago
a8836b5c43
Change version numbers ready for V8.0.0 release candidate 1 tag.
11 years ago
2aa19f1a14
Add xEventGroupClearBitsFromISR() and xEventGroupGetBitsFromISR() functions.
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Move some types defines out of generic kernel headers into feature specific headers.
Convert the function prototype dypedefs to the new _t naming.
11 years ago
e95b482f56
Minor updates to demo projects to ensure correct building with V8 rc1.
11 years ago
2b6eb1c5ab
Revert some library files back to using standard types as they are not FreeRTOS files.
11 years ago
3e20aa7d60
Replace standard types with stdint.h types.
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Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
11 years ago
b4116a7c7d
Change the type used for strings and single characters from signed char to just char.
11 years ago
4b2f9dad42
Force the SysTick clock bit to be set in Cortex-M3 and Cortex-M4F bits if configSYSTICK_CLOCK_HZ is not defined, otherwise leave the bit as it is found as the SysTick may use a divided clock.
11 years ago
0d1e12522b
Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ).
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Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
11 years ago
00ad1a0200
Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review.
11 years ago
0cd79ad81d
Change version numbers in preparation for V7.6.0 release.
11 years ago
b181a3af99
Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports).
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Remove duplicate save/restore of r14 in Cortex-M4F ports.
11 years ago
dcd261bb8b
Update the Keil and IAR CM0 port layers to match the changes made to the GCC version.
11 years ago
41fe693968
Improve how the scheduler is started in the GCC Cortex-M0 port.
11 years ago
a12ea2d212
Update FreeRTOS version number to V7.5.3
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Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
11 years ago
0c56f5018d
Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete.
11 years ago
aedf7824cb
Introduce the prvTaskExitError() function for all ARM_CMn ports.
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Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
11 years ago
eaacbb099a
Clear up a few compiler warnings.
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Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt. Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
11 years ago
73606369c4
Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.
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Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
12 years ago
2f754d9b0c
Add additional critical section to the default tickless implementations.
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Update version number for maintenance release.
12 years ago
3cbe0a724d
Update version number.
12 years ago
679a3c670c
Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library.
12 years ago
203ae64600
Rename xTaskGetSystemState() uxTaskGetSystemState().
12 years ago
7d6758ee1a
Minor updates and change version number for V7.5.0 release.
12 years ago
da0fff63c9
Update Cortex-M MPU version to include new API functions.
12 years ago
e5d9640863
Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined.
12 years ago
5d902f2b9c
Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports.
12 years ago
65704174c9
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler.
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Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
12 years ago
c4eef61d39
Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports.
12 years ago
Richard Barry