Update the RegTest.S file used by several GCC RISC-V demos to ensure correct alignment of constant loads from assembly code.

FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/full_demo/RegTest.S

@@ -38,6 +38,7 @@
  * main_full.c.
  */
 
+.align( 8 )
 vRegTest1Implementation:
 
 	/* Fill the core registers with known values. */
@@ -144,13 +145,15 @@ reg1_loop:
 reg1_error_loop:
 	/* Jump here if a register contains an uxpected value.  This stops the loop
 	counter being incremented so the check task knows an error was found. */
-//	ebreak
+	ebreak
 	jal reg1_error_loop
 
+.align( 16 )
 ulRegTest1LoopCounterConst: .word ulRegTest1LoopCounter
 
 /*-----------------------------------------------------------*/
 
+.align( 8 )
 vRegTest2Implementation:
 
 	/* Fill the core registers with known values. */
@@ -254,9 +257,10 @@ Reg2_loop:
 reg2_error_loop:
 	/* Jump here if a register contains an uxpected value.  This stops the loop
 	counter being incremented so the check task knows an error was found. */
-//	ebreak
+	ebreak
 	jal reg2_error_loop
 
+.align( 16 )
 ulRegTest2LoopCounterConst: .word ulRegTest2LoopCounter
 
 

FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/RegTest.S

@@ -47,6 +47,8 @@
  * The register check tasks are described in the comments at the top of
  * main_full.c.
  */
+
+.align( 8 )
 vRegTest1Implementation:
 
 	/* Fill the additional registers with known values. */
@@ -191,10 +193,12 @@ reg1_error_loop:
 	ebreak
 	jal reg1_error_loop
 
+.align( 16 )
 ulRegTest1LoopCounterConst: .word ulRegTest1LoopCounter
 
 /*-----------------------------------------------------------*/
 
+.align( 8 )
 vRegTest2Implementation:
 
 	/* Fill the additional registers with known values. */
@@ -336,6 +340,7 @@ reg2_error_loop:
 	ebreak
 	jal reg2_error_loop
 
+.align( 16 )
 ulRegTest2LoopCounterConst: .word ulRegTest2LoopCounter
 
 

FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/main.c

@@ -58,7 +58,7 @@
 
 /* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
 or 0 to run the more comprehensive test and demo application. */
-#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY	1
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY	0
 
 /* Index to first HART (there is only one). */
 #define mainHART_0 		0