Setup to work with both ARM and THUMB modes.

Source/portable/RVDS/ARM7_LPC21xx/portASM.s

@@ -55,17 +55,15 @@
 	EXPORT	vPortYieldProcessor
 	EXPORT	vPortStartFirstTask
 	EXPORT	vPreemptiveTick
-
+	EXPORT	vPortYield
 
 
 VICVECTADDR	EQU	0xFFFFF030
 T0IR		EQU	0xE0004000
 T0MATCHBIT	EQU	0x00000001
 
-
 	ARM
 	AREA	PORT_ASM, CODE, READONLY
-	PRESERVE8
 
 
 
@@ -74,8 +72,17 @@ T0MATCHBIT	EQU	0x00000001
 ; setup by pxPortInitialiseStack
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 vPortStartFirstTask
+
+	PRESERVE8
+
 	portRESTORE_CONTEXT
 
+vPortYield
+
+	PRESERVE8
+
+	SVC 0
+	bx lr
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Interrupt service routine for the SWI interrupt.  The vector table is
@@ -87,6 +94,8 @@ vPortStartFirstTask
 
 vPortYieldProcessor
 
+	PRESERVE8
+
 	; Within an IRQ ISR the link register has an offset from the true return 
 	; address, but an SWI ISR does not.  Add the offset manually so the same 
 	; ISR return code can be used in both cases.
@@ -109,6 +118,9 @@ vPortYieldProcessor
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
 
 vPreemptiveTick
+
+	PRESERVE8
+
 	portSAVE_CONTEXT					; Save the context of the current task.	
 
 	LDR R0, =vTaskIncrementTick			; Increment the tick count.  

Source/portable/RVDS/ARM7_LPC21xx/portmacro.h

@@ -110,7 +110,8 @@ extern void vTaskSwitchContext(void);						 \
 		}													 \
 }															 \
 
-#define portYIELD() __asm{ SVC 0 }
+extern void vPortYield( void );
+#define portYIELD() vPortYield()
 
 
 /* Critical section management. */