diff --git a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RTOSDemo.ewd b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RTOSDemo.ewd
index 2b534a2bb..d23cd3927 100644
--- a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RTOSDemo.ewd
+++ b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RTOSDemo.ewd
@@ -1,961 +1,1493 @@
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diff --git a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RTOSDemo.ewp b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RTOSDemo.ewp
index 811af5d93..ea4097b44 100644
--- a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RTOSDemo.ewp
+++ b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RTOSDemo.ewp
@@ -1,1012 +1,1154 @@
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-
-
- $PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM0\port.c
-
-
- $PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM0\portasm.s
-
-
- $PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM0\portmacro.h
-
+ Eval-Board
+
+ $PROJ_DIR$\Eval-Board\stm320518_eval.c
+
+
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+ FreeRTOS
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+ Portable
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+ $PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c
+
+
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+
+
+ $PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM0\portasm.s
+
+
+ $PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM0\portmacro.h
+
+
+
+ $PROJ_DIR$\..\..\Source\list.c
+
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+
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+ CMSIS
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+ $PROJ_DIR$\Libraries\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c
+
+
+
+ StdPeriph_Driver
+
+ $PROJ_DIR$\Libraries\STM32F0xx_StdPeriph_Driver\src\stm32f0xx_gpio.c
+
+
+ $PROJ_DIR$\Libraries\STM32F0xx_StdPeriph_Driver\src\stm32f0xx_rcc.c
+
+
+
+
+ Standard-Demo-Tasks
+
+ $PROJ_DIR$\..\Common\Minimal\blocktim.c
+
+
+ $PROJ_DIR$\..\Common\Minimal\countsem.c
+
+
+ $PROJ_DIR$\..\Common\Minimal\dynamic.c
+
+
+ $PROJ_DIR$\..\Common\Minimal\recmutex.c
+
- $PROJ_DIR$\..\..\Source\list.c
-
-
- $PROJ_DIR$\..\..\Source\queue.c
+ $PROJ_DIR$\FreeRTOSConfig.h
- $PROJ_DIR$\..\..\Source\tasks.c
+ $PROJ_DIR$\main-blinky.c
- $PROJ_DIR$\..\..\Source\timers.c
+ $PROJ_DIR$\main-full.c
-
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- Libraries
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-
-
-
- StdPeriph_Driver
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- $PROJ_DIR$\Libraries\STM32F0xx_StdPeriph_Driver\src\stm32f0xx_gpio.c
-
-
- $PROJ_DIR$\Libraries\STM32F0xx_StdPeriph_Driver\src\stm32f0xx_rcc.c
-
-
-
-
- Standard-Demo-Tasks
- $PROJ_DIR$\..\Common\Minimal\blocktim.c
+ $PROJ_DIR$\main.c
- $PROJ_DIR$\..\Common\Minimal\countsem.c
+ $PROJ_DIR$\ParTest.c
- $PROJ_DIR$\..\Common\Minimal\dynamic.c
+ $PROJ_DIR$\RegTest.s
- $PROJ_DIR$\..\Common\Minimal\recmutex.c
+ $PROJ_DIR$\startup_stm32f0xx.s
-
-
- $PROJ_DIR$\FreeRTOSConfig.h
-
-
- $PROJ_DIR$\main-blinky.c
-
-
- $PROJ_DIR$\main-full.c
-
-
- $PROJ_DIR$\main.c
-
-
- $PROJ_DIR$\ParTest.c
-
-
- $PROJ_DIR$\RegTest.s
-
-
- $PROJ_DIR$\startup_stm32f0xx.s
-
-
-
diff --git a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/startup_stm32f0xx.s b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/startup_stm32f0xx.s
index e303842ae..4896d9098 100644
--- a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/startup_stm32f0xx.s
+++ b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/startup_stm32f0xx.s
@@ -7,7 +7,7 @@
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == __iar_program_start,
-;* - Set the vector table entries with the exceptions ISR
+;* - Set the vector table entries with the exceptions ISR
;* address.
;* After Reset the Cortex-M0 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
@@ -46,7 +46,7 @@
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
- EXTERN SystemInit
+ EXTERN SystemInit
PUBLIC __vector_table
DATA
@@ -82,7 +82,7 @@ __vector_table
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
- DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
+ DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
@@ -102,7 +102,7 @@ __vector_table
DCD 0 ; Reserved
DCD CEC_IRQHandler ; CEC
DCD 0 ; Reserved
-
+
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
@@ -120,7 +120,7 @@ __vector_table
THUMB
- PUBWEAK Reset_Handler
+ PUBLIC Reset_Handler
SECTION .text:CODE:REORDER(2)
Reset_Handler
@@ -140,209 +140,209 @@ Reset_Handler
LDR R0, =__iar_program_start
BX R0
-
+
PUBWEAK NMI_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
NMI_Handler
B NMI_Handler
-
-
+
+
PUBWEAK HardFault_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
HardFault_Handler
B HardFault_Handler
-
-
+
+
PUBWEAK SVC_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
SVC_Handler
B SVC_Handler
-
-
+
+
PUBWEAK PendSV_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
PendSV_Handler
B PendSV_Handler
-
-
+
+
PUBWEAK SysTick_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
SysTick_Handler
B SysTick_Handler
-
-
+
+
PUBWEAK WWDG_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
WWDG_IRQHandler
B WWDG_IRQHandler
-
-
+
+
PUBWEAK PVD_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
PVD_IRQHandler
B PVD_IRQHandler
-
-
+
+
PUBWEAK RTC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
RTC_IRQHandler
B RTC_IRQHandler
-
-
+
+
PUBWEAK FLASH_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
FLASH_IRQHandler
B FLASH_IRQHandler
-
-
+
+
PUBWEAK RCC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
RCC_IRQHandler
B RCC_IRQHandler
-
-
+
+
PUBWEAK EXTI0_1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
EXTI0_1_IRQHandler
B EXTI0_1_IRQHandler
-
-
+
+
PUBWEAK EXTI2_3_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
EXTI2_3_IRQHandler
B EXTI2_3_IRQHandler
-
-
+
+
PUBWEAK EXTI4_15_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
EXTI4_15_IRQHandler
B EXTI4_15_IRQHandler
-
-
+
+
PUBWEAK TS_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TS_IRQHandler
B TS_IRQHandler
-
-
+
+
PUBWEAK DMA1_Channel1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
DMA1_Channel1_IRQHandler
B DMA1_Channel1_IRQHandler
-
-
+
+
PUBWEAK DMA1_Channel2_3_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
DMA1_Channel2_3_IRQHandler
B DMA1_Channel2_3_IRQHandler
-
-
+
+
PUBWEAK DMA1_Channel4_5_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
DMA1_Channel4_5_IRQHandler
B DMA1_Channel4_5_IRQHandler
-
-
+
+
PUBWEAK ADC1_COMP_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
ADC1_COMP_IRQHandler
B ADC1_COMP_IRQHandler
-
-
+
+
PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM1_BRK_UP_TRG_COM_IRQHandler
B TIM1_BRK_UP_TRG_COM_IRQHandler
-
-
+
+
PUBWEAK TIM1_CC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM1_CC_IRQHandler
B TIM1_CC_IRQHandler
-
-
+
+
PUBWEAK TIM2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM2_IRQHandler
B TIM2_IRQHandler
-
-
+
+
PUBWEAK TIM3_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM3_IRQHandler
B TIM3_IRQHandler
-
-
+
+
PUBWEAK TIM6_DAC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM6_DAC_IRQHandler
B TIM6_DAC_IRQHandler
-
-
+
+
PUBWEAK TIM14_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM14_IRQHandler
B TIM14_IRQHandler
-
-
+
+
PUBWEAK TIM15_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM15_IRQHandler
B TIM15_IRQHandler
-
-
+
+
PUBWEAK TIM16_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM16_IRQHandler
B TIM16_IRQHandler
-
-
+
+
PUBWEAK TIM17_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM17_IRQHandler
B TIM17_IRQHandler
-
-
+
+
PUBWEAK I2C1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
I2C1_IRQHandler
B I2C1_IRQHandler
-
-
+
+
PUBWEAK I2C2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
I2C2_IRQHandler
B I2C2_IRQHandler
-
-
+
+
PUBWEAK SPI1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
SPI1_IRQHandler
B SPI1_IRQHandler
-
-
+
+
PUBWEAK SPI2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
SPI2_IRQHandler
B SPI2_IRQHandler
-
-
+
+
PUBWEAK USART1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
USART1_IRQHandler
B USART1_IRQHandler
-
-
+
+
PUBWEAK USART2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
USART2_IRQHandler
B USART2_IRQHandler
-
-
+
+
PUBWEAK CEC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
CEC_IRQHandler
- B CEC_IRQHandler
+ B CEC_IRQHandler
END
/******************* (C) COPYRIGHT 2012 STMicroelectronics *****END OF FILE****/