github-forks
/
FreeRTOS-Kernel
mirror of https://github.com/FreeRTOS/FreeRTOS-Kernel.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

RISC-V: refine fpu offset according to portFPU_REG_SIZE (#1256)

Browse Source 
Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
Co-authored-by: wangfei_chen <wangfei_chen@realsil.com.cn>
pull/1255/head^2
Saiiijchan 1 day ago committed by GitHub
parent 4d9cd906d3
commit bb47bc02f2
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
1 changed files with 66 additions and 66 deletions
Show Stats Download Patch File Download Diff File

132
portable/GCC/RISC-V/portContext.h
Unescape Escape View File

@ -103,78 +103,78 @@
.macro portcontexSAVE_FPU_CONTEXT
addi sp, sp, -( portFPU_CONTEXT_SIZE )
/* Store the FPU registers. */
store_f f0, 2 * portWORD_SIZE( sp )
store_f f1, 3 * portWORD_SIZE( sp )
store_f f2, 4 * portWORD_SIZE( sp )
store_f f3, 5 * portWORD_SIZE( sp )
store_f f4, 6 * portWORD_SIZE( sp )
store_f f5, 7 * portWORD_SIZE( sp )
store_f f6, 8 * portWORD_SIZE( sp )
store_f f7, 9 * portWORD_SIZE( sp )
store_f f8, 10 * portWORD_SIZE( sp )
store_f f9, 11 * portWORD_SIZE( sp )
store_f f10, 12 * portWORD_SIZE( sp )
store_f f11, 13 * portWORD_SIZE( sp )
store_f f12, 14 * portWORD_SIZE( sp )
store_f f13, 15 * portWORD_SIZE( sp )
store_f f14, 16 * portWORD_SIZE( sp )
store_f f15, 17 * portWORD_SIZE( sp )
store_f f16, 18 * portWORD_SIZE( sp )
store_f f17, 19 * portWORD_SIZE( sp )
store_f f18, 20 * portWORD_SIZE( sp )
store_f f19, 21 * portWORD_SIZE( sp )
store_f f20, 22 * portWORD_SIZE( sp )
store_f f21, 23 * portWORD_SIZE( sp )
store_f f22, 24 * portWORD_SIZE( sp )
store_f f23, 25 * portWORD_SIZE( sp )
store_f f24, 26 * portWORD_SIZE( sp )
store_f f25, 27 * portWORD_SIZE( sp )
store_f f26, 28 * portWORD_SIZE( sp )
store_f f27, 29 * portWORD_SIZE( sp )
store_f f28, 30 * portWORD_SIZE( sp )
store_f f29, 31 * portWORD_SIZE( sp )
store_f f30, 32 * portWORD_SIZE( sp )
store_f f31, 33 * portWORD_SIZE( sp )
store_f f0, 2 * portFPU_REG_SIZE( sp )
store_f f1, 3 * portFPU_REG_SIZE( sp )
store_f f2, 4 * portFPU_REG_SIZE( sp )
store_f f3, 5 * portFPU_REG_SIZE( sp )
store_f f4, 6 * portFPU_REG_SIZE( sp )
store_f f5, 7 * portFPU_REG_SIZE( sp )
store_f f6, 8 * portFPU_REG_SIZE( sp )
store_f f7, 9 * portFPU_REG_SIZE( sp )
store_f f8, 10 * portFPU_REG_SIZE( sp )
store_f f9, 11 * portFPU_REG_SIZE( sp )
store_f f10, 12 * portFPU_REG_SIZE( sp )
store_f f11, 13 * portFPU_REG_SIZE( sp )
store_f f12, 14 * portFPU_REG_SIZE( sp )
store_f f13, 15 * portFPU_REG_SIZE( sp )
store_f f14, 16 * portFPU_REG_SIZE( sp )
store_f f15, 17 * portFPU_REG_SIZE( sp )
store_f f16, 18 * portFPU_REG_SIZE( sp )
store_f f17, 19 * portFPU_REG_SIZE( sp )
store_f f18, 20 * portFPU_REG_SIZE( sp )
store_f f19, 21 * portFPU_REG_SIZE( sp )
store_f f20, 22 * portFPU_REG_SIZE( sp )
store_f f21, 23 * portFPU_REG_SIZE( sp )
store_f f22, 24 * portFPU_REG_SIZE( sp )
store_f f23, 25 * portFPU_REG_SIZE( sp )
store_f f24, 26 * portFPU_REG_SIZE( sp )
store_f f25, 27 * portFPU_REG_SIZE( sp )
store_f f26, 28 * portFPU_REG_SIZE( sp )
store_f f27, 29 * portFPU_REG_SIZE( sp )
store_f f28, 30 * portFPU_REG_SIZE( sp )
store_f f29, 31 * portFPU_REG_SIZE( sp )
store_f f30, 32 * portFPU_REG_SIZE( sp )
store_f f31, 33 * portFPU_REG_SIZE( sp )
csrr t0, fcsr
store_x t0, 34 * portWORD_SIZE( sp )
store_x t0, 34 * portFPU_REG_SIZE( sp )
.endm
/*-----------------------------------------------------------*/
.macro portcontextRESTORE_FPU_CONTEXT
/* Restore the FPU registers. */
load_f f0, 2 * portWORD_SIZE( sp )
load_f f1, 3 * portWORD_SIZE( sp )
load_f f2, 4 * portWORD_SIZE( sp )
load_f f3, 5 * portWORD_SIZE( sp )
load_f f4, 6 * portWORD_SIZE( sp )
load_f f5, 7 * portWORD_SIZE( sp )
load_f f6, 8 * portWORD_SIZE( sp )
load_f f7, 9 * portWORD_SIZE( sp )
load_f f8, 10 * portWORD_SIZE( sp )
load_f f9, 11 * portWORD_SIZE( sp )
load_f f10, 12 * portWORD_SIZE( sp )
load_f f11, 13 * portWORD_SIZE( sp )
load_f f12, 14 * portWORD_SIZE( sp )
load_f f13, 15 * portWORD_SIZE( sp )
load_f f14, 16 * portWORD_SIZE( sp )
load_f f15, 17 * portWORD_SIZE( sp )
load_f f16, 18 * portWORD_SIZE( sp )
load_f f17, 19 * portWORD_SIZE( sp )
load_f f18, 20 * portWORD_SIZE( sp )
load_f f19, 21 * portWORD_SIZE( sp )
load_f f20, 22 * portWORD_SIZE( sp )
load_f f21, 23 * portWORD_SIZE( sp )
load_f f22, 24 * portWORD_SIZE( sp )
load_f f23, 25 * portWORD_SIZE( sp )
load_f f24, 26 * portWORD_SIZE( sp )
load_f f25, 27 * portWORD_SIZE( sp )
load_f f26, 28 * portWORD_SIZE( sp )
load_f f27, 29 * portWORD_SIZE( sp )
load_f f28, 30 * portWORD_SIZE( sp )
load_f f29, 31 * portWORD_SIZE( sp )
load_f f30, 32 * portWORD_SIZE( sp )
load_f f31, 33 * portWORD_SIZE( sp )
load_x t0, 34 * portWORD_SIZE( sp )
load_f f0, 2 * portFPU_REG_SIZE( sp )
load_f f1, 3 * portFPU_REG_SIZE( sp )
load_f f2, 4 * portFPU_REG_SIZE( sp )
load_f f3, 5 * portFPU_REG_SIZE( sp )
load_f f4, 6 * portFPU_REG_SIZE( sp )
load_f f5, 7 * portFPU_REG_SIZE( sp )
load_f f6, 8 * portFPU_REG_SIZE( sp )
load_f f7, 9 * portFPU_REG_SIZE( sp )
load_f f8, 10 * portFPU_REG_SIZE( sp )
load_f f9, 11 * portFPU_REG_SIZE( sp )
load_f f10, 12 * portFPU_REG_SIZE( sp )
load_f f11, 13 * portFPU_REG_SIZE( sp )
load_f f12, 14 * portFPU_REG_SIZE( sp )
load_f f13, 15 * portFPU_REG_SIZE( sp )
load_f f14, 16 * portFPU_REG_SIZE( sp )
load_f f15, 17 * portFPU_REG_SIZE( sp )
load_f f16, 18 * portFPU_REG_SIZE( sp )
load_f f17, 19 * portFPU_REG_SIZE( sp )
load_f f18, 20 * portFPU_REG_SIZE( sp )
load_f f19, 21 * portFPU_REG_SIZE( sp )
load_f f20, 22 * portFPU_REG_SIZE( sp )
load_f f21, 23 * portFPU_REG_SIZE( sp )
load_f f22, 24 * portFPU_REG_SIZE( sp )
load_f f23, 25 * portFPU_REG_SIZE( sp )
load_f f24, 26 * portFPU_REG_SIZE( sp )
load_f f25, 27 * portFPU_REG_SIZE( sp )
load_f f26, 28 * portFPU_REG_SIZE( sp )
load_f f27, 29 * portFPU_REG_SIZE( sp )
load_f f28, 30 * portFPU_REG_SIZE( sp )
load_f f29, 31 * portFPU_REG_SIZE( sp )
load_f f30, 32 * portFPU_REG_SIZE( sp )
load_f f31, 33 * portFPU_REG_SIZE( sp )
load_x t0, 34 * portFPU_REG_SIZE( sp )
csrw fcsr, t0
addi sp, sp, ( portFPU_CONTEXT_SIZE )
.endm

Write Preview
Loading…
Cancel
Save