Merge SMP feature to main (#716)
FreeRTOS SMP feature is developed in a separate SMP branch. This commit merges the SMP branch to main along with some fixes. User of SMP branch needs to apply the following changes in the port: * Rename configNUM_CORES to configNUMBER_OF_CORES * Define portSET/CLEAR_INTERRUPT_MASK for SMP * Define portENTER/EXIT_CRITICAL_FROM_ISR for SMP. vTaskEnterCriticalFromISR and vTaskExitCriticalFromISR should be used for these port macros * Update portSET/CLEAR_INTERRUPT_MASK_FROM_ISR implementation to mask interrupt only Call xTaskIncrementTick in critical section in port History of the development branch: * Add vTaskYieldWithinAPI for taskYIELD_IF_USING_PREEMPTION * Add configNUM_CORES config for SMP * Add portGET_CORE_ID porting config and default return 0 to compatible with single core demos * Replace xYieldPending with xYieldPendings for multiple cores * Add vTaskYieldWithinAPI function for yield pending if the task is in criticial section. This check are enabled only when portCRITICAL_NESTING_IN_TCB is enabled * taskYIELD_IF_USING_PREEMPTION use vTaskYieldWithinAPI when configUSE_PREEMPTION is set to 1 The following sections will be updated in other commits * taskYIELD_IF_USING_PREEMPTION usage in multiple cores * xYieldPendings usage in multiple cores * Use portYIELD_WITHIN_API for portYIELD_WITHIN_API for single core * Add xTaskRunState and xIsIdle in TCB * Add xTaskRunState and xIsIdle in TCB * Use xTaskAttribute to replace the xIsIdle in SMP TCB * Add pxCurrentTCBs for multiple cores * Keep pxCurrentTCB for single core * Add pxCurrentTCBs for SMP * Add xTaskGetCurrentTaskHandle for SMP * Replace taskSELECT_HIGHEST_PRIORITY_TASK with temporary prvSelectHighestPriorityTask * Add SMP critical section functions * Update vTaskEnterCritical and vTaskExitCritical functions for SMP * Add vTaskEnterCriticalFromISR and vTaskExitCriticalFromISR for SMP * Add SMP prvYieldCore and prvYieldForTask * Add idle tasks for SMP * Add minimal idle task function declaration * Align to use 0x00 for null terminator * Merge vTaskSuspendAll and xTaskResumeAll from SMP branch * Merge vTaskResume and xTaskResumeFromISR from SMP * Merge xTaskIncrementTick from SMP * Update prvYieldForTask usage in kernel APIs * Merge prvAddNewTaskToReadyList from SMP * Merge vTaskSwitchContext from SMP * Add vTaskSwitchContextForCore APIs to switch context for specific core * vTaskSwitchContext will switch context for current core * Merge vTaskDelete from SMP * Add prvYeildCore for single core to reduce multicore macros * Add taskTASK_IS_RUNNING for single core * Add taskTASK_IS_YIELDING * Merge vTaskSuspend from SMP * Set minimal idle task idle attribute * Set minimal idle task idle attribute in prvInitialiseNewTask * Move prvCreateIdleTasks forward and check return value * Add minimal idle hook config check * Fix xTaskResumeAll in SMP * xTaskRusmeAll do nothing when scheduler not running in SMP * check scheduler suspended when scheduler is running * Move suspend scheduler inside critical section * Update comment for uxSchedulerSuspended * Add back xPendingReadyList for single core * Use critical section for SMP * Add in ISR check in prvCheckForRunStateChange function * Add critical section protect for context switch * Add vTaskSwitchContextForCore declaration * Fix missing macro and check for single core * Fix task delete condition * Latest kernel move out the prvDeleteTask and the check condition should be TASK_IS_RUNNING * Use critical section to protect more in SMP for vTaskDelete * The condition task is running is not thread safe in SMP * Once we add the task to termination the task is still running and may add it back to other list. Which cause memory corruption. * Merge SMP prvSelectHighestPriorityTask to main * Merge prvCheckTasksWaitingTermination from SMP branch * Move prvDeleteTCB outside of critical section * Add NULL pointer check in prvCheckTasksWaitingTermination * Update for performance * Remove prvSelectHighestPriorityTask and vTaskSwitchContextForCore for -O0 performance in single core * Update prvSelectHighestPriorityTask * Merge vTaskYieldWithinAPI from SMP Update vTaskYieldWithinAPI from SMP * xTaskDelayUntil * xTaskDelay * ulTaskGenericNotifyTake * xTaskGenericNotifyWait * event_groups.c * queue.c * timers.c Add critical section protection * xTaskGetSchedulerState Update state check macro * vTaskGetInfo * eTaskGetState * Merge vTaskPrioritySet from SMP branch * Void prvYieldForTask return value in vTaskPrioritySet * Yield for SMP when set priority * Move vTaskDelay check uxSchedulerSuspended * Update code logic for performance * Fix yield for task in single core * Merge timer change from SMP branch * Split xTimerGenericCommand into xTimerGenericCommandFromTask and xTimerGenericCommandFromISR to remove the recursion path when called from ISRs. * Add portTIMER_CALLBACK_ATTRIBUTE for timer callback function * Add RP2040 SMP porting support * Seperate task state for SMP and single core * Merge configRUN_MULTIPLE_PRIORITIES from SMP branch * Merge configUSE_TASK_PREEMPTION_DISABLE from SMP * Merge configUSE_CORE_AFFINITY from SMP * Update pxYieldSpinLocks to per-cpu variable in SMP * Remove TODO log * Add suppport for ARM CM55 (#494) * Add supposrt for ARM CM55 * Fix file header * Remove duplicate code * Refactor portmacro.h 1. portmacro.h is re-factored into 2 parts - portmacrocommon.h which is common to all ARMv8-M ports and portmacro.h which is different for different compiler and architecture. This enables us to provide Cortex-M55 ports without code duplication. 2. Update copy_files.py so that it copies Cortex-M55 ports correctly - all files except portmacro.h are used from Cortex-M33 ports. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * add extra check for compiler time (#499) minor change to add extra check for compiler time to prevent bad config Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update feature_request.md (#500) * Update feature_request.md * Remove trailing spaces Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Add callback overrides for stream buffer and message buffers (#437) * Let each stream/message can use its own sbSEND_COMPLETED In FreeRTOS.h, set the default value of configUSE_SB_COMPLETED_CALLBACK to zero, and add additional space for the function pointer when the buffer created statically. In stream_buffer.c, modify the macro of sbSEND_COMPLETED which let the stream buffer to use its own implementation, and then add an pointer to the stream buffer's structure, and modify the implementation of the buffer creating and initializing Co-authored-by: eddie9712 <qw1562435@gmail.com> * Add configUSE_MUTEXES to function declarations in header (#504) This commit adds the configUSE_MUTEXES guard to the function declarations in semphr.h which are only available when configUSE_MUTEXES is set to 1. It was reported here - https://forums.freertos.org/t/mutex-missing-reference-to-configuse-mutexes-on-the-online-documentation/15231 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * RP2040: Remove incorrect assertion (#508) After the xEventGroupWaitBits in vProtLockInternalSpinUnlockWithWait there was an assertion about pxYiledSpinLock being NULL, however when xEventGroupWaitBits returns, IRQs have been re-enabled and so it is no longer safe to assert on the state which is protected by IRQs being disabled. Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com> * Ensure that xTaskGetCurrentTaskHandle is included (#507) This commits adds a check that INCLUDE_xTaskGetCurrentTaskHandle is set to 1. A compile time error message is produced if it is not set to 1. This is needed because stream_buffer.c uses xTaskGetCurrentTaskHandle. This was reported here - https://forums.freertos.org/t/xstreambufferreceive-include-xtaskgetcur/15283 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * RP2040: Allow FreeRTOS to be added to the parent CMake project post initialization of the Pico SDK (#497) Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com> * Update to TF-M version TF-Mv1.6.0 (#517) Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com> Change-Id: I0c15564b342873f9bd7a8240822e770950a0563e * Update submodule pointer of Community Supported Ports (#486) Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Joseph Julicher <jjulicher@mac.com> * Add Cortex M7 r0p1 Errata 837070 workaround to CM4_MPU ports (#513) * Clarify Cortex M7 r0p1 errata number in r0p1 specific port. * Add ARM Cortex M7 r0p0 / r0p1 Errata 837070 workaround to CM4 MPU ports. Optionally, enable the errata workaround by defining configTARGET_ARM_CM7_r0p0 or configTARGET_ARM_CM7_r0p1 in FreeRTOSConfig.h. * Add r0p1 errata support to IAR port as well Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Change macro name to configENABLE_ERRATA_837070_WORKAROUND Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * RP2040: Use indirect reference for pxCurrentTCB (#525) * Posix: Removed unused signal set from port (#528) Co-authored-by: Jakob Hasse <0xjakob@users.noreply.github.com> * Add SBOM Generation in auto_release.yml (#524) * add portDONT_DISCARD to pxCurrentTCB (#479) This fixes link failures with LTO: /tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst2': /root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:249: undefined reference to `pxCurrentTCB' /usr/lib/gcc/arm-none-eabi/11.2.0/../../../../arm-none-eabi/bin/ld: /tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst': /root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:443: undefined reference to `pxCurrentTCB' * Implement MicroBlazeV9 stack protection (#523) * Implement stack protection for MicroBlaze (without MPU wrappers) * Update codecov action to v3.1.0 * Add vPortRemoveInterruptHandler API (#533) * Add xPortRemoveInterruptHandler API This API is added to the MicroBlazeV9 port. It enables the application writer to remove an interrupt handler. This was originally contributed in this PR - https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/523 * Change API signature to return void This makes the API similar to vPortDisableInterrupt. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gavin Lambert <uecasm@users.noreply.github.com> * Fix NULL pointer dereference in vPortGetHeapStats When the heap is exhausted (no free block), start and end markers are the only blocks present in the free block list: +---------------+ +-----------> NULL | | | | V | + ----- + + ----- + | | | | | | | | | | | | + ----- + + ----- + xStart pxEnd The code block which traverses the list of free blocks to calculate heap stats used a do..while loop that moved past the end marker when the heap had no free block resulting in a NULL pointer dereference. This commit changes the do..while loop to while loop thereby ensuring that we never move past the end marker. This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/534 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Change type of message buffer handle (#537) * Block SIG_RESUME in the main thread of the Posix port so that sigwait works as expected (#532) Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com> * Update History.txt (#535) * Update History.txt Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add .syntax unified to GCC assembly functions (#538) This fixes the compilation issue with XC32 compiler. It was reported here - https://forums.freertos.org/t/xc32-v4-00-error-with-building-freertos-portasm-c/14357/4 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Paul Bartell <pbartell@amazon.com> * Generalize Thread Local Storage (TLS) support (#540) * Generalize Thread Local Storage (TLS) support FreeRTOS's Thread Local Storage (TLS) support used variables and functions from newlib, thereby making the TLS support specific to newlib. This commit generalizes the TLS support so that it can be used with other c-runtime libraries also. The default behavior for newlib support is still kept same for backward compatibility. The application writer would need to set configUSE_C_RUNTIME_TLS_SUPPORT to 1 in their FreeRTOSConfig.h and define the following macros to support TLS for a c-runtime library: 1. configTLS_BLOCK_TYPE - Type used to define the TLS block in TCB. 2. configINIT_TLS_BLOCK( xTLSBlock ) - Allocate and initialize memory block for the task's TLS Block. 3. configSET_TLS_BLOCK( xTLSBlock ) - Switch C-Runtime's TLS Block to point to xTLSBlock. 4. configDEINIT_TLS_BLOCK( xTLSBlock ) - Free up the memory allocated for the task's TLS Block. The following is an example to support TLS for picolibc: #define configUSE_C_RUNTIME_TLS_SUPPORT 1 #define configTLS_BLOCK_TYPE void* #define configINIT_TLS_BLOCK( xTLSBlock ) _init_tls( xTLSBlock ) #define configSET_TLS_BLOCK( xTLSBlock ) _set_tls( xTLSBlock ) #define configDEINIT_TLS_BLOCK( xTLSBlock ) Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Change default value of INCLUDE_xTaskGetCurrentTaskHandle (#542) * Include string.h at the top of portable/GCC/ARM_CA9/port.c to prevent memset() generating a warning. (#430) Co-authored-by: none <unknown> * Move some of the complex pre-processor guards on prvWriteNameToBuffer() to compile time checks in FreeRTOS.h. Co-authored-by: Paul Bartell <pbartell@amazon.com> * Fix formatting of FreeRTOS.h * correct grammar in include/FreeRTOS.h Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> * Fix warnings in posix port (#544) Fixes warnings about unused parameters and variables when built with `-Wall -Wextra`. * Add support for MISRA rule 20.7 (#546) Misra rule 20.7 requires parenthesis to all parameter names in macro definitions. The issue was reported here : https://forums.freertos.org/t/misra-20-7-compatibility/15385 * Add FreeRTOS config directory to include dirs (#548) This allows the application write to set FREERTOS_CONFIG_FILE_DIRECTORY to whichever directory the FreeRTOSConfig.h file exists in. This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/545 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * [Fix] Type for pointers operations (#550) * fix type for pointers operations in some places: size_t -> portPOINTER_SIZE_TYPE * fix pointer arithmetics * fix xAddress type * RISC-V: Add support for RV32E extension in GCC port (#543) Co-authored-by: Joseph Julicher <jjulicher@mac.com> * Added checks for index in ThreadLocalStorage APIs (#552) Added checks for ( xIndex >= 0 ) in ThreadLocalStorage APIs * Update of three badly terminated macro definitions (#555) * Update of three badly terminated macro definitions - vTaskDelayUntil() to conform to usual pattern do { ... } while(0) - vTaskNotifyGiveFromISR() and - vTaskGenericNotifyGiveFromISR() to remove extra terminating semicolons - This PR addresses issues #553 and #554 * Adjust formatting of task.h Co-authored-by: Paul Bartell <pbartell@amazon.com> * M85 support (#556) * Extend support to Arm Cortex-M85 Signed-off-by: Gabor Toth <gabor.toth@arm.com> Change-Id: I679ba8e193638126b683b651513f08df445f9fe6 * Add generated Cortex-M85 support files Signed-off-by: Gabor Toth <gabor.toth@arm.com> Change-Id: Ib329d88623c2936ffe3e9a24f5d6e07655e4e5c8 * Extend Trusted Firmware M port Extend Trusted Firmware M port to Cortex-M23, Cortex-M55 and Cortex-M85. Signed-off-by: Gabor Toth <gabor.toth@arm.com> Change-Id: If8f1081acfd04e547b3227579e70e355a6adffe3 * Re-run copy_files.py script Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Gabor Toth <gabor.toth@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * portable-RP2040: Fix typo in README.md (#559) Replace "import" with "include" in cmake code sample. * Update CMakeLists.txt for Cortex-M55 and Cortex-M85 ports (#560) * Annotate ports CMakeLists.txt with port details * CMake: Add Cortex-M55 and Cortex-M85 ports * Use highest numbered MPU regions for kernel ARMv7-M allows overlapping MPU regions. When 2 MPU regions overlap, the MPU configuration of the higher numbered MPU region is applied. For example, if a memory area is covered by 2 MPU regions 0 and 1, the memory permissions for MPU region 1 are applied. We use 5 MPU regions for kernel code and kernel data protections and leave the remaining for the application writer. We were using lowest numbered MPU regions (0-4) for kernel protections and leaving the remaining for the application writer. The application writer could configure those higher numbered MPU regions to override kernel protections. This commit changes the code to use highest numbered MPU regions for kernel protections and leave the remaining for the application writer. This ensures that the application writer cannot override kernel protections. We thank the SecLab team at Northeastern University for reporting this issue. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Make RAM regions non-executable This commit makes the privileged RAM and stack regions non-executable. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Remove local stack variable form MPU wrappers It was possible for a third party that had already independently gained the ability to execute injected code to achieve further privilege escalation by branching directly inside a FreeRTOS MPU API wrapper function with a manually crafted stack frame. This commit removes the local stack variable `xRunningPrivileged` so that a manually crafted stack frame cannot be used for privilege escalation by branching directly inside a FreeRTOS MPU API wrapper. We thank Certibit Consulting, LLC, Huazhong University of Science and Technology and the SecLab team at Northeastern University for reporting this issue. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Restrict unpriv task to invoke code with privilege It was possible for an unprivileged task to invoke any function with privilege by passing it as a parameter to MPU_xTaskCreate, MPU_xTaskCreateStatic, MPU_xTimerCreate, MPU_xTimerCreateStatic, or MPU_xTimerPendFunctionCall. This commit ensures that MPU_xTaskCreate and MPU_xTaskCreateStatic can only create unprivileged tasks. It also removes the following APIs: 1. MPU_xTimerCreate 2. MPU_xTimerCreateStatic 3. MPU_xTimerPendFunctionCall We thank Huazhong University of Science and Technology for reporting this issue. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Update History.txt Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Update History.txt as per the PR feedback Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Update RISC-V IAR port to support vector mode. (#458) * Update RISC-V IAR port to support vector mode. * uncrustify Co-authored-by: David Chalco <david@chalco.io> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com> * Added better pointer declaration readability (#567) * Add better pointer declaration readability I revised the declaration of single-line pointers by splitting it into multiple lines. Now, every pointer is declared (and initialized accordingly) on its own line. This refactoring should enhance readability and decrease the probability of error when a new pointer is added/removed or a current one has its initialization value modified. Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com> * Remove unnecessary whitespace characters and lines It removes whitespace characters at the end of lines (empty or othwerwise) and clear lines at the end of the file (only one remains). It is an automatic operation done by git. Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com> Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com> * Update doc comments in task.h (#570) Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Tickless idle fixes/improvement (#59) * Fix tickless idle when stopping systick on zero... ...and don't stop SysTick at all in the eAbortSleep case. Prior to this commit, if vPortSuppressTicksAndSleep() happens to stop the SysTick on zero, then after tickless idle ends, xTickCount advances one full tick more than the time that actually elapsed as measured by the SysTick. See "bug 1" in this forum post: https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40 SysTick ------- The SysTick is the hardware timer that provides the OS tick interrupt in the official ports for Cortex M. SysTick starts counting down from the value stored in its reload register. When SysTick reaches zero, it requests an interrupt. On the next SysTick clock cycle, it loads the counter again from the reload register. To get periodic interrupts every N SysTick clock cycles, the reload register must be N - 1. Bug Example ----------- - Idle task calls vPortSuppressTicksAndSleep(xExpectedIdleTime = 2). [Doesn't have to be "2" -- could be any number.] - vPortSuppressTicksAndSleep() stops SysTick, and the current-count register happens to stop on zero. - SysTick ISR executes, setting xPendedTicks = 1 - vPortSuppressTicksAndSleep() masks interrupts and calls eTaskConfirmSleepModeStatus() which confirms the sleep operation. *** - vPortSuppressTicksAndSleep() configures SysTick for 1 full tick (xExpectedIdleTime - 1) plus the current-count register (which is 0) - One tick period elapses in sleep. - SysTick wakes CPU, ISR executes and increments xPendedTicks to 2. - vPortSuppressTicksAndSleep() calls vTaskStepTick(1), then returns. - Idle task resumes scheduler, which increments xTickCount twice (for xPendedTicks = 2) In the end, two ticks elapsed as measured by SysTick, but the code increments xTickCount three times. The root cause is that the code assumes the SysTick current-count register always contains the number of SysTick counts remaining in the current tick period. However, when the current-count register is zero, there are ulTimerCountsForOneTick counts remaining, not zero. This error is not the kind of time slippage normally associated with tickless idle. *** Note that a recent commit https://github.com/FreeRTOS/FreeRTOS-Kernel/commit/e1b98f0 results in eAbortSleep in this case, due to xPendedTicks != 0. That commit does mostly resolve this bug without specifically mentioning it, and without this commit. But that resolution allows the code in port.c not to directly address the special case of stopping SysTick on zero in any code or comments. That commit also generates additional instances of eAbortSleep, and a second purpose of this commit is to optimize how vPortSuppressTicksAndSleep() behaves for eAbortSleep, as noted below. This commit also includes an optimization to avoid stopping the SysTick when eTaskConfirmSleepModeStatus() returns eAbortSleep. This optimization belongs with this fix because the method of handling the SysTick being stopped on zero changes with this optimization. * Fix imminent tick rescheduled after tickless idle Prior to this commit, if something other than systick wakes the CPU from tickless idle, vPortSuppressTicksAndSleep() might cause xTickCount to increment once too many times. See "bug 2" in this forum post: https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40 SysTick ------- The SysTick is the hardware timer that provides the OS tick interrupt in the official ports for Cortex M. SysTick starts counting down from the value stored in its reload register. When SysTick reaches zero, it requests an interrupt. On the next SysTick clock cycle, it loads the counter again from the reload register. To get periodic interrupts every N SysTick clock cycles, the reload register must be N - 1. Bug Example ----------- - CPU is sleeping in vPortSuppressTicksAndSleep() - Something other than the SysTick wakes the CPU. - vPortSuppressTicksAndSleep() calculates the number of SysTick counts until the next tick. The bug occurs only if this number is small. - vPortSuppressTicksAndSleep() puts this small number into the SysTick reload register, and starts SysTick. - vPortSuppressTicksAndSleep() calls vTaskStepTick() - While vTaskStepTick() executes, the SysTick expires. The ISR pends because interrupts are masked, and SysTick starts a 2nd period still based on the small number of counts in its reload register. This 2nd period is undesirable and is likely to cause the error noted below. - vPortSuppressTicksAndSleep() puts the normal tick duration into the SysTick's reload register. - vPortSuppressTicksAndSleep() unmasks interrupts before the SysTick starts a new period based on the new value in the reload register. [This is a race condition that can go either way, but for the bug to occur, the race must play out this way.] - The pending SysTick ISR executes and increments xPendedTicks. - The SysTick expires again, finishing the second very small period, and starts a new period this time based on the full tick duration. - The SysTick ISR increments xPendedTicks (or xTickCount) even though only a tiny fraction of a tick period has elapsed since the previous tick. The bug occurs when *two* consecutive small periods of the SysTick are both counted as ticks. The root cause is a race caused by the small SysTick period. If vPortSuppressTicksAndSleep() unmasks interrupts *after* the small period expires but *before* the SysTick starts a period based on the full tick period, then two small periods are counted as ticks when only one should be counted. The end result is xTickCount advancing nearly one full tick more than time actually elapsed as measured by the SysTick. This is not the kind of time slippage normally associated with tickless idle. After this commit the code starts the SysTick and then immediately modifies the reload register to ensure the very short cycle (if any) is conducted only once. This strategy requires special consideration for the build option that configures SysTick to use a divided clock. To avoid waiting around for the SysTick to load value from the reload register, the new code temporarily configures the SysTick to use the undivided clock. The resulting timing error is typical for tickless idle. The error (commonly known as drift or slippage in kernel time) caused by this strategy is equivalent to one or two counts in ulStoppedTimerCompensation. This commit also updates comments and #define symbols related to the SysTick clock option. The SysTick can optionally be clocked by a divided version of the CPU clock (commonly divide-by-8). The new code in this commit adjusts these comments and symbols to make them clearer and more useful in configurations that use the divided clock. The fix made in this commit requires the use of these symbols, as noted in the code comments. * Fix tickless idle with alternate systick clocking Prior to this commit, in configurations using the alternate SysTick clocking, vPortSuppressTicksAndSleep() might cause xTickCount to jump ahead as much as the entire expected idle time or fall behind as much as one full tick compared to time as measured by the SysTick. SysTick ------- The SysTick is the hardware timer that provides the OS tick interrupt in the official ports for Cortex M. SysTick starts counting down from the value stored in its reload register. When SysTick reaches zero, it requests an interrupt. On the next SysTick clock cycle, it loads the counter again from the reload register. The SysTick has a configuration option to be clocked by an alternate clock besides the core clock. This alternate clock is MCU dependent. Scenarios Fixed --------------- The new code in this commit handles the following scenarios that were not handled correctly prior to this commit. 1. Before the sleep, vPortSuppressTicksAndSleep() stops the SysTick on zero, long after SysTick reached zero. Prior to this commit, this scenario caused xTickCount to jump ahead one full tick for the same reason documented here:pull/715/head^20c7b04bd3a2. After the sleep, vPortSuppressTicksAndSleep() stops the SysTick before it loads the counter from the reload register. Prior to this commit, this scenario caused xTickCount to jump ahead by the entire expected idle time (xExpectedIdleTime) because the current-count register is zero before it loads from the reload register. 3. Prior to return, vPortSuppressTicksAndSleep() attempts to start a short SysTick period when the current SysTick clock cycle has a lot of time remaining. Prior to this commit, this scenario could cause xTickCount to fall behind by as much as nearly one full tick because the short SysTick cycle never started. Note that #3 is partially fixed by967acc9b20even though that commit addresses a different issue. So this commit completes the partial fix. * Improve comments and name of preprocessor symbol Add a note in the code comments that SysTick requests an interrupt when decrementing from 1 to 0, so that's why stopping SysTick on zero is a special case. Readers might unknowingly assume that SysTick requests an interrupt when wrapping from 0 back to the load-register value. Reconsider new "_SETTING" suffix since "_CONFIG" suffix seems more descriptive. The code relies on *both* of these preprocessor symbols: portNVIC_SYSTICK_CLK_BIT portNVIC_SYSTICK_CLK_BIT_CONFIG **new** A meaningful suffix is really helpful to distinguish the two symbols. * Revert introduction of 2nd name for NVIC register When I added portNVIC_ICSR_REG I didn't realize there was already a portNVIC_INT_CTRL_REG, which identifies the same register. Not good to have both. Note that portNVIC_INT_CTRL_REG is defined in portmacro.h and is already used in this file (port.c). * Replicate to other Cortex M ports Also set a new fiddle factor based on tests with a CM4F. I used gcc, optimizing at -O1. Users can fine-tune as needed. Also add configSYSTICK_CLOCK_HZ to the CM0 ports to be just like the other Cortex M ports. This change allowed uniformity in the default tickless implementations across all Cortex M ports. And CM0 is likely to benefit from configSYSTICK_CLOCK_HZ, especially considering new CM0 devices with very fast CPU clock speeds. * Revert changes to IAR-CM0-portmacro.h portNVIC_INT_CTRL_REG was already defined in port.c. No need to define it in portmacro.h. * Handle edge cases with slow SysTick clock Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com> Co-authored-by: abhidixi11 <44424462+abhidixi11@users.noreply.github.com> Co-authored-by: Joseph Julicher <jjulicher@mac.com> Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com> * Merge SMP commit45dd83a8e*45dd83a8e| 2022-06-09 | Fix RP2040 assertion due to yield spin lock info being wrongly shared between multiple cores (#501) * Merge SMPb87dfa3e9*b87dfa3e9| 2022-06-04 | RP2040: Allow FreeRTOS to be added to the parent CMake project post initialization of the Pico SDK * Merge SMP13f034eb7*13f034eb7| 2022-06-24 | RP2040: Fix compiler warning and comment (#509) * Fix compiler warning and spelling * Fix Add new task for single core when scheduler not running * Fix priority set when task is not in ready list for single core * Fix vTaskResume when task is not running * Fix uncrustify formating warning * Add portCHECK_IF_IN_ISR for SMP * Format vTaskSwitchContext * Fix vTaskSwitchContextForCore bug due to uncrustify * First review - did not build yet Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Corresponding changes in FreeRTOS.h and task.h Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix the single core compilation * vTaskSwtichContextForCore rename vTaskSwitchContext * vTaskYieldWithinAPI for single core * pxCurrentTCBs for single core in xTaskIncrementTick * Fix compilation warning * Update xTaskGetCurrentTaskHandleCPU API * Use BaseType_t instead of UBaseType_t * Make the list traverse loop more readable Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Remove unnecessary loop in xTaskIncrementTick for single core * Update uxSchedulerSuspended with ISR lock in prvCheckForRunStateChange * Updated ESP32 port-layer to ESP-IDF `v4.4.2` (#572) * Xtensa_ESP32: Added esp-idf v4.4.2 specific changes * Xtensa_ESP32: Updated SPDX license identifiers * Add warning message to ensure min stack size (#575) Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com> * Removed the 'configASSERT( xInheritanceOccurred == pdFALSE )' assertion from xQueueSemaphoreTake as the reasoning behind it is wrong; it can trigger on wrongly on highly-contested semaphores on multicore systems. See https://forums.freertos.org/t/15967 (#576) Co-authored-by: Niklas Gürtler <niklas.guertler@tacterion.com> * Update the NIOSII port to enable longer jumps (#578) Update the NIOSII port so it works on systems with more RAM as per https://forums.freertos.org/t/nios-ii-r-nios2-call26-noat-linker-error/16028 * Update Cortex-M55 and Cortex-M85 ports (#579) These were missed when PR #59 was merged. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix context switch when time slicing is off (#568) * Fix context switch when time slicing is off When time slicing is off, context switch should only happen when a task with priority higher than the currently executing one is unblocked. Earlier the code was invoking a context switch even when a task with priority equal the currently executing task was unblocked. This commit fixes the code to only do a context switch when a higher priority task is unblocked. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Merge commit "Add support for retrieving a task's uxCoreAffinityMask with the vTaskGetInfo() API" * Merge commit8128208bde* Use taskENTER/EXIT_CRITICAL_FROM_ISR (#38) * Enter critical section from is implemented differently for single core and smp. Use taskENTER/EXIT_CRITICAL_FROM_ISR in source. * Improve single core unit test coverage (#42) * prvCreateIldeTask use configNUM_CORES * First time yield in idle task in SMP only * prvCheckTasksWaitingTermination check pxTCB NULL pointer for SMP only. Single core won't have to check the pxTCB * Yield for task when core affinity changed (#41) * Yield for task when the task is linked to new allowed cores Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Remove builtin clz in prvSelectHighestPriorityTask (#37) * Remove builtin clz in prvSelectHighestPriorityTask * Move critical nesting count to port (#47) * Move the critical nesting management to port layer Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Move critical nesting in TCB macro to tasks.c * Add RP2040 support maintain critical nesting count in TCB * Fix formatting * RP2040 maintain critical nesting count in port * Fix constant type Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Rename config num cores (#48) * Rename configNUM_CORES to configNUMBER_OF_CORES * Fix the task selection when task yields (#54) * Move xTaskIncrementTick critical section to port (#55) * Port should use taskENTER/EXIT_CRITICAL_FROM_ISR * Not preempt equal priority task in the following functions (#56) Not to preempt equal priority task in the following functions * vTaskResume * vTaskResumeFromISR * vTaskPrioritySet * vTaskCoreAffinitySet * Remove implicit test (#49) * Remove taskTASK_IS_RUNNING implicit test * Remove portCHECK_IF_IN_ISR implicit test * Fix taskVALID_CORE_ID implicit test * Remove configASSERT implicit test * Fix preempt equal priority task in xTaskIncrementTick (#58) * Not preempt equal priority when a task is removed from delay list. Process time sharing is handle in the logic below. * Remove the xPreemptEqualPriority parameter of prvYieldForTask * Remove prvSelectHighestPriorityTask call in vTaskSuspend (#59) * Every core starts with an idle task in SMP implementation and taskTASK_IS_RUNNING only return ture when the task is idle task before scheduler started. So prvSelectHighestPriorityTask won't be called in vTaskSuspend before scheduler started. * Update prvSelectHighestPriorityTask to ensure that this function is called only when scheduler started. * Adding portIDLE_TASK_TEST_MOCK in idle task function (#66) * Adding configIDLE_TASK_HOOK in idle task function * Add INFINITE_LOOP macro to test idle task function (#67) * Remove configIDLE_TASK_HOOK * Add INFINIT_LOOP. Unit test can redefine this macro to mock the function. * portYield is not called when exit critical section from ISR (#60) * Reference SMP branch * Fix list index is moved in prvSearchForNameWithinSingleList (#61) * index pointer should not be moved in SMP * Yield for priority inherit and disinherit (#64) * Yield the core runs the task with prority changed when priority inheritance and disinheritance. * fix performance counting for SMP (#65) * performance counting: ulTaskSwitchedInTime and ulTotalRunTime must be (#618) arrays, index is core number --------- Co-authored-by: Hardy Griech <ntbox@gmx.net> * Remomve unreachable assert in prvCheckForRunStateChange (#68) * Previous assert already ensure this assert won't be triggered * Remove unreachable code in preYieldForTask (#69) * xLowestPriorityCore index can't be greater than configNUMBER_OF_CORES * Add first version of XCOREAI port (#63) * xTaskIncrementTick need to be called in critical section * Rename configNUM_CORES to configNUMBER_OF_CORES * Define portENTER/EXIT_CRITICAL_FROM_ISR for SMP * portSET/CLEAR_INTERRUPT_MASK_FROM_ISR is not used in SMP * Fix configDEINIT_TLS_BLOCK (#73) configDEINIT_TLS_BLOCK() should deinit the TLS block of the task to being deleted instead of the currently running task. * Sync with main branch (#71) * Fix array-bounds compiler warning on gcc11+ in list.h (#580) listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to being a MiniListItem_t, can be shorter than a ListItem_t. Thus, `( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the `List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext` through a `MiniListItem_t` instead. * move the prototype for vApplicationIdleHook to task.h. (#600) Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update equal priority task preemption (#603) * vTaskResume and vTaskPrioritySet don't preempt equal priority task * Update vTaskResumeAll not to preempt task with equal priority * Fix in xTaskResumeFromISR * Update FreeRTOS/FreeRTOS build checks (#613) This is needed to be compatible with the refactoring done in this PR - https://github.com/FreeRTOS/FreeRTOS/pull/889 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611) Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the only requirement for these functions to work. * Fix some CMake documentation typos (#616) The quick start instructions for CMake mention the "master" git branch which has been replaced by "main" in the current repo. The main CMakeLists.txt documents how to integrate a custom port. Fix a typo in the suggested CMake code. * Added support of 64bit events. (#597) * Added support of 64bit even Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Added missing brackets Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Made proper name for tick macro. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Improved macro evaluation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fixed missed port files + documentation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Changes made on PR Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fix macro definition. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Formatted code with uncrustify Signed-off-by: Cervenka Dusan <cervenka@acrios.com> --------- Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Introduce portMEMORY_BARRIER for Microblaze port. (#621) The introduction of `portMEMORY_BARRIER` will ensure the places in the kernel use a barrier will work. For example, `xTaskResumeAll` has a memory barrier to ensure its correctness when compiled with optimization enabled. Without the barrier `xTaskResumeAll` can fail (e.g. start reading and writing to address 0 and/or infinite looping) when `xPendingReadyList` contains more than one task to restore. In `xTaskResumeAll` the compiler chooses to cache the `pxTCB` the first time through the loop for use in every subsequent loop. This is incorrect as the removal of `pxTCB->xEventListItem` will actually change the value of `pxTCB` if it was read again at the top of the loop. The barrier forces the compiler to read `pxTCB` again at the top of the loop. The compiler is operating correctly. The removal `pxTCB->xEventListItem` executes on a `List_t *` and `ListItem_t *`. This means that the compiler can assume that any `MiniListItem_t` values are unchanged by the loop (i.e. "strict-aliasing"). This allows the compiler to cache `pxTCB` as it is obtained via a `MiniListItem_t`. This is incorrect in this case because it is possible for a `ListItem_t *` to actually alias a `MiniListItem_t`. This is technically a "violation of aliasing rules" so we use the the barrier to disable the strict-aliasing optimization in this loop. * Do not call exit() on MSVC Port when calling vPortEndScheduler (#624) * make port exitable * correctly set xPortRunning to False * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update PR template to include checkbox for Unit Test related changes (#627) * Fix build failure introduced in PR #597 (#629) The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS which can be defined to one of the following: * TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide. * TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide. * TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide. Earlier we supported 16 and 32 bit width for tick type which was controlled using the config option configUSE_16_BIT_TICKS. The PR tried to maintain backward compatibility by honoring configUSE_16_BIT_TICKS. The backward compatibility did not work as expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used before it was defined. This PR addresses it by ensuring that the macro configTICK_TYPE_WIDTH_IN_BITS is defined before it is used. Testing 1. configUSE_16_BIT_TICKS is defined to 0. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 2. configUSE_16_BIT_TICKS is defined to 1. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS. ``` #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. ``` The testing was done for GCC/ARM_CM3 port which does not support 64 bit tick type. 6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Missing definition: One of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` 7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Only one of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Feature/fixing clang gnu compiler warnings (#620) * Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558) * Using single name definition for libraries everywhere. (#558) * Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571) * Removing compiler warnings for GNU and Clang. (#571) * Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms. * Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY. * Fixing clang and gnu compiler warnings. * Adding in project information and how to compile for GNU/clang * Fixing compiler issue with unused variable - no need to declare variable. * Adding in compile warnings for linux builds that kernel is okay with using. * Fixing more extra-semi-stmt clang warnings. * Moving definition of hooks into header files if features are enabled. * Fixing formatting with uncrustify. * Fixing merge conflicts with main merge. * Fixing compiler errors due to merge issues and formatting. * Fixing Line feeds. * Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request * Further clean-up of clang and clang-tidy issues. * Removing compiler specific pragmas from common c files. * Fixing missing lexicon entry and uncrustify formatting changes. * Resolving merge issue multiple defnitions of proto for prvIdleTask * Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control. * More uncrustify formatting issues. * Fixing extra bracket in #if statement. --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * POSIX port fixes (#626) * Fix types in POSIX port Use TaskFunction_t and StackType_t as other ports do. * Fix portTICK_RATE_MICROSECONDS in POSIX port --------- Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Cortex-M35P: Add Cortex-M35P port (#631) * Cortex-M35P: Add Cortex-M35P port The Cortex-M35P support added to kernel. The port hasn't been validated yet with TF-M. Hence TF-M support is not included in this port. Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Add portNORETURN to the newly added portmacro.h Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Introduced Github Status Badge for Unit Tests (#634) * Introduced Github Status Badge for Unit Tests * Github status badge to point to latest run * Github status badge UT points to latest results * Fixed URL for Github Status badge --------- Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Remove C99 requirement from CMake file (#633) * Remove C99 requirement from CMake file The kernel source is C89 compliant and does not need C99. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Explicitly set C89 requirement for kernel Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions (#343) * Pass top of stack to configINIT_TLS_BLOCK Picolibc wants to allocate the per-task TLS block within the stack segment, so it will need to modify the top of stack value. Pass the pxTopOfStack variable to make this explicit. Signed-off-by: Keith Packard <keithpac@amazon.com> * Move newlib-specific definitions to separate file This reduces the clutter in FreeRTOS.h caused by having newlib-specific macros present there. Signed-off-by: Keith Packard <keithpac@amazon.com> * Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT Remove reference to configUSE_NEWLIB_REENTRANT as that only works when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always set when configUSE_NEWLIB_REENTRANT is set, so using both was redundant in that case. Signed-off-by: Keith Packard <keithpac@amazon.com> * portable-ARC: Adapt ARC support to use generalized TLS support With generalized thread local storage (TLS) support present in the core, the two ARC ports need to have the changes to the TCB mirrored to them. Signed-off-by: Keith Packard <keithpac@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions This patch provides definitions of the general TLS support macros in terms of the Picolibc TLS support functions. Picolibc is normally configured to use TLS internally for all variables that are intended to be task-local, so these changes are necessary for picolibc to work correctly with FreeRTOS. The picolibc helper functions rely on elements within the linker script to arrange the TLS data in memory and define some symbols. Applications wanting to use this mechanism will need changes in their linker script when migrating to picolibc. Signed-off-by: Keith Packard <keithpac@amazon.com> --------- Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Interrupt priority assert improvements for CM3/4/7 (#602) * Interrupt priority assert improvements for CM3/4/7 In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that `configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the number of priority bits implemented by the hardware. Change these ports to also use the lowest priority for PendSV and SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`. * Remove not needed configKERNEL_INTERRUPT_PRIORITY define Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Introduced code coverage status badge (#635) * Introduced code coverage status badge * Trying to fix the URL checker issue * Fix URL check Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636) * added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port * Added SIZE_MAX definition to PIC24/dsPIC33 * Fix TLS and stack alignment when using picolibc (#637) Both the TLS block and stack must be correctly aligned when using picolibc. The architecture stack alignment is represented by the portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the Picolibc _tls_align() inline function for Picolibc version 1.8 and above. For older versions of Picolibc, we'll assume that the TLS block requires the same alignment as the stack. For downward growing stacks, this requires aligning the start of the TLS block to the maximum of the stack alignment and the TLS alignment. With this, both the TLS block and stack will now be correctly aligned. For upward growing stacks, the two areas must be aligned independently; the TLS block is aligned from the start of the stack, then the tls space is allocated, and then the stack is aligned above that. It's probably useful to know here that the linker ensures that variables within the TLS block are assigned offsets that match their alignment requirements. If the TLS block itself is correctly aligned, then everything within will also be. I have only tested the downward growing stack branch of this patch. Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Enable building the GCC Cortex-R5 port without an FPU (#586) * Ensure configUSE_TASK_FPU_SUPPORT option is set correctly If one does enable the FPU of the Cortex-R5 processor, then the GCC compiler will define the macro __ARM_FP. This can be used to ensure, that the configUSE_TASK_FPU_SUPPORT is set accordingly. * Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1 * Remove error case in pxPortInitialiseStack The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled * Enable access to FPU registers only if FPU is enabled * Make minor formating changes * Format ARM Cortex-R5 port * Address review comments from @ChristosZosi * Minor code review suggestions Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix freertos_kernel cmake property, Posix Port (#640) * Fix freertos_kernel cmake property, Posix Port * Moves the `set_property()` call below the target definition in top level CMakeLists file * Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t * Add blank line to CMakeLists.txt * Add missing FreeRTOS+ defines * Run kernel demos and unit tests for PR changes (#645) * Run kernel demos and unit tests for PR changes Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these checks currently use main branch of FreeRTOS-Kernel. This commits updates these checks to use the changes in the PR. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Do not specify PR SHA explicitly as that is default Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Remove explicit PR SHA from kernel checks Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add functions to get the buffers of statically created objects (#641) Added various ...GetStaticBuffer() functions to get the buffers of statically created objects. --------- Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Cortex-M Assert when NVIC implements 8 PRIO bits (#639) * Cortex-M Assert when NVIC implements 8 PRIO bits * Fix CM3 ports * Fix ARM_CM3_MPU * Fix ARM CM3 * Fix ARM_CM4_MPU * Fix ARM_CM4 * Fix GCC ARM_CM7 * Fix IAR ARM ports * Uncrustify changes * Fix MikroC_ARM_CM4F port * Fix MikroC_ARM_CM4F port-(2) * Fix RVDS ARM ports * Revert changes for Tasking/ARM_CM4F port * Revert changes for Tasking/ARM_CM4F port-(2) * Update port.c Fix GCC/ARM_CM4F port * Update port.c * update GCC\ARM_CM4F port * update port.c * Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority * Fix merge error: remove duplicate code * Fix typos --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> * Remove C90 requirement from CMakeLists (#649) This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984 We will re-evaluate and accordingly add this later. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Only add alignment padding when needed (#650) Heap 4 and Heap 5 add some padding to ensure that the allocated blocks are always aligned to portBYTE_ALIGNMENT bytes. The code until now was adding padding always even if the resulting block was already aligned. This commits updates the code to only add padding if the resulting block is not aligned. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * add a missing comma (#651) * fix conversion warning (#658) FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion] Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Cervenka Dusan <cervenka@acrios.com> Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com> Co-authored-by: tcpluess <tpluess@ieee.org> Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Chris Copeland <chris@chrisnc.net> Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com> Co-authored-by: Dusan Cervenka <cervenka@acrios.com> Co-authored-by: bbain <16752579+bbain@users.noreply.github.com> Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com> Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Co-authored-by: phelter <paulheltera@gmail.com> Co-authored-by: jacky309 <jacques.guillou@gmail.com> Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Keith Packard <keithp@keithp.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Joseph Julicher <jjulicher@mac.com> Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com> Co-authored-by: Holden <holden-zenithaerotech.com> Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch> Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com> * Smp dev merge main 20230410 (#74) * Fix array-bounds compiler warning on gcc11+ in list.h (#580) listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to being a MiniListItem_t, can be shorter than a ListItem_t. Thus, `( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the `List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext` through a `MiniListItem_t` instead. * move the prototype for vApplicationIdleHook to task.h. (#600) Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update equal priority task preemption (#603) * vTaskResume and vTaskPrioritySet don't preempt equal priority task * Update vTaskResumeAll not to preempt task with equal priority * Fix in xTaskResumeFromISR * Update FreeRTOS/FreeRTOS build checks (#613) This is needed to be compatible with the refactoring done in this PR - https://github.com/FreeRTOS/FreeRTOS/pull/889 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611) Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the only requirement for these functions to work. * Fix some CMake documentation typos (#616) The quick start instructions for CMake mention the "master" git branch which has been replaced by "main" in the current repo. The main CMakeLists.txt documents how to integrate a custom port. Fix a typo in the suggested CMake code. * Added support of 64bit events. (#597) * Added support of 64bit even Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Added missing brackets Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Made proper name for tick macro. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Improved macro evaluation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fixed missed port files + documentation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Changes made on PR Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fix macro definition. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Formatted code with uncrustify Signed-off-by: Cervenka Dusan <cervenka@acrios.com> --------- Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Introduce portMEMORY_BARRIER for Microblaze port. (#621) The introduction of `portMEMORY_BARRIER` will ensure the places in the kernel use a barrier will work. For example, `xTaskResumeAll` has a memory barrier to ensure its correctness when compiled with optimization enabled. Without the barrier `xTaskResumeAll` can fail (e.g. start reading and writing to address 0 and/or infinite looping) when `xPendingReadyList` contains more than one task to restore. In `xTaskResumeAll` the compiler chooses to cache the `pxTCB` the first time through the loop for use in every subsequent loop. This is incorrect as the removal of `pxTCB->xEventListItem` will actually change the value of `pxTCB` if it was read again at the top of the loop. The barrier forces the compiler to read `pxTCB` again at the top of the loop. The compiler is operating correctly. The removal `pxTCB->xEventListItem` executes on a `List_t *` and `ListItem_t *`. This means that the compiler can assume that any `MiniListItem_t` values are unchanged by the loop (i.e. "strict-aliasing"). This allows the compiler to cache `pxTCB` as it is obtained via a `MiniListItem_t`. This is incorrect in this case because it is possible for a `ListItem_t *` to actually alias a `MiniListItem_t`. This is technically a "violation of aliasing rules" so we use the the barrier to disable the strict-aliasing optimization in this loop. * Do not call exit() on MSVC Port when calling vPortEndScheduler (#624) * make port exitable * correctly set xPortRunning to False * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update PR template to include checkbox for Unit Test related changes (#627) * Fix build failure introduced in PR #597 (#629) The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS which can be defined to one of the following: * TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide. * TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide. * TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide. Earlier we supported 16 and 32 bit width for tick type which was controlled using the config option configUSE_16_BIT_TICKS. The PR tried to maintain backward compatibility by honoring configUSE_16_BIT_TICKS. The backward compatibility did not work as expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used before it was defined. This PR addresses it by ensuring that the macro configTICK_TYPE_WIDTH_IN_BITS is defined before it is used. Testing 1. configUSE_16_BIT_TICKS is defined to 0. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 2. configUSE_16_BIT_TICKS is defined to 1. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS. ``` #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. ``` The testing was done for GCC/ARM_CM3 port which does not support 64 bit tick type. 6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Missing definition: One of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` 7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Only one of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Feature/fixing clang gnu compiler warnings (#620) * Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558) * Using single name definition for libraries everywhere. (#558) * Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571) * Removing compiler warnings for GNU and Clang. (#571) * Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms. * Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY. * Fixing clang and gnu compiler warnings. * Adding in project information and how to compile for GNU/clang * Fixing compiler issue with unused variable - no need to declare variable. * Adding in compile warnings for linux builds that kernel is okay with using. * Fixing more extra-semi-stmt clang warnings. * Moving definition of hooks into header files if features are enabled. * Fixing formatting with uncrustify. * Fixing merge conflicts with main merge. * Fixing compiler errors due to merge issues and formatting. * Fixing Line feeds. * Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request * Further clean-up of clang and clang-tidy issues. * Removing compiler specific pragmas from common c files. * Fixing missing lexicon entry and uncrustify formatting changes. * Resolving merge issue multiple defnitions of proto for prvIdleTask * Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control. * More uncrustify formatting issues. * Fixing extra bracket in #if statement. --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * POSIX port fixes (#626) * Fix types in POSIX port Use TaskFunction_t and StackType_t as other ports do. * Fix portTICK_RATE_MICROSECONDS in POSIX port --------- Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Cortex-M35P: Add Cortex-M35P port (#631) * Cortex-M35P: Add Cortex-M35P port The Cortex-M35P support added to kernel. The port hasn't been validated yet with TF-M. Hence TF-M support is not included in this port. Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Add portNORETURN to the newly added portmacro.h Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Introduced Github Status Badge for Unit Tests (#634) * Introduced Github Status Badge for Unit Tests * Github status badge to point to latest run * Github status badge UT points to latest results * Fixed URL for Github Status badge --------- Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Remove C99 requirement from CMake file (#633) * Remove C99 requirement from CMake file The kernel source is C89 compliant and does not need C99. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Explicitly set C89 requirement for kernel Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions (#343) * Pass top of stack to configINIT_TLS_BLOCK Picolibc wants to allocate the per-task TLS block within the stack segment, so it will need to modify the top of stack value. Pass the pxTopOfStack variable to make this explicit. Signed-off-by: Keith Packard <keithpac@amazon.com> * Move newlib-specific definitions to separate file This reduces the clutter in FreeRTOS.h caused by having newlib-specific macros present there. Signed-off-by: Keith Packard <keithpac@amazon.com> * Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT Remove reference to configUSE_NEWLIB_REENTRANT as that only works when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always set when configUSE_NEWLIB_REENTRANT is set, so using both was redundant in that case. Signed-off-by: Keith Packard <keithpac@amazon.com> * portable-ARC: Adapt ARC support to use generalized TLS support With generalized thread local storage (TLS) support present in the core, the two ARC ports need to have the changes to the TCB mirrored to them. Signed-off-by: Keith Packard <keithpac@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions This patch provides definitions of the general TLS support macros in terms of the Picolibc TLS support functions. Picolibc is normally configured to use TLS internally for all variables that are intended to be task-local, so these changes are necessary for picolibc to work correctly with FreeRTOS. The picolibc helper functions rely on elements within the linker script to arrange the TLS data in memory and define some symbols. Applications wanting to use this mechanism will need changes in their linker script when migrating to picolibc. Signed-off-by: Keith Packard <keithpac@amazon.com> --------- Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Interrupt priority assert improvements for CM3/4/7 (#602) * Interrupt priority assert improvements for CM3/4/7 In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that `configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the number of priority bits implemented by the hardware. Change these ports to also use the lowest priority for PendSV and SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`. * Remove not needed configKERNEL_INTERRUPT_PRIORITY define Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Introduced code coverage status badge (#635) * Introduced code coverage status badge * Trying to fix the URL checker issue * Fix URL check Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636) * added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port * Added SIZE_MAX definition to PIC24/dsPIC33 * Fix TLS and stack alignment when using picolibc (#637) Both the TLS block and stack must be correctly aligned when using picolibc. The architecture stack alignment is represented by the portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the Picolibc _tls_align() inline function for Picolibc version 1.8 and above. For older versions of Picolibc, we'll assume that the TLS block requires the same alignment as the stack. For downward growing stacks, this requires aligning the start of the TLS block to the maximum of the stack alignment and the TLS alignment. With this, both the TLS block and stack will now be correctly aligned. For upward growing stacks, the two areas must be aligned independently; the TLS block is aligned from the start of the stack, then the tls space is allocated, and then the stack is aligned above that. It's probably useful to know here that the linker ensures that variables within the TLS block are assigned offsets that match their alignment requirements. If the TLS block itself is correctly aligned, then everything within will also be. I have only tested the downward growing stack branch of this patch. Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Enable building the GCC Cortex-R5 port without an FPU (#586) * Ensure configUSE_TASK_FPU_SUPPORT option is set correctly If one does enable the FPU of the Cortex-R5 processor, then the GCC compiler will define the macro __ARM_FP. This can be used to ensure, that the configUSE_TASK_FPU_SUPPORT is set accordingly. * Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1 * Remove error case in pxPortInitialiseStack The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled * Enable access to FPU registers only if FPU is enabled * Make minor formating changes * Format ARM Cortex-R5 port * Address review comments from @ChristosZosi * Minor code review suggestions Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix freertos_kernel cmake property, Posix Port (#640) * Fix freertos_kernel cmake property, Posix Port * Moves the `set_property()` call below the target definition in top level CMakeLists file * Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t * Add blank line to CMakeLists.txt * Add missing FreeRTOS+ defines * Run kernel demos and unit tests for PR changes (#645) * Run kernel demos and unit tests for PR changes Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these checks currently use main branch of FreeRTOS-Kernel. This commits updates these checks to use the changes in the PR. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Do not specify PR SHA explicitly as that is default Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Remove explicit PR SHA from kernel checks Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add functions to get the buffers of statically created objects (#641) Added various ...GetStaticBuffer() functions to get the buffers of statically created objects. --------- Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Cortex-M Assert when NVIC implements 8 PRIO bits (#639) * Cortex-M Assert when NVIC implements 8 PRIO bits * Fix CM3 ports * Fix ARM_CM3_MPU * Fix ARM CM3 * Fix ARM_CM4_MPU * Fix ARM_CM4 * Fix GCC ARM_CM7 * Fix IAR ARM ports * Uncrustify changes * Fix MikroC_ARM_CM4F port * Fix MikroC_ARM_CM4F port-(2) * Fix RVDS ARM ports * Revert changes for Tasking/ARM_CM4F port * Revert changes for Tasking/ARM_CM4F port-(2) * Update port.c Fix GCC/ARM_CM4F port * Update port.c * update GCC\ARM_CM4F port * update port.c * Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority * Fix merge error: remove duplicate code * Fix typos --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> * Remove C90 requirement from CMakeLists (#649) This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984 We will re-evaluate and accordingly add this later. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Only add alignment padding when needed (#650) Heap 4 and Heap 5 add some padding to ensure that the allocated blocks are always aligned to portBYTE_ALIGNMENT bytes. The code until now was adding padding always even if the resulting block was already aligned. This commits updates the code to only add padding if the resulting block is not aligned. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * add a missing comma (#651) * fix conversion warning (#658) FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion] Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Cervenka Dusan <cervenka@acrios.com> Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com> Co-authored-by: tcpluess <tpluess@ieee.org> Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Chris Copeland <chris@chrisnc.net> Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com> Co-authored-by: Dusan Cervenka <cervenka@acrios.com> Co-authored-by: bbain <16752579+bbain@users.noreply.github.com> Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com> Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Co-authored-by: phelter <paulheltera@gmail.com> Co-authored-by: jacky309 <jacques.guillou@gmail.com> Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Keith Packard <keithp@keithp.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Joseph Julicher <jjulicher@mac.com> Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com> Co-authored-by: Holden <holden-zenithaerotech.com> Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch> Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com> * Not yield for running task in prvYieldForTask (#72) * Raise priority of a running task should not alter other cores * Remove unreachable code in prvSelectHighestPriorityTask (#70) * Remove unreachable code in prvSelectHighestPriorityTask * Remove unreachable assert condition * Update comment * Move static idle task memory to global scope (#75) * Update XMOS AICORE conflict (#77) * Define portBASE_TYPE in XMOS AICORE porting * Update enter critical from ISR API * Fix run time stats for SMP (#76) * Update get idle tasks stats * Fix get task stats * Fix missing configNUM_CORES * Update the uxSchedulerSuspended after prvCheckForRunStateChange (#62) * Update the uxSchedulerSuspended after the prvCheckForRunStateChange to prevent race condition in fromISR APIs * Fix SMP dev branch CI errors (#79) * Fix uncrustify * Update lexicon * Remove tailing space * Ignore XMOS AICORE header check * Fix ulTotalRunTime and ulTaskSwitchedInTime (#80) * SMP has multiple ulTotalRunTime and ulTaskSwitchedInTime * Smp dev compelete merge main 20230424 (#78) * Fix array-bounds compiler warning on gcc11+ in list.h (#580) listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to being a MiniListItem_t, can be shorter than a ListItem_t. Thus, `( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the `List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext` through a `MiniListItem_t` instead. * move the prototype for vApplicationIdleHook to task.h. (#600) Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update equal priority task preemption (#603) * vTaskResume and vTaskPrioritySet don't preempt equal priority task * Update vTaskResumeAll not to preempt task with equal priority * Fix in xTaskResumeFromISR * Update FreeRTOS/FreeRTOS build checks (#613) This is needed to be compatible with the refactoring done in this PR - https://github.com/FreeRTOS/FreeRTOS/pull/889 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611) Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the only requirement for these functions to work. * Fix some CMake documentation typos (#616) The quick start instructions for CMake mention the "master" git branch which has been replaced by "main" in the current repo. The main CMakeLists.txt documents how to integrate a custom port. Fix a typo in the suggested CMake code. * Added support of 64bit events. (#597) * Added support of 64bit even Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Added missing brackets Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Made proper name for tick macro. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Improved macro evaluation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fixed missed port files + documentation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Changes made on PR Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fix macro definition. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Formatted code with uncrustify Signed-off-by: Cervenka Dusan <cervenka@acrios.com> --------- Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Introduce portMEMORY_BARRIER for Microblaze port. (#621) The introduction of `portMEMORY_BARRIER` will ensure the places in the kernel use a barrier will work. For example, `xTaskResumeAll` has a memory barrier to ensure its correctness when compiled with optimization enabled. Without the barrier `xTaskResumeAll` can fail (e.g. start reading and writing to address 0 and/or infinite looping) when `xPendingReadyList` contains more than one task to restore. In `xTaskResumeAll` the compiler chooses to cache the `pxTCB` the first time through the loop for use in every subsequent loop. This is incorrect as the removal of `pxTCB->xEventListItem` will actually change the value of `pxTCB` if it was read again at the top of the loop. The barrier forces the compiler to read `pxTCB` again at the top of the loop. The compiler is operating correctly. The removal `pxTCB->xEventListItem` executes on a `List_t *` and `ListItem_t *`. This means that the compiler can assume that any `MiniListItem_t` values are unchanged by the loop (i.e. "strict-aliasing"). This allows the compiler to cache `pxTCB` as it is obtained via a `MiniListItem_t`. This is incorrect in this case because it is possible for a `ListItem_t *` to actually alias a `MiniListItem_t`. This is technically a "violation of aliasing rules" so we use the the barrier to disable the strict-aliasing optimization in this loop. * Do not call exit() on MSVC Port when calling vPortEndScheduler (#624) * make port exitable * correctly set xPortRunning to False * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update PR template to include checkbox for Unit Test related changes (#627) * Fix build failure introduced in PR #597 (#629) The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS which can be defined to one of the following: * TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide. * TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide. * TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide. Earlier we supported 16 and 32 bit width for tick type which was controlled using the config option configUSE_16_BIT_TICKS. The PR tried to maintain backward compatibility by honoring configUSE_16_BIT_TICKS. The backward compatibility did not work as expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used before it was defined. This PR addresses it by ensuring that the macro configTICK_TYPE_WIDTH_IN_BITS is defined before it is used. Testing 1. configUSE_16_BIT_TICKS is defined to 0. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 2. configUSE_16_BIT_TICKS is defined to 1. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS. ``` #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. ``` The testing was done for GCC/ARM_CM3 port which does not support 64 bit tick type. 6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Missing definition: One of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` 7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Only one of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Feature/fixing clang gnu compiler warnings (#620) * Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558) * Using single name definition for libraries everywhere. (#558) * Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571) * Removing compiler warnings for GNU and Clang. (#571) * Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms. * Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY. * Fixing clang and gnu compiler warnings. * Adding in project information and how to compile for GNU/clang * Fixing compiler issue with unused variable - no need to declare variable. * Adding in compile warnings for linux builds that kernel is okay with using. * Fixing more extra-semi-stmt clang warnings. * Moving definition of hooks into header files if features are enabled. * Fixing formatting with uncrustify. * Fixing merge conflicts with main merge. * Fixing compiler errors due to merge issues and formatting. * Fixing Line feeds. * Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request * Further clean-up of clang and clang-tidy issues. * Removing compiler specific pragmas from common c files. * Fixing missing lexicon entry and uncrustify formatting changes. * Resolving merge issue multiple defnitions of proto for prvIdleTask * Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control. * More uncrustify formatting issues. * Fixing extra bracket in #if statement. --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * POSIX port fixes (#626) * Fix types in POSIX port Use TaskFunction_t and StackType_t as other ports do. * Fix portTICK_RATE_MICROSECONDS in POSIX port --------- Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Cortex-M35P: Add Cortex-M35P port (#631) * Cortex-M35P: Add Cortex-M35P port The Cortex-M35P support added to kernel. The port hasn't been validated yet with TF-M. Hence TF-M support is not included in this port. Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Add portNORETURN to the newly added portmacro.h Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Introduced Github Status Badge for Unit Tests (#634) * Introduced Github Status Badge for Unit Tests * Github status badge to point to latest run * Github status badge UT points to latest results * Fixed URL for Github Status badge --------- Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Remove C99 requirement from CMake file (#633) * Remove C99 requirement from CMake file The kernel source is C89 compliant and does not need C99. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Explicitly set C89 requirement for kernel Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions (#343) * Pass top of stack to configINIT_TLS_BLOCK Picolibc wants to allocate the per-task TLS block within the stack segment, so it will need to modify the top of stack value. Pass the pxTopOfStack variable to make this explicit. Signed-off-by: Keith Packard <keithpac@amazon.com> * Move newlib-specific definitions to separate file This reduces the clutter in FreeRTOS.h caused by having newlib-specific macros present there. Signed-off-by: Keith Packard <keithpac@amazon.com> * Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT Remove reference to configUSE_NEWLIB_REENTRANT as that only works when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always set when configUSE_NEWLIB_REENTRANT is set, so using both was redundant in that case. Signed-off-by: Keith Packard <keithpac@amazon.com> * portable-ARC: Adapt ARC support to use generalized TLS support With generalized thread local storage (TLS) support present in the core, the two ARC ports need to have the changes to the TCB mirrored to them. Signed-off-by: Keith Packard <keithpac@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions This patch provides definitions of the general TLS support macros in terms of the Picolibc TLS support functions. Picolibc is normally configured to use TLS internally for all variables that are intended to be task-local, so these changes are necessary for picolibc to work correctly with FreeRTOS. The picolibc helper functions rely on elements within the linker script to arrange the TLS data in memory and define some symbols. Applications wanting to use this mechanism will need changes in their linker script when migrating to picolibc. Signed-off-by: Keith Packard <keithpac@amazon.com> --------- Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Interrupt priority assert improvements for CM3/4/7 (#602) * Interrupt priority assert improvements for CM3/4/7 In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that `configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the number of priority bits implemented by the hardware. Change these ports to also use the lowest priority for PendSV and SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`. * Remove not needed configKERNEL_INTERRUPT_PRIORITY define Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Introduced code coverage status badge (#635) * Introduced code coverage status badge * Trying to fix the URL checker issue * Fix URL check Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636) * added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port * Added SIZE_MAX definition to PIC24/dsPIC33 * Fix TLS and stack alignment when using picolibc (#637) Both the TLS block and stack must be correctly aligned when using picolibc. The architecture stack alignment is represented by the portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the Picolibc _tls_align() inline function for Picolibc version 1.8 and above. For older versions of Picolibc, we'll assume that the TLS block requires the same alignment as the stack. For downward growing stacks, this requires aligning the start of the TLS block to the maximum of the stack alignment and the TLS alignment. With this, both the TLS block and stack will now be correctly aligned. For upward growing stacks, the two areas must be aligned independently; the TLS block is aligned from the start of the stack, then the tls space is allocated, and then the stack is aligned above that. It's probably useful to know here that the linker ensures that variables within the TLS block are assigned offsets that match their alignment requirements. If the TLS block itself is correctly aligned, then everything within will also be. I have only tested the downward growing stack branch of this patch. Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Enable building the GCC Cortex-R5 port without an FPU (#586) * Ensure configUSE_TASK_FPU_SUPPORT option is set correctly If one does enable the FPU of the Cortex-R5 processor, then the GCC compiler will define the macro __ARM_FP. This can be used to ensure, that the configUSE_TASK_FPU_SUPPORT is set accordingly. * Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1 * Remove error case in pxPortInitialiseStack The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled * Enable access to FPU registers only if FPU is enabled * Make minor formating changes * Format ARM Cortex-R5 port * Address review comments from @ChristosZosi * Minor code review suggestions Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix freertos_kernel cmake property, Posix Port (#640) * Fix freertos_kernel cmake property, Posix Port * Moves the `set_property()` call below the target definition in top level CMakeLists file * Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t * Add blank line to CMakeLists.txt * Add missing FreeRTOS+ defines * Run kernel demos and unit tests for PR changes (#645) * Run kernel demos and unit tests for PR changes Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these checks currently use main branch of FreeRTOS-Kernel. This commits updates these checks to use the changes in the PR. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Do not specify PR SHA explicitly as that is default Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Remove explicit PR SHA from kernel checks Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add functions to get the buffers of statically created objects (#641) Added various ...GetStaticBuffer() functions to get the buffers of statically created objects. --------- Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Cortex-M Assert when NVIC implements 8 PRIO bits (#639) * Cortex-M Assert when NVIC implements 8 PRIO bits * Fix CM3 ports * Fix ARM_CM3_MPU * Fix ARM CM3 * Fix ARM_CM4_MPU * Fix ARM_CM4 * Fix GCC ARM_CM7 * Fix IAR ARM ports * Uncrustify changes * Fix MikroC_ARM_CM4F port * Fix MikroC_ARM_CM4F port-(2) * Fix RVDS ARM ports * Revert changes for Tasking/ARM_CM4F port * Revert changes for Tasking/ARM_CM4F port-(2) * Update port.c Fix GCC/ARM_CM4F port * Update port.c * update GCC\ARM_CM4F port * update port.c * Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority * Fix merge error: remove duplicate code * Fix typos --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> * Remove C90 requirement from CMakeLists (#649) This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984 We will re-evaluate and accordingly add this later. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Only add alignment padding when needed (#650) Heap 4 and Heap 5 add some padding to ensure that the allocated blocks are always aligned to portBYTE_ALIGNMENT bytes. The code until now was adding padding always even if the resulting block was already aligned. This commits updates the code to only add padding if the resulting block is not aligned. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * add a missing comma (#651) * fix conversion warning (#658) FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion] Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> * ARMv7M: Adjust implemented priority bit assertions (#665) Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS configPRIO_BITS configuration macros such that these macros specify the minimum number of implemented priority bits supported by a config build rather than the exact number of implemented priority bits. Related to Qemu issue #1122 * Format portmacro.h in arm CM0 ports * portable/ARM_CM0: Add xPortIsInsideInterrupt Add missing xPortIsInsideInterrupt function to Cortex-M0 port. --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Cervenka Dusan <cervenka@acrios.com> Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com> Co-authored-by: tcpluess <tpluess@ieee.org> Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Chris Copeland <chris@chrisnc.net> Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com> Co-authored-by: Dusan Cervenka <cervenka@acrios.com> Co-authored-by: bbain <16752579+bbain@users.noreply.github.com> Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com> Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Co-authored-by: phelter <paulheltera@gmail.com> Co-authored-by: jacky309 <jacques.guillou@gmail.com> Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Keith Packard <keithp@keithp.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Joseph Julicher <jjulicher@mac.com> Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com> Co-authored-by: Holden <holden-zenithaerotech.com> Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch> Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com> * Update coverity violation for SMP (#81) * Update coverity violation for SMP ( code surrounded by configNUMBER_OF_CORES > 1 ). * Single core and common code are still scanned by lint tool. * Smp dev merge main 0527 (#82) * Fix array-bounds compiler warning on gcc11+ in list.h (#580) listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to being a MiniListItem_t, can be shorter than a ListItem_t. Thus, `( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the `List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext` through a `MiniListItem_t` instead. * move the prototype for vApplicationIdleHook to task.h. (#600) Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update equal priority task preemption (#603) * vTaskResume and vTaskPrioritySet don't preempt equal priority task * Update vTaskResumeAll not to preempt task with equal priority * Fix in xTaskResumeFromISR * Update FreeRTOS/FreeRTOS build checks (#613) This is needed to be compatible with the refactoring done in this PR - https://github.com/FreeRTOS/FreeRTOS/pull/889 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611) Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the only requirement for these functions to work. * Fix some CMake documentation typos (#616) The quick start instructions for CMake mention the "master" git branch which has been replaced by "main" in the current repo. The main CMakeLists.txt documents how to integrate a custom port. Fix a typo in the suggested CMake code. * Added support of 64bit events. (#597) * Added support of 64bit even Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Added missing brackets Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Made proper name for tick macro. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Improved macro evaluation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fixed missed port files + documentation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Changes made on PR Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fix macro definition. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Formatted code with uncrustify Signed-off-by: Cervenka Dusan <cervenka@acrios.com> --------- Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Introduce portMEMORY_BARRIER for Microblaze port. (#621) The introduction of `portMEMORY_BARRIER` will ensure the places in the kernel use a barrier will work. For example, `xTaskResumeAll` has a memory barrier to ensure its correctness when compiled with optimization enabled. Without the barrier `xTaskResumeAll` can fail (e.g. start reading and writing to address 0 and/or infinite looping) when `xPendingReadyList` contains more than one task to restore. In `xTaskResumeAll` the compiler chooses to cache the `pxTCB` the first time through the loop for use in every subsequent loop. This is incorrect as the removal of `pxTCB->xEventListItem` will actually change the value of `pxTCB` if it was read again at the top of the loop. The barrier forces the compiler to read `pxTCB` again at the top of the loop. The compiler is operating correctly. The removal `pxTCB->xEventListItem` executes on a `List_t *` and `ListItem_t *`. This means that the compiler can assume that any `MiniListItem_t` values are unchanged by the loop (i.e. "strict-aliasing"). This allows the compiler to cache `pxTCB` as it is obtained via a `MiniListItem_t`. This is incorrect in this case because it is possible for a `ListItem_t *` to actually alias a `MiniListItem_t`. This is technically a "violation of aliasing rules" so we use the the barrier to disable the strict-aliasing optimization in this loop. * Do not call exit() on MSVC Port when calling vPortEndScheduler (#624) * make port exitable * correctly set xPortRunning to False * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update PR template to include checkbox for Unit Test related changes (#627) * Fix build failure introduced in PR #597 (#629) The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS which can be defined to one of the following: * TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide. * TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide. * TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide. Earlier we supported 16 and 32 bit width for tick type which was controlled using the config option configUSE_16_BIT_TICKS. The PR tried to maintain backward compatibility by honoring configUSE_16_BIT_TICKS. The backward compatibility did not work as expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used before it was defined. This PR addresses it by ensuring that the macro configTICK_TYPE_WIDTH_IN_BITS is defined before it is used. Testing 1. configUSE_16_BIT_TICKS is defined to 0. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 2. configUSE_16_BIT_TICKS is defined to 1. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS. ``` #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. ``` The testing was done for GCC/ARM_CM3 port which does not support 64 bit tick type. 6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Missing definition: One of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` 7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Only one of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Feature/fixing clang gnu compiler warnings (#620) * Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558) * Using single name definition for libraries everywhere. (#558) * Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571) * Removing compiler warnings for GNU and Clang. (#571) * Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms. * Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY. * Fixing clang and gnu compiler warnings. * Adding in project information and how to compile for GNU/clang * Fixing compiler issue with unused variable - no need to declare variable. * Adding in compile warnings for linux builds that kernel is okay with using. * Fixing more extra-semi-stmt clang warnings. * Moving definition of hooks into header files if features are enabled. * Fixing formatting with uncrustify. * Fixing merge conflicts with main merge. * Fixing compiler errors due to merge issues and formatting. * Fixing Line feeds. * Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request * Further clean-up of clang and clang-tidy issues. * Removing compiler specific pragmas from common c files. * Fixing missing lexicon entry and uncrustify formatting changes. * Resolving merge issue multiple defnitions of proto for prvIdleTask * Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control. * More uncrustify formatting issues. * Fixing extra bracket in #if statement. --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * POSIX port fixes (#626) * Fix types in POSIX port Use TaskFunction_t and StackType_t as other ports do. * Fix portTICK_RATE_MICROSECONDS in POSIX port --------- Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Cortex-M35P: Add Cortex-M35P port (#631) * Cortex-M35P: Add Cortex-M35P port The Cortex-M35P support added to kernel. The port hasn't been validated yet with TF-M. Hence TF-M support is not included in this port. Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Add portNORETURN to the newly added portmacro.h Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Introduced Github Status Badge for Unit Tests (#634) * Introduced Github Status Badge for Unit Tests * Github status badge to point to latest run * Github status badge UT points to latest results * Fixed URL for Github Status badge --------- Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Remove C99 requirement from CMake file (#633) * Remove C99 requirement from CMake file The kernel source is C89 compliant and does not need C99. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Explicitly set C89 requirement for kernel Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions (#343) * Pass top of stack to configINIT_TLS_BLOCK Picolibc wants to allocate the per-task TLS block within the stack segment, so it will need to modify the top of stack value. Pass the pxTopOfStack variable to make this explicit. Signed-off-by: Keith Packard <keithpac@amazon.com> * Move newlib-specific definitions to separate file This reduces the clutter in FreeRTOS.h caused by having newlib-specific macros present there. Signed-off-by: Keith Packard <keithpac@amazon.com> * Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT Remove reference to configUSE_NEWLIB_REENTRANT as that only works when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always set when configUSE_NEWLIB_REENTRANT is set, so using both was redundant in that case. Signed-off-by: Keith Packard <keithpac@amazon.com> * portable-ARC: Adapt ARC support to use generalized TLS support With generalized thread local storage (TLS) support present in the core, the two ARC ports need to have the changes to the TCB mirrored to them. Signed-off-by: Keith Packard <keithpac@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions This patch provides definitions of the general TLS support macros in terms of the Picolibc TLS support functions. Picolibc is normally configured to use TLS internally for all variables that are intended to be task-local, so these changes are necessary for picolibc to work correctly with FreeRTOS. The picolibc helper functions rely on elements within the linker script to arrange the TLS data in memory and define some symbols. Applications wanting to use this mechanism will need changes in their linker script when migrating to picolibc. Signed-off-by: Keith Packard <keithpac@amazon.com> --------- Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Interrupt priority assert improvements for CM3/4/7 (#602) * Interrupt priority assert improvements for CM3/4/7 In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that `configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the number of priority bits implemented by the hardware. Change these ports to also use the lowest priority for PendSV and SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`. * Remove not needed configKERNEL_INTERRUPT_PRIORITY define Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Introduced code coverage status badge (#635) * Introduced code coverage status badge * Trying to fix the URL checker issue * Fix URL check Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636) * added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port * Added SIZE_MAX definition to PIC24/dsPIC33 * Fix TLS and stack alignment when using picolibc (#637) Both the TLS block and stack must be correctly aligned when using picolibc. The architecture stack alignment is represented by the portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the Picolibc _tls_align() inline function for Picolibc version 1.8 and above. For older versions of Picolibc, we'll assume that the TLS block requires the same alignment as the stack. For downward growing stacks, this requires aligning the start of the TLS block to the maximum of the stack alignment and the TLS alignment. With this, both the TLS block and stack will now be correctly aligned. For upward growing stacks, the two areas must be aligned independently; the TLS block is aligned from the start of the stack, then the tls space is allocated, and then the stack is aligned above that. It's probably useful to know here that the linker ensures that variables within the TLS block are assigned offsets that match their alignment requirements. If the TLS block itself is correctly aligned, then everything within will also be. I have only tested the downward growing stack branch of this patch. Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Enable building the GCC Cortex-R5 port without an FPU (#586) * Ensure configUSE_TASK_FPU_SUPPORT option is set correctly If one does enable the FPU of the Cortex-R5 processor, then the GCC compiler will define the macro __ARM_FP. This can be used to ensure, that the configUSE_TASK_FPU_SUPPORT is set accordingly. * Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1 * Remove error case in pxPortInitialiseStack The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled * Enable access to FPU registers only if FPU is enabled * Make minor formating changes * Format ARM Cortex-R5 port * Address review comments from @ChristosZosi * Minor code review suggestions Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix freertos_kernel cmake property, Posix Port (#640) * Fix freertos_kernel cmake property, Posix Port * Moves the `set_property()` call below the target definition in top level CMakeLists file * Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t * Add blank line to CMakeLists.txt * Add missing FreeRTOS+ defines * Run kernel demos and unit tests for PR changes (#645) * Run kernel demos and unit tests for PR changes Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these checks currently use main branch of FreeRTOS-Kernel. This commits updates these checks to use the changes in the PR. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Do not specify PR SHA explicitly as that is default Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Remove explicit PR SHA from kernel checks Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add functions to get the buffers of statically created objects (#641) Added various ...GetStaticBuffer() functions to get the buffers of statically created objects. --------- Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Cortex-M Assert when NVIC implements 8 PRIO bits (#639) * Cortex-M Assert when NVIC implements 8 PRIO bits * Fix CM3 ports * Fix ARM_CM3_MPU * Fix ARM CM3 * Fix ARM_CM4_MPU * Fix ARM_CM4 * Fix GCC ARM_CM7 * Fix IAR ARM ports * Uncrustify changes * Fix MikroC_ARM_CM4F port * Fix MikroC_ARM_CM4F port-(2) * Fix RVDS ARM ports * Revert changes for Tasking/ARM_CM4F port * Revert changes for Tasking/ARM_CM4F port-(2) * Update port.c Fix GCC/ARM_CM4F port * Update port.c * update GCC\ARM_CM4F port * update port.c * Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority * Fix merge error: remove duplicate code * Fix typos --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> * Remove C90 requirement from CMakeLists (#649) This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984 We will re-evaluate and accordingly add this later. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Only add alignment padding when needed (#650) Heap 4 and Heap 5 add some padding to ensure that the allocated blocks are always aligned to portBYTE_ALIGNMENT bytes. The code until now was adding padding always even if the resulting block was already aligned. This commits updates the code to only add padding if the resulting block is not aligned. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * add a missing comma (#651) * fix conversion warning (#658) FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion] Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> * ARMv7M: Adjust implemented priority bit assertions (#665) Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS configPRIO_BITS configuration macros such that these macros specify the minimum number of implemented priority bits supported by a config build rather than the exact number of implemented priority bits. Related to Qemu issue #1122 * Format portmacro.h in arm CM0 ports * portable/ARM_CM0: Add xPortIsInsideInterrupt Add missing xPortIsInsideInterrupt function to Cortex-M0 port. * tree-wide: Unify formatting of __cplusplus ifdefs * Paranthesize expression-like macro (#668) * Updated tasks.c checks for scheduler suspension (#670) This commit updates the checks for the variable uxSchedulerSuspended in tasks.c module to use a uniform format. Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com> * Fix cast alignment warning (#669) * Fix cast alignment warning Without this change, the code produces the following warning when compiled with `-Wcast-align` flag: ``` cast increases required alignment of target type ``` Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Align StackSize and StackAddress for macOS (#674) * Armv8-M (except Cortex-M23) interrupt priority checking (#673) * Armv8-M: Formatting changes Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Armv8-M: Add support for interrupt priority check FreeRTOS provides `FromISR` system calls which can be called directly from interrupt service routines. It is crucial that the priority of these ISRs is set to same or lower value (numerically higher) than that of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. Add a check to trigger an assert when an ISR with priority higher (numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls `FromISR` system calls if `configASSERT` macro is defined. In addition, add a config option `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt priority check while running on QEMU. Based on the discussion https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt priority bits in QEMU do not match the real hardware. Therefore the assert that checks the number of implemented bits and __NVIC_PRIO_BITS will always fail. The config option `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the `FreeRTOSConfig.h` for QEMU targets. Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Use SHPR2 for calculating interrupt priority bits This removes the dependency on the secure software to mark the interrupt as non-secure. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Use the extended movx instruction instead of mov (#676) The following is from the MSP430X instruction set - ``` MOVX.W Move source word to destination word. The source operand is copied to the destination. The source operand is not affected. Both operands may be located in the full address space. ``` The movx instruction allows both the operands to be located in the full address space and therefore, works with large data model as well. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Cervenka Dusan <cervenka@acrios.com> Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com> Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com> Co-authored-by: tcpluess <tpluess@ieee.org> Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Chris Copeland <chris@chrisnc.net> Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com> Co-authored-by: Dusan Cervenka <cervenka@acrios.com> Co-authored-by: bbain <16752579+bbain@users.noreply.github.com> Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com> Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Co-authored-by: phelter <paulheltera@gmail.com> Co-authored-by: jacky309 <jacques.guillou@gmail.com> Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Keith Packard <keithp@keithp.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Joseph Julicher <jjulicher@mac.com> Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com> Co-authored-by: Holden <holden-zenithaerotech.com> Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch> Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com> Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com> * Merge main to SMP branch (#86) * Fix array-bounds compiler warning on gcc11+ in list.h (#580) listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to being a MiniListItem_t, can be shorter than a ListItem_t. Thus, `( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the `List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext` through a `MiniListItem_t` instead. * move the prototype for vApplicationIdleHook to task.h. (#600) Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update equal priority task preemption (#603) * vTaskResume and vTaskPrioritySet don't preempt equal priority task * Update vTaskResumeAll not to preempt task with equal priority * Fix in xTaskResumeFromISR * Update FreeRTOS/FreeRTOS build checks (#613) This is needed to be compatible with the refactoring done in this PR - https://github.com/FreeRTOS/FreeRTOS/pull/889 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611) Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the only requirement for these functions to work. * Fix some CMake documentation typos (#616) The quick start instructions for CMake mention the "master" git branch which has been replaced by "main" in the current repo. The main CMakeLists.txt documents how to integrate a custom port. Fix a typo in the suggested CMake code. * Added support of 64bit events. (#597) * Added support of 64bit even Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Added missing brackets Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Made proper name for tick macro. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Improved macro evaluation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fixed missed port files + documentation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Changes made on PR Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fix macro definition. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Formatted code with uncrustify Signed-off-by: Cervenka Dusan <cervenka@acrios.com> --------- Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Introduce portMEMORY_BARRIER for Microblaze port. (#621) The introduction of `portMEMORY_BARRIER` will ensure the places in the kernel use a barrier will work. For example, `xTaskResumeAll` has a memory barrier to ensure its correctness when compiled with optimization enabled. Without the barrier `xTaskResumeAll` can fail (e.g. start reading and writing to address 0 and/or infinite looping) when `xPendingReadyList` contains more than one task to restore. In `xTaskResumeAll` the compiler chooses to cache the `pxTCB` the first time through the loop for use in every subsequent loop. This is incorrect as the removal of `pxTCB->xEventListItem` will actually change the value of `pxTCB` if it was read again at the top of the loop. The barrier forces the compiler to read `pxTCB` again at the top of the loop. The compiler is operating correctly. The removal `pxTCB->xEventListItem` executes on a `List_t *` and `ListItem_t *`. This means that the compiler can assume that any `MiniListItem_t` values are unchanged by the loop (i.e. "strict-aliasing"). This allows the compiler to cache `pxTCB` as it is obtained via a `MiniListItem_t`. This is incorrect in this case because it is possible for a `ListItem_t *` to actually alias a `MiniListItem_t`. This is technically a "violation of aliasing rules" so we use the the barrier to disable the strict-aliasing optimization in this loop. * Do not call exit() on MSVC Port when calling vPortEndScheduler (#624) * make port exitable * correctly set xPortRunning to False * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update PR template to include checkbox for Unit Test related changes (#627) * Fix build failure introduced in PR #597 (#629) The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS which can be defined to one of the following: * TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide. * TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide. * TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide. Earlier we supported 16 and 32 bit width for tick type which was controlled using the config option configUSE_16_BIT_TICKS. The PR tried to maintain backward compatibility by honoring configUSE_16_BIT_TICKS. The backward compatibility did not work as expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used before it was defined. This PR addresses it by ensuring that the macro configTICK_TYPE_WIDTH_IN_BITS is defined before it is used. Testing 1. configUSE_16_BIT_TICKS is defined to 0. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 2. configUSE_16_BIT_TICKS is defined to 1. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS. ``` #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. ``` The testing was done for GCC/ARM_CM3 port which does not support 64 bit tick type. 6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Missing definition: One of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` 7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Only one of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Feature/fixing clang gnu compiler warnings (#620) * Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558) * Using single name definition for libraries everywhere. (#558) * Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571) * Removing compiler warnings for GNU and Clang. (#571) * Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms. * Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY. * Fixing clang and gnu compiler warnings. * Adding in project information and how to compile for GNU/clang * Fixing compiler issue with unused variable - no need to declare variable. * Adding in compile warnings for linux builds that kernel is okay with using. * Fixing more extra-semi-stmt clang warnings. * Moving definition of hooks into header files if features are enabled. * Fixing formatting with uncrustify. * Fixing merge conflicts with main merge. * Fixing compiler errors due to merge issues and formatting. * Fixing Line feeds. * Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request * Further clean-up of clang and clang-tidy issues. * Removing compiler specific pragmas from common c files. * Fixing missing lexicon entry and uncrustify formatting changes. * Resolving merge issue multiple defnitions of proto for prvIdleTask * Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control. * More uncrustify formatting issues. * Fixing extra bracket in #if statement. --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * POSIX port fixes (#626) * Fix types in POSIX port Use TaskFunction_t and StackType_t as other ports do. * Fix portTICK_RATE_MICROSECONDS in POSIX port --------- Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Cortex-M35P: Add Cortex-M35P port (#631) * Cortex-M35P: Add Cortex-M35P port The Cortex-M35P support added to kernel. The port hasn't been validated yet with TF-M. Hence TF-M support is not included in this port. Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Add portNORETURN to the newly added portmacro.h Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Introduced Github Status Badge for Unit Tests (#634) * Introduced Github Status Badge for Unit Tests * Github status badge to point to latest run * Github status badge UT points to latest results * Fixed URL for Github Status badge --------- Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Remove C99 requirement from CMake file (#633) * Remove C99 requirement from CMake file The kernel source is C89 compliant and does not need C99. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Explicitly set C89 requirement for kernel Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions (#343) * Pass top of stack to configINIT_TLS_BLOCK Picolibc wants to allocate the per-task TLS block within the stack segment, so it will need to modify the top of stack value. Pass the pxTopOfStack variable to make this explicit. Signed-off-by: Keith Packard <keithpac@amazon.com> * Move newlib-specific definitions to separate file This reduces the clutter in FreeRTOS.h caused by having newlib-specific macros present there. Signed-off-by: Keith Packard <keithpac@amazon.com> * Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT Remove reference to configUSE_NEWLIB_REENTRANT as that only works when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always set when configUSE_NEWLIB_REENTRANT is set, so using both was redundant in that case. Signed-off-by: Keith Packard <keithpac@amazon.com> * portable-ARC: Adapt ARC support to use generalized TLS support With generalized thread local storage (TLS) support present in the core, the two ARC ports need to have the changes to the TCB mirrored to them. Signed-off-by: Keith Packard <keithpac@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions This patch provides definitions of the general TLS support macros in terms of the Picolibc TLS support functions. Picolibc is normally configured to use TLS internally for all variables that are intended to be task-local, so these changes are necessary for picolibc to work correctly with FreeRTOS. The picolibc helper functions rely on elements within the linker script to arrange the TLS data in memory and define some symbols. Applications wanting to use this mechanism will need changes in their linker script when migrating to picolibc. Signed-off-by: Keith Packard <keithpac@amazon.com> --------- Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Interrupt priority assert improvements for CM3/4/7 (#602) * Interrupt priority assert improvements for CM3/4/7 In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that `configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the number of priority bits implemented by the hardware. Change these ports to also use the lowest priority for PendSV and SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`. * Remove not needed configKERNEL_INTERRUPT_PRIORITY define Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Introduced code coverage status badge (#635) * Introduced code coverage status badge * Trying to fix the URL checker issue * Fix URL check Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636) * added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port * Added SIZE_MAX definition to PIC24/dsPIC33 * Fix TLS and stack alignment when using picolibc (#637) Both the TLS block and stack must be correctly aligned when using picolibc. The architecture stack alignment is represented by the portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the Picolibc _tls_align() inline function for Picolibc version 1.8 and above. For older versions of Picolibc, we'll assume that the TLS block requires the same alignment as the stack. For downward growing stacks, this requires aligning the start of the TLS block to the maximum of the stack alignment and the TLS alignment. With this, both the TLS block and stack will now be correctly aligned. For upward growing stacks, the two areas must be aligned independently; the TLS block is aligned from the start of the stack, then the tls space is allocated, and then the stack is aligned above that. It's probably useful to know here that the linker ensures that variables within the TLS block are assigned offsets that match their alignment requirements. If the TLS block itself is correctly aligned, then everything within will also be. I have only tested the downward growing stack branch of this patch. Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Enable building the GCC Cortex-R5 port without an FPU (#586) * Ensure configUSE_TASK_FPU_SUPPORT option is set correctly If one does enable the FPU of the Cortex-R5 processor, then the GCC compiler will define the macro __ARM_FP. This can be used to ensure, that the configUSE_TASK_FPU_SUPPORT is set accordingly. * Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1 * Remove error case in pxPortInitialiseStack The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled * Enable access to FPU registers only if FPU is enabled * Make minor formating changes * Format ARM Cortex-R5 port * Address review comments from @ChristosZosi * Minor code review suggestions Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix freertos_kernel cmake property, Posix Port (#640) * Fix freertos_kernel cmake property, Posix Port * Moves the `set_property()` call below the target definition in top level CMakeLists file * Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t * Add blank line to CMakeLists.txt * Add missing FreeRTOS+ defines * Run kernel demos and unit tests for PR changes (#645) * Run kernel demos and unit tests for PR changes Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these checks currently use main branch of FreeRTOS-Kernel. This commits updates these checks to use the changes in the PR. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Do not specify PR SHA explicitly as that is default Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Remove explicit PR SHA from kernel checks Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add functions to get the buffers of statically created objects (#641) Added various ...GetStaticBuffer() functions to get the buffers of statically created objects. --------- Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Cortex-M Assert when NVIC implements 8 PRIO bits (#639) * Cortex-M Assert when NVIC implements 8 PRIO bits * Fix CM3 ports * Fix ARM_CM3_MPU * Fix ARM CM3 * Fix ARM_CM4_MPU * Fix ARM_CM4 * Fix GCC ARM_CM7 * Fix IAR ARM ports * Uncrustify changes * Fix MikroC_ARM_CM4F port * Fix MikroC_ARM_CM4F port-(2) * Fix RVDS ARM ports * Revert changes for Tasking/ARM_CM4F port * Revert changes for Tasking/ARM_CM4F port-(2) * Update port.c Fix GCC/ARM_CM4F port * Update port.c * update GCC\ARM_CM4F port * update port.c * Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority * Fix merge error: remove duplicate code * Fix typos --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> * Remove C90 requirement from CMakeLists (#649) This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984 We will re-evaluate and accordingly add this later. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Only add alignment padding when needed (#650) Heap 4 and Heap 5 add some padding to ensure that the allocated blocks are always aligned to portBYTE_ALIGNMENT bytes. The code until now was adding padding always even if the resulting block was already aligned. This commits updates the code to only add padding if the resulting block is not aligned. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * add a missing comma (#651) * fix conversion warning (#658) FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion] Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> * ARMv7M: Adjust implemented priority bit assertions (#665) Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS configPRIO_BITS configuration macros such that these macros specify the minimum number of implemented priority bits supported by a config build rather than the exact number of implemented priority bits. Related to Qemu issue #1122 * Format portmacro.h in arm CM0 ports * portable/ARM_CM0: Add xPortIsInsideInterrupt Add missing xPortIsInsideInterrupt function to Cortex-M0 port. * tree-wide: Unify formatting of __cplusplus ifdefs * Paranthesize expression-like macro (#668) * Updated tasks.c checks for scheduler suspension (#670) This commit updates the checks for the variable uxSchedulerSuspended in tasks.c module to use a uniform format. Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com> * Fix cast alignment warning (#669) * Fix cast alignment warning Without this change, the code produces the following warning when compiled with `-Wcast-align` flag: ``` cast increases required alignment of target type ``` Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Align StackSize and StackAddress for macOS (#674) * Armv8-M (except Cortex-M23) interrupt priority checking (#673) * Armv8-M: Formatting changes Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Armv8-M: Add support for interrupt priority check FreeRTOS provides `FromISR` system calls which can be called directly from interrupt service routines. It is crucial that the priority of these ISRs is set to same or lower value (numerically higher) than that of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. Add a check to trigger an assert when an ISR with priority higher (numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls `FromISR` system calls if `configASSERT` macro is defined. In addition, add a config option `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt priority check while running on QEMU. Based on the discussion https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt priority bits in QEMU do not match the real hardware. Therefore the assert that checks the number of implemented bits and __NVIC_PRIO_BITS will always fail. The config option `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the `FreeRTOSConfig.h` for QEMU targets. Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Use SHPR2 for calculating interrupt priority bits This removes the dependency on the secure software to mark the interrupt as non-secure. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Use the extended movx instruction instead of mov (#676) The following is from the MSP430X instruction set - ``` MOVX.W Move source word to destination word. The source operand is copied to the destination. The source operand is not affected. Both operands may be located in the full address space. ``` The movx instruction allows both the operands to be located in the full address space and therefore, works with large data model as well. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix eTaskGetState for pending ready tasks (#679) This commit fixes eTaskGetState so that eReady is returned for pending ready tasks. Co-authored-by: Darian Leung <darian@espressif.com> * Generates SBOM after source files are updated with release tag (#680) * update source file with release version info before SBOM generation * delete tag branch during cleanup * Add back croutines by reverting PR#590 (#685) * Add croutines to the code base * Add croutine changes to cmake, lexicon and readme * Add croutine file to portable cmake file * Add back more references from PR 591 * Remove __NVIC_PRIO_BITS and configPRIO_BITS check in port (#683) * Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8. * Add hardware not implemented bits check. These bits should be zero. --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Use UBaseType_t as interrupt mask (#689) * Use UBaseType_t as interrupt mask * Update GCC posix port to use UBaseType_t as interrupt mask * Fix clang warning in croutine and stream buffer (#686) * Fix document warning in croutine * Fix cast-qual warning in stream buffer * Use portTASK_FUNCTION_PROTO to replace portNORETURN (#688) * Use portTASK_FUNCTION_PROTO to replace portNORETURN * Fix typo in check comment of configMAX_SYSCALL_INTERRUPT_PRIORITY (#690) * Add constant type for portMAX_DELAY in port (#691) Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update static stream buffer size check (#693) * Use volatile size instead of sizeof directly to prevent always true/false warning * Fix typos in comments for the AT91SAM7S port (#695) Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com> * Fix #697: Missing portPOINTER_SIZE_TYPE definition for ATmega port (#698) * Remove empty expression statement compiler warning (#692) * Add do while( 0 ) loop for empty expression statement compiler warning * Update uxTaskGetSystemState for tasks in pending ready list (#702) * Update uxTaskGetSystemState to sync with eTaskGetState * Update in vTaskGetInfo for tasks in pending ready list should be in ready state. * Fix circular dependency in CMake project (#700) * Fix circular dependency in cmake project Fix for https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/687 In order for custom ports to also break the cycle, they must link against freertos_kernel_include instead of freertos_kernel. * Simplify include path * Memory Protection Unit (MPU) Enhancements (#705) Memory Protection Unit (MPU) Enhancements This commit introduces a new MPU wrapper that places additional restrictions on unprivileged tasks. The following is the list of changes introduced with the new MPU wrapper: 1. Opaque and indirectly verifiable integers for kernel object handles: All the kernel object handles (for example, queue handles) are now opaque integers. Previously object handles were raw pointers. 2. Saving the task context in Task Control Block (TCB): When a task is swapped out by the scheduler, the task's context is now saved in its TCB. Previously the task's context was saved on its stack. 3. Execute system calls on a separate privileged only stack: FreeRTOS system calls, which execute with elevated privilege, now use a separate privileged only stack. Previously system calls used the calling task's stack. The application writer can control the size of the system call stack using new configSYSTEM_CALL_STACK_SIZE config macro. 4. Memory bounds checks: FreeRTOS system calls which accept a pointer and de-reference it, now verify that the calling task has required permissions to access the memory location referenced by the pointer. 5. System call restrictions: The following system calls are no longer available to unprivileged tasks: - vQueueDelete - xQueueCreateMutex - xQueueCreateMutexStatic - xQueueCreateCountingSemaphore - xQueueCreateCountingSemaphoreStatic - xQueueGenericCreate - xQueueGenericCreateStatic - xQueueCreateSet - xQueueRemoveFromSet - xQueueGenericReset - xTaskCreate - xTaskCreateStatic - vTaskDelete - vTaskPrioritySet - vTaskSuspendAll - xTaskResumeAll - xTaskGetHandle - xTaskCallApplicationTaskHook - vTaskList - vTaskGetRunTimeStats - xTaskCatchUpTicks - xEventGroupCreate - xEventGroupCreateStatic - vEventGroupDelete - xStreamBufferGenericCreate - xStreamBufferGenericCreateStatic - vStreamBufferDelete - xStreamBufferReset Also, an unprivileged task can no longer use vTaskSuspend to suspend any task other than itself. We thank the following people for their inputs in these enhancements: - David Reiss of Meta Platforms, Inc. - Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling of School of Computer Science and Engineering, Southeast University, China. - Xinwen Fu of Department of Computer Science, University of Massachusetts Lowell, USA. - Yuequi Chen, Zicheng Wang, Minghao Lin of University of Colorado Boulder, USA. * Update History for Version 10.6.0 (#706) Signed-off-by: kar-rahul-aws <karahulx@amazon.com> * Fixed compile options polluting project (#694) * Fixed compile options polluting project Moved add_library higher * Apply suggestions from code review Co-authored-by: Paul Bartell <paul.bartell@gmail.com> * fixed cmakelists keeping in mind the suggestions --------- Co-authored-by: Paul Bartell <paul.bartell@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> * Fix the comments in the CM3 and CM4 MPU Ports about the MPU Region numbers being loaded (#707) Co-authored-by: Soren Ptak <skptak@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update xSemaphoreGetStaticBuffer prototype in comment (#704) Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Correct the misspelled name (#708) Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Cervenka Dusan <cervenka@acrios.com> Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com> Signed-off-by: kar-rahul-aws <karahulx@amazon.com> Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com> Co-authored-by: tcpluess <tpluess@ieee.org> Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Chris Copeland <chris@chrisnc.net> Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com> Co-authored-by: Dusan Cervenka <cervenka@acrios.com> Co-authored-by: bbain <16752579+bbain@users.noreply.github.com> Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com> Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Co-authored-by: phelter <paulheltera@gmail.com> Co-authored-by: jacky309 <jacques.guillou@gmail.com> Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Keith Packard <keithp@keithp.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Joseph Julicher <jjulicher@mac.com> Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com> Co-authored-by: Holden <holden-zenithaerotech.com> Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch> Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com> Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com> Co-authored-by: Darian Leung <darian@espressif.com> Co-authored-by: Tony Josi <tonyjosi@amazon.com> Co-authored-by: Evgeny Ermakov <22344340+unspecd@users.noreply.github.com> Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com> Co-authored-by: Joris Putcuyps <joris.putcuyps@gmail.com> Co-authored-by: Patrick Cook <114708437+cookpate@users.noreply.github.com> Co-authored-by: Mr. Jake <norbertzpilicy@gmail.com> Co-authored-by: Paul Bartell <paul.bartell@gmail.com> Co-authored-by: Soren Ptak <Skptak@outlook.com> Co-authored-by: Soren Ptak <skptak@amazon.com> * Merge main to SMP branch 0721 (#90) * Fix array-bounds compiler warning on gcc11+ in list.h (#580) listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to being a MiniListItem_t, can be shorter than a ListItem_t. Thus, `( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the `List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext` through a `MiniListItem_t` instead. * move the prototype for vApplicationIdleHook to task.h. (#600) Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update equal priority task preemption (#603) * vTaskResume and vTaskPrioritySet don't preempt equal priority task * Update vTaskResumeAll not to preempt task with equal priority * Fix in xTaskResumeFromISR * Update FreeRTOS/FreeRTOS build checks (#613) This is needed to be compatible with the refactoring done in this PR - https://github.com/FreeRTOS/FreeRTOS/pull/889 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611) Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the only requirement for these functions to work. * Fix some CMake documentation typos (#616) The quick start instructions for CMake mention the "master" git branch which has been replaced by "main" in the current repo. The main CMakeLists.txt documents how to integrate a custom port. Fix a typo in the suggested CMake code. * Added support of 64bit events. (#597) * Added support of 64bit even Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Added missing brackets Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Made proper name for tick macro. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Improved macro evaluation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fixed missed port files + documentation Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Changes made on PR Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Fix macro definition. Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Formatted code with uncrustify Signed-off-by: Cervenka Dusan <cervenka@acrios.com> --------- Signed-off-by: Cervenka Dusan <cervenka@acrios.com> * Introduce portMEMORY_BARRIER for Microblaze port. (#621) The introduction of `portMEMORY_BARRIER` will ensure the places in the kernel use a barrier will work. For example, `xTaskResumeAll` has a memory barrier to ensure its correctness when compiled with optimization enabled. Without the barrier `xTaskResumeAll` can fail (e.g. start reading and writing to address 0 and/or infinite looping) when `xPendingReadyList` contains more than one task to restore. In `xTaskResumeAll` the compiler chooses to cache the `pxTCB` the first time through the loop for use in every subsequent loop. This is incorrect as the removal of `pxTCB->xEventListItem` will actually change the value of `pxTCB` if it was read again at the top of the loop. The barrier forces the compiler to read `pxTCB` again at the top of the loop. The compiler is operating correctly. The removal `pxTCB->xEventListItem` executes on a `List_t *` and `ListItem_t *`. This means that the compiler can assume that any `MiniListItem_t` values are unchanged by the loop (i.e. "strict-aliasing"). This allows the compiler to cache `pxTCB` as it is obtained via a `MiniListItem_t`. This is incorrect in this case because it is possible for a `ListItem_t *` to actually alias a `MiniListItem_t`. This is technically a "violation of aliasing rules" so we use the the barrier to disable the strict-aliasing optimization in this loop. * Do not call exit() on MSVC Port when calling vPortEndScheduler (#624) * make port exitable * correctly set xPortRunning to False * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * add suggestions from Review Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update PR template to include checkbox for Unit Test related changes (#627) * Fix build failure introduced in PR #597 (#629) The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS which can be defined to one of the following: * TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide. * TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide. * TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide. Earlier we supported 16 and 32 bit width for tick type which was controlled using the config option configUSE_16_BIT_TICKS. The PR tried to maintain backward compatibility by honoring configUSE_16_BIT_TICKS. The backward compatibility did not work as expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used before it was defined. This PR addresses it by ensuring that the macro configTICK_TYPE_WIDTH_IN_BITS is defined before it is used. Testing 1. configUSE_16_BIT_TICKS is defined to 0. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 2. configUSE_16_BIT_TICKS is defined to 1. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>) 10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134 10e8: b2a4 uxth r4, r4 10ea: 3401 adds r4, #1 10ec: b2a4 uxth r4, r4 10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 16 bit. 4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS. Source (function xTaskIncrementTick in tasks.c): ``` const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; ``` Assembly: ``` 109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>) 10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134 10a4: 3401 adds r4, #1 10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134 ``` It is clear from assembly that the tick type is 32 bit. 5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS. ``` #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. ``` The testing was done for GCC/ARM_CM3 port which does not support 64 bit tick type. 6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Missing definition: One of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` 7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined. ``` #error Only one of configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. ``` Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Feature/fixing clang gnu compiler warnings (#620) * Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558) * Using single name definition for libraries everywhere. (#558) * Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571) * Removing compiler warnings for GNU and Clang. (#571) * Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms. * Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY. * Fixing clang and gnu compiler warnings. * Adding in project information and how to compile for GNU/clang * Fixing compiler issue with unused variable - no need to declare variable. * Adding in compile warnings for linux builds that kernel is okay with using. * Fixing more extra-semi-stmt clang warnings. * Moving definition of hooks into header files if features are enabled. * Fixing formatting with uncrustify. * Fixing merge conflicts with main merge. * Fixing compiler errors due to merge issues and formatting. * Fixing Line feeds. * Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request * Further clean-up of clang and clang-tidy issues. * Removing compiler specific pragmas from common c files. * Fixing missing lexicon entry and uncrustify formatting changes. * Resolving merge issue multiple defnitions of proto for prvIdleTask * Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control. * More uncrustify formatting issues. * Fixing extra bracket in #if statement. --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * POSIX port fixes (#626) * Fix types in POSIX port Use TaskFunction_t and StackType_t as other ports do. * Fix portTICK_RATE_MICROSECONDS in POSIX port --------- Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Cortex-M35P: Add Cortex-M35P port (#631) * Cortex-M35P: Add Cortex-M35P port The Cortex-M35P support added to kernel. The port hasn't been validated yet with TF-M. Hence TF-M support is not included in this port. Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Add portNORETURN to the newly added portmacro.h Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Introduced Github Status Badge for Unit Tests (#634) * Introduced Github Status Badge for Unit Tests * Github status badge to point to latest run * Github status badge UT points to latest results * Fixed URL for Github Status badge --------- Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> * Remove C99 requirement from CMake file (#633) * Remove C99 requirement from CMake file The kernel source is C89 compliant and does not need C99. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Explicitly set C89 requirement for kernel Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions (#343) * Pass top of stack to configINIT_TLS_BLOCK Picolibc wants to allocate the per-task TLS block within the stack segment, so it will need to modify the top of stack value. Pass the pxTopOfStack variable to make this explicit. Signed-off-by: Keith Packard <keithpac@amazon.com> * Move newlib-specific definitions to separate file This reduces the clutter in FreeRTOS.h caused by having newlib-specific macros present there. Signed-off-by: Keith Packard <keithpac@amazon.com> * Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT Remove reference to configUSE_NEWLIB_REENTRANT as that only works when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always set when configUSE_NEWLIB_REENTRANT is set, so using both was redundant in that case. Signed-off-by: Keith Packard <keithpac@amazon.com> * portable-ARC: Adapt ARC support to use generalized TLS support With generalized thread local storage (TLS) support present in the core, the two ARC ports need to have the changes to the TCB mirrored to them. Signed-off-by: Keith Packard <keithpac@amazon.com> * Add Thread Local Storage (TLS) support using Picolibc functions This patch provides definitions of the general TLS support macros in terms of the Picolibc TLS support functions. Picolibc is normally configured to use TLS internally for all variables that are intended to be task-local, so these changes are necessary for picolibc to work correctly with FreeRTOS. The picolibc helper functions rely on elements within the linker script to arrange the TLS data in memory and define some symbols. Applications wanting to use this mechanism will need changes in their linker script when migrating to picolibc. Signed-off-by: Keith Packard <keithpac@amazon.com> --------- Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Interrupt priority assert improvements for CM3/4/7 (#602) * Interrupt priority assert improvements for CM3/4/7 In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that `configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the number of priority bits implemented by the hardware. Change these ports to also use the lowest priority for PendSV and SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`. * Remove not needed configKERNEL_INTERRUPT_PRIORITY define Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Introduced code coverage status badge (#635) * Introduced code coverage status badge * Trying to fix the URL checker issue * Fix URL check Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636) * added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port * Added SIZE_MAX definition to PIC24/dsPIC33 * Fix TLS and stack alignment when using picolibc (#637) Both the TLS block and stack must be correctly aligned when using picolibc. The architecture stack alignment is represented by the portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the Picolibc _tls_align() inline function for Picolibc version 1.8 and above. For older versions of Picolibc, we'll assume that the TLS block requires the same alignment as the stack. For downward growing stacks, this requires aligning the start of the TLS block to the maximum of the stack alignment and the TLS alignment. With this, both the TLS block and stack will now be correctly aligned. For upward growing stacks, the two areas must be aligned independently; the TLS block is aligned from the start of the stack, then the tls space is allocated, and then the stack is aligned above that. It's probably useful to know here that the linker ensures that variables within the TLS block are assigned offsets that match their alignment requirements. If the TLS block itself is correctly aligned, then everything within will also be. I have only tested the downward growing stack branch of this patch. Signed-off-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Enable building the GCC Cortex-R5 port without an FPU (#586) * Ensure configUSE_TASK_FPU_SUPPORT option is set correctly If one does enable the FPU of the Cortex-R5 processor, then the GCC compiler will define the macro __ARM_FP. This can be used to ensure, that the configUSE_TASK_FPU_SUPPORT is set accordingly. * Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1 * Remove error case in pxPortInitialiseStack The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled * Enable access to FPU registers only if FPU is enabled * Make minor formating changes * Format ARM Cortex-R5 port * Address review comments from @ChristosZosi * Minor code review suggestions Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix freertos_kernel cmake property, Posix Port (#640) * Fix freertos_kernel cmake property, Posix Port * Moves the `set_property()` call below the target definition in top level CMakeLists file * Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t * Add blank line to CMakeLists.txt * Add missing FreeRTOS+ defines * Run kernel demos and unit tests for PR changes (#645) * Run kernel demos and unit tests for PR changes Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these checks currently use main branch of FreeRTOS-Kernel. This commits updates these checks to use the changes in the PR. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Do not specify PR SHA explicitly as that is default Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Remove explicit PR SHA from kernel checks Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add functions to get the buffers of statically created objects (#641) Added various ...GetStaticBuffer() functions to get the buffers of statically created objects. --------- Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> * Cortex-M Assert when NVIC implements 8 PRIO bits (#639) * Cortex-M Assert when NVIC implements 8 PRIO bits * Fix CM3 ports * Fix ARM_CM3_MPU * Fix ARM CM3 * Fix ARM_CM4_MPU * Fix ARM_CM4 * Fix GCC ARM_CM7 * Fix IAR ARM ports * Uncrustify changes * Fix MikroC_ARM_CM4F port * Fix MikroC_ARM_CM4F port-(2) * Fix RVDS ARM ports * Revert changes for Tasking/ARM_CM4F port * Revert changes for Tasking/ARM_CM4F port-(2) * Update port.c Fix GCC/ARM_CM4F port * Update port.c * update GCC\ARM_CM4F port * update port.c * Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority * Fix merge error: remove duplicate code * Fix typos --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> * Remove C90 requirement from CMakeLists (#649) This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984 We will re-evaluate and accordingly add this later. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Only add alignment padding when needed (#650) Heap 4 and Heap 5 add some padding to ensure that the allocated blocks are always aligned to portBYTE_ALIGNMENT bytes. The code until now was adding padding always even if the resulting block was already aligned. This commits updates the code to only add padding if the resulting block is not aligned. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * add a missing comma (#651) * fix conversion warning (#658) FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion] Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> * ARMv7M: Adjust implemented priority bit assertions (#665) Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS configPRIO_BITS configuration macros such that these macros specify the minimum number of implemented priority bits supported by a config build rather than the exact number of implemented priority bits. Related to Qemu issue #1122 * Format portmacro.h in arm CM0 ports * portable/ARM_CM0: Add xPortIsInsideInterrupt Add missing xPortIsInsideInterrupt function to Cortex-M0 port. * tree-wide: Unify formatting of __cplusplus ifdefs * Paranthesize expression-like macro (#668) * Updated tasks.c checks for scheduler suspension (#670) This commit updates the checks for the variable uxSchedulerSuspended in tasks.c module to use a uniform format. Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com> * Fix cast alignment warning (#669) * Fix cast alignment warning Without this change, the code produces the following warning when compiled with `-Wcast-align` flag: ``` cast increases required alignment of target type ``` Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Align StackSize and StackAddress for macOS (#674) * Armv8-M (except Cortex-M23) interrupt priority checking (#673) * Armv8-M: Formatting changes Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Armv8-M: Add support for interrupt priority check FreeRTOS provides `FromISR` system calls which can be called directly from interrupt service routines. It is crucial that the priority of these ISRs is set to same or lower value (numerically higher) than that of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. Add a check to trigger an assert when an ISR with priority higher (numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls `FromISR` system calls if `configASSERT` macro is defined. In addition, add a config option `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt priority check while running on QEMU. Based on the discussion https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt priority bits in QEMU do not match the real hardware. Therefore the assert that checks the number of implemented bits and __NVIC_PRIO_BITS will always fail. The config option `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the `FreeRTOSConfig.h` for QEMU targets. Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Use SHPR2 for calculating interrupt priority bits This removes the dependency on the secure software to mark the interrupt as non-secure. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Use the extended movx instruction instead of mov (#676) The following is from the MSP430X instruction set - ``` MOVX.W Move source word to destination word. The source operand is copied to the destination. The source operand is not affected. Both operands may be located in the full address space. ``` The movx instruction allows both the operands to be located in the full address space and therefore, works with large data model as well. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix eTaskGetState for pending ready tasks (#679) This commit fixes eTaskGetState so that eReady is returned for pending ready tasks. Co-authored-by: Darian Leung <darian@espressif.com> * Generates SBOM after source files are updated with release tag (#680) * update source file with release version info before SBOM generation * delete tag branch during cleanup * Add back croutines by reverting PR#590 (#685) * Add croutines to the code base * Add croutine changes to cmake, lexicon and readme * Add croutine file to portable cmake file * Add back more references from PR 591 * Remove __NVIC_PRIO_BITS and configPRIO_BITS check in port (#683) * Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8. * Add hardware not implemented bits check. These bits should be zero. --------- Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Use UBaseType_t as interrupt mask (#689) * Use UBaseType_t as interrupt mask * Update GCC posix port to use UBaseType_t as interrupt mask * Fix clang warning in croutine and stream buffer (#686) * Fix document warning in croutine * Fix cast-qual warning in stream buffer * Use portTASK_FUNCTION_PROTO to replace portNORETURN (#688) * Use portTASK_FUNCTION_PROTO to replace portNORETURN * Fix typo in check comment of configMAX_SYSCALL_INTERRUPT_PRIORITY (#690) * Add constant type for portMAX_DELAY in port (#691) Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update static stream buffer size check (#693) * Use volatile size instead of sizeof directly to prevent always true/false warning * Fix typos in comments for the AT91SAM7S port (#695) Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com> * Fix #697: Missing portPOINTER_SIZE_TYPE definition for ATmega port (#698) * Remove empty expression statement compiler warning (#692) * Add do while( 0 ) loop for empty expression statement compiler warning * Update uxTaskGetSystemState for tasks in pending ready list (#702) * Update uxTaskGetSystemState to sync with eTaskGetState * Update in vTaskGetInfo for tasks in pending ready list should be in ready state. * Fix circular dependency in CMake project (#700) * Fix circular dependency in cmake project Fix for https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/687 In order for custom ports to also break the cycle, they must link against freertos_kernel_include instead of freertos_kernel. * Simplify include path * Memory Protection Unit (MPU) Enhancements (#705) Memory Protection Unit (MPU) Enhancements This commit introduces a new MPU wrapper that places additional restrictions on unprivileged tasks. The following is the list of changes introduced with the new MPU wrapper: 1. Opaque and indirectly verifiable integers for kernel object handles: All the kernel object handles (for example, queue handles) are now opaque integers. Previously object handles were raw pointers. 2. Saving the task context in Task Control Block (TCB): When a task is swapped out by the scheduler, the task's context is now saved in its TCB. Previously the task's context was saved on its stack. 3. Execute system calls on a separate privileged only stack: FreeRTOS system calls, which execute with elevated privilege, now use a separate privileged only stack. Previously system calls used the calling task's stack. The application writer can control the size of the system call stack using new configSYSTEM_CALL_STACK_SIZE config macro. 4. Memory bounds checks: FreeRTOS system calls which accept a pointer and de-reference it, now verify that the calling task has required permissions to access the memory location referenced by the pointer. 5. System call restrictions: The following system calls are no longer available to unprivileged tasks: - vQueueDelete - xQueueCreateMutex - xQueueCreateMutexStatic - xQueueCreateCountingSemaphore - xQueueCreateCountingSemaphoreStatic - xQueueGenericCreate - xQueueGenericCreateStatic - xQueueCreateSet - xQueueRemoveFromSet - xQueueGenericReset - xTaskCreate - xTaskCreateStatic - vTaskDelete - vTaskPrioritySet - vTaskSuspendAll - xTaskResumeAll - xTaskGetHandle - xTaskCallApplicationTaskHook - vTaskList - vTaskGetRunTimeStats - xTaskCatchUpTicks - xEventGroupCreate - xEventGroupCreateStatic - vEventGroupDelete - xStreamBufferGenericCreate - xStreamBufferGenericCreateStatic - vStreamBufferDelete - xStreamBufferReset Also, an unprivileged task can no longer use vTaskSuspend to suspend any task other than itself. We thank the following people for their inputs in these enhancements: - David Reiss of Meta Platforms, Inc. - Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling of School of Computer Science and Engineering, Southeast University, China. - Xinwen Fu of Department of Computer Science, University of Massachusetts Lowell, USA. - Yuequi Chen, Zicheng Wang, Minghao Lin of University of Colorado Boulder, USA. * Update History for Version 10.6.0 (#706) Signed-off-by: kar-rahul-aws <karahulx@amazon.com> * Fixed compile options polluting project (#694) * Fixed compile options polluting project Moved add_library higher * Apply suggestions from code review Co-authored-by: Paul Bartell <paul.bartell@gmail.com> * fixed cmakelists keeping in mind the suggestions --------- Co-authored-by: Paul Bartell <paul.bartell@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> * Fix the comments in the CM3 and CM4 MPU Ports about the MPU Region numbers being loaded (#707) Co-authored-by: Soren Ptak <skptak@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Update xSemaphoreGetStaticBuffer prototype in comment (#704) Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> * Correct the misspelled name (#708) Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Cervenka Dusan <cervenka@acrios.com> Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com> Signed-off-by: kar-rahul-aws <karahulx@amazon.com> Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com> Co-authored-by: tcpluess <tpluess@ieee.org> Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Chris Copeland <chris@chrisnc.net> Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com> Co-authored-by: Dusan Cervenka <cervenka@acrios.com> Co-authored-by: bbain <16752579+bbain@users.noreply.github.com> Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com> Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Co-authored-by: phelter <paulheltera@gmail.com> Co-authored-by: jacky309 <jacques.guillou@gmail.com> Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Keith Packard <keithp@keithp.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Joseph Julicher <jjulicher@mac.com> Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com> Co-authored-by: Holden <holden-zenithaerotech.com> Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch> Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com> Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com> Co-authored-by: Darian Leung <darian@espressif.com> Co-authored-by: Tony Josi <tonyjosi@amazon.com> Co-authored-by: Evgeny Ermakov <22344340+unspecd@users.noreply.github.com> Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com> Co-authored-by: Joris Putcuyps <joris.putcuyps@gmail.com> Co-authored-by: Patrick Cook <114708437+cookpate@users.noreply.github.com> Co-authored-by: Mr. Jake <norbertzpilicy@gmail.com> Co-authored-by: Paul Bartell <paul.bartell@gmail.com> Co-authored-by: Soren Ptak <Skptak@outlook.com> Co-authored-by: Soren Ptak <skptak@amazon.com> * Move default configNUMBER_OF_CORES definition forward in FreeRTOSConfig.h (#88) * Move default configNUMBER_OF_CORES definition forward in FreeRTOSConfig.h. --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com> Signed-off-by: Gabor Toth <gabor.toth@arm.com> Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com> Signed-off-by: Cervenka Dusan <cervenka@acrios.com> Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com> Signed-off-by: kar-rahul-aws <karahulx@amazon.com> Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: AndreiCherniaev <dungeonlords789@yandex.ru> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Tanmoy Sen <33438891+tanmoysen@users.noreply.github.com> Co-authored-by: Ravishankar Bhagavandas <bhagavar@amazon.com> Co-authored-by: eddie9712 <qw1562435@gmail.com> Co-authored-by: Graham Sanderson <graham.sanderson@raspberrypi.com> Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com> Co-authored-by: Xinyu Zhang <68640626+xinyu-tfm@users.noreply.github.com> Co-authored-by: Paul Bartell <pbartell@amazon.com> Co-authored-by: Joseph Julicher <jjulicher@mac.com> Co-authored-by: NomiChirps <70026509+NomiChirps@users.noreply.github.com> Co-authored-by: 0xjakob <18257824+0xjakob@users.noreply.github.com> Co-authored-by: Jakob Hasse <0xjakob@users.noreply.github.com> Co-authored-by: Xin Lin <47510956+xlin7799@users.noreply.github.com> Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com> Co-authored-by: Gavin Lambert <uecasm@users.noreply.github.com> Co-authored-by: Chris Copeland <chris@chrisnc.net> Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com> Co-authored-by: Paul Bartell <paul.bartell@gmail.com> Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com> Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com> Co-authored-by: Octaviarius <gomanchuk.as@gmail.com> Co-authored-by: Jakub Lužný <jakub@luzny.cz> Co-authored-by: newbrain <17814222+newbrain@users.noreply.github.com> Co-authored-by: Gabor Toth <gabor.toth@arm.com> Co-authored-by: Ming Yue <mingyue86010@gmail.com> Co-authored-by: David Chalco <david@chalco.io> Co-authored-by: Cristian Cristea <cristiancristea00@gmail.com> Co-authored-by: Jeff Tenney <jeff.tenney@gmail.com> Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com> Co-authored-by: abhidixi11 <44424462+abhidixi11@users.noreply.github.com> Co-authored-by: Laukik Hase <laukik.hase@espressif.com> Co-authored-by: arshi016 <arshilife16@gmail.com> Co-authored-by: Niklas Gürtler <Erlkoenig90@users.noreply.github.com> Co-authored-by: Niklas Gürtler <niklas.guertler@tacterion.com> Co-authored-by: Hardy Griech <ntbox@gmx.net> Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com> Co-authored-by: tcpluess <tpluess@ieee.org> Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch> Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com> Co-authored-by: Dusan Cervenka <cervenka@acrios.com> Co-authored-by: bbain <16752579+bbain@users.noreply.github.com> Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com> Co-authored-by: phelter <paulheltera@gmail.com> Co-authored-by: jacky309 <jacques.guillou@gmail.com> Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com> Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com> Co-authored-by: Keith Packard <keithp@keithp.com> Co-authored-by: Keith Packard <keithpac@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com> Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal> Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch> Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com> Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com> Co-authored-by: Darian Leung <darian@espressif.com> Co-authored-by: Tony Josi <tonyjosi@amazon.com> Co-authored-by: Evgeny Ermakov <22344340+unspecd@users.noreply.github.com> Co-authored-by: Joris Putcuyps <joris.putcuyps@gmail.com> Co-authored-by: Patrick Cook <114708437+cookpate@users.noreply.github.com> Co-authored-by: Mr. Jake <norbertzpilicy@gmail.com> Co-authored-by: Soren Ptak <Skptak@outlook.com> Co-authored-by: Soren Ptak <skptak@amazon.com>
chinglee-iot
2 years ago
committed by
GitHub
parent
83da5fc958
commit
ae3a498e43
@ -0,0 +1,72 @@
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||||
# MISRA Compliance
|
||||
|
||||
FreeRTOS-Kernel conforms to [MISRA C:2012](https://www.misra.org.uk/misra-c)
|
||||
guidelines, with the deviations listed below. Compliance is checked with
|
||||
Coverity static analysis. Since the FreeRTOS kernel is designed for
|
||||
small-embedded devices, it needs to have a very small memory footprint and
|
||||
has to be efficient. To achieve that and to increase the performance, it
|
||||
deviates from some MISRA rules. The specific deviations, suppressed inline,
|
||||
are listed below.
|
||||
|
||||
Additionally, [MISRA configuration](#misra-configuration) contains project
|
||||
wide deviations.
|
||||
|
||||
### Suppressed with Coverity Comments
|
||||
To find the violation references in the source files run grep on the source code
|
||||
with ( Assuming rule 8.4 violation; with justification in point 1 ):
|
||||
```
|
||||
grep 'MISRA Ref 8.4.1' . -rI
|
||||
```
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||||
|
||||
#### Rule 8.4
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||||
|
||||
_Ref 8.4.1_
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||||
|
||||
- MISRA C:2012 Rule 8.4: A compatible declaration shall be visible when an
|
||||
object or function with external linkage is defined.
|
||||
This rule requires that a compatible declaration is made available
|
||||
in a header file when an object with external linkage is defined.
|
||||
pxCurrentTCB(s) is defined with external linkage but it is only
|
||||
referenced from the assembly code in the port files. Therefore, adding
|
||||
a declaration in header file is not useful as the assembly code will
|
||||
still need to declare it separately.
|
||||
|
||||
### MISRA configuration
|
||||
|
||||
Copy below content to `misra.conf` to run Coverity on FreeRTOS-Kernel.
|
||||
|
||||
```
|
||||
// MISRA C-2012 Rules
|
||||
{
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||||
version : "2.0",
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||||
standard : "c2012",
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||||
title: "Coverity MISRA Configuration",
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||||
deviations : [
|
||||
// Disable the following rules.
|
||||
{
|
||||
deviation: "Directive 4.8",
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||||
reason: "HeapRegion_t and HeapStats_t are used only in heap files but declared in portable.h which is included in multiple source files. As a result, these definitions appear in multiple source files where they are not used."
|
||||
},
|
||||
{
|
||||
deviation: "Directive 4.9",
|
||||
reason: "FreeRTOS-Kernel is optimised to work on small micro-controllers. To achieve that, function-like macros are used."
|
||||
},
|
||||
{
|
||||
deviation: "Rule 1.2",
|
||||
reason: "The __attribute__ tags are used via macros which are defined in port files."
|
||||
},
|
||||
{
|
||||
deviation: "Rule 3.1",
|
||||
reason: "We post HTTP links in code comments which contain // inside comments blocks."
|
||||
},
|
||||
{
|
||||
deviation: "Rule 8.7",
|
||||
reason: "API functions are not used by the library outside of the files they are defined; however, they must be externally visible in order to be used by an application."
|
||||
},
|
||||
{
|
||||
deviation: "Rule 11.5",
|
||||
reason: "Allow casts from `void *`. List owner, pvOwner, is stored as `void *` and are cast to various types for use in functions."
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||||
}
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||||
]
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||||
}
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||||
```
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||||
@ -0,0 +1,254 @@
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||||
// Copyright (c) 2019, XMOS Ltd, All rights reserved
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||||
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||||
/* Scheduler includes. */
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||||
#include "FreeRTOS.h"
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||||
#include "task.h"
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||||
#include <string.h>
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||||
#include <xs1.h>
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||||
#include <xcore/hwtimer.h>
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||||
#include <xcore/triggerable.h>
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||||
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||||
static hwtimer_t xKernelTimer;
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||||
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||||
uint32_t ulPortYieldRequired[ portMAX_CORE_COUNT ] = { pdFALSE };
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||||
|
||||
/*-----------------------------------------------------------*/
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||||
|
||||
void vIntercoreInterruptISR( void )
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||||
{
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||||
int xCoreID;
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||||
|
||||
// debug_printf( "In KCALL: %u\n", ulData );
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||||
xCoreID = rtos_core_id_get();
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||||
ulPortYieldRequired[ xCoreID ] = pdTRUE;
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||||
}
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||||
/*-----------------------------------------------------------*/
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||||
|
||||
DEFINE_RTOS_INTERRUPT_CALLBACK( pxKernelTimerISR, pvData )
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||||
{
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||||
uint32_t ulLastTrigger;
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||||
uint32_t ulNow;
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||||
int xCoreID;
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||||
UBaseType_t uxSavedInterruptStatus;
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||||
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||||
xCoreID = 0;
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||||
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||||
configASSERT( xCoreID == rtos_core_id_get() );
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||||
|
||||
/* Need the next interrupt to be scheduled relative to
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||||
* the current trigger time, rather than the current
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||||
* time. */
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||||
ulLastTrigger = hwtimer_get_trigger_time( xKernelTimer );
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||||
|
||||
/* Check to see if the ISR is late. If it is, we don't
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||||
* want to schedule the next interrupt to be in the past. */
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||||
ulNow = hwtimer_get_time( xKernelTimer );
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||||
if( ulNow - ulLastTrigger >= configCPU_CLOCK_HZ / configTICK_RATE_HZ )
|
||||
{
|
||||
ulLastTrigger = ulNow;
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||||
}
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||||
|
||||
ulLastTrigger += configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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||||
hwtimer_change_trigger_time( xKernelTimer, ulLastTrigger );
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||||
|
||||
#if configUPDATE_RTOS_TIME_FROM_TICK_ISR == 1
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||||
rtos_time_increment( RTOS_TICK_PERIOD( configTICK_RATE_HZ ) );
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||||
#endif
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||||
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||||
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
ulPortYieldRequired[ xCoreID ] = pdTRUE;
|
||||
}
|
||||
taskEXIT_CRITICAL_FROM_ISR( uxSavedInterruptStatus );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
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||||
|
||||
void vPortYieldOtherCore( int xOtherCoreID )
|
||||
{
|
||||
int xCoreID;
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||||
|
||||
/*
|
||||
* This function must be called from within a critical section.
|
||||
*/
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||||
|
||||
xCoreID = rtos_core_id_get();
|
||||
|
||||
// debug_printf("%d->%d\n", xCoreID, xOtherCoreID);
|
||||
|
||||
// debug_printf("Yield core %d from %d\n", xOtherCoreID, xCoreID );
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||||
|
||||
rtos_irq( xOtherCoreID, xCoreID );
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||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static int prvCoreInit( void )
|
||||
{
|
||||
int xCoreID;
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||||
|
||||
xCoreID = rtos_core_register();
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||||
debug_printf( "Logical Core %d initializing as FreeRTOS Core %d\n", get_logical_core_id(), xCoreID );
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||||
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||||
asm volatile (
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||||
"ldap r11, kexcept\n\t"
|
||||
"set kep, r11\n\t"
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||||
:
|
||||
:
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||||
: "r11"
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||||
);
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||||
|
||||
rtos_irq_enable( configNUMBER_OF_CORES );
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||||
|
||||
/*
|
||||
* All threads wait here until all have enabled IRQs
|
||||
*/
|
||||
while( rtos_irq_ready() == pdFALSE );
|
||||
|
||||
if( xCoreID == 0 )
|
||||
{
|
||||
uint32_t ulNow;
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||||
ulNow = hwtimer_get_time( xKernelTimer );
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||||
// debug_printf( "The time is now (%u)\n", ulNow );
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||||
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||||
ulNow += configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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||||
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||||
triggerable_setup_interrupt_callback( xKernelTimer, NULL, RTOS_INTERRUPT_CALLBACK( pxKernelTimerISR ) );
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||||
hwtimer_set_trigger_time( xKernelTimer, ulNow );
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||||
triggerable_enable_trigger( xKernelTimer );
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||||
}
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||||
|
||||
return xCoreID;
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||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
DEFINE_RTOS_KERNEL_ENTRY( void, vPortStartSchedulerOnCore, void )
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||||
{
|
||||
int xCoreID;
|
||||
|
||||
xCoreID = prvCoreInit();
|
||||
|
||||
#if( configUSE_CORE_INIT_HOOK == 1 )
|
||||
{
|
||||
extern void vApplicationCoreInitHook( BaseType_t xCoreID );
|
||||
|
||||
vApplicationCoreInitHook( xCoreID );
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||||
}
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||||
#endif
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||||
|
||||
debug_printf( "FreeRTOS Core %d initialized\n", xCoreID );
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||||
|
||||
/*
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||||
* Restore the context of the first thread
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||||
* to run and jump into it.
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||||
*/
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||||
asm volatile (
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||||
"mov r6, %0\n\t" /* R6 must be the FreeRTOS core ID*/
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||||
"ldaw r5, dp[pxCurrentTCBs]\n\t" /* R5 must be the TCB list which is indexed by R6 */
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||||
"bu _freertos_restore_ctx\n\t"
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||||
: /* no outputs */
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||||
: "r"(xCoreID)
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||||
: "r5", "r6"
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||||
);
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||||
}
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||||
/*-----------------------------------------------------------*/
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||||
|
||||
/*-----------------------------------------------------------*/
|
||||
/* Public functions required by all ports below: */
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||||
/*-----------------------------------------------------------*/
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||||
|
||||
/*
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||||
* See header file for description.
|
||||
*/
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||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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||||
{
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||||
//debug_printf( "Top of stack was %p for task %p\n", pxTopOfStack, pxCode );
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||||
/*
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||||
* Grow the thread's stack by portTHREAD_CONTEXT_STACK_GROWTH
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||||
* so we can push the context onto it.
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||||
*/
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||||
pxTopOfStack -= portTHREAD_CONTEXT_STACK_GROWTH;
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||||
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||||
uint32_t dp;
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||||
uint32_t cp;
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||||
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||||
/*
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||||
* We need to get the current CP and DP pointers.
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||||
*/
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||||
asm volatile (
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||||
"ldaw r11, cp[0]\n\t" /* get CP into R11 */
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||||
"mov %0, r11\n\t" /* get R11 (CP) into cp */
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||||
"ldaw r11, dp[0]\n\t" /* get DP into R11 */
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||||
"mov %1, r11\n\t" /* get R11 (DP) into dp */
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||||
: "=r"(cp), "=r"(dp) /* output 0 is cp, output 1 is dp */
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||||
: /* there are no inputs */
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||||
: "r11" /* R11 gets clobbered */
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||||
);
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||||
|
||||
/*
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||||
* Push the thread context onto the stack.
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||||
* Saved PC will point to the new thread's
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||||
* entry pointer.
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||||
* Interrupts will default to enabled.
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||||
* KEDI is also set to enable dual issue mode
|
||||
* upon kernel entry.
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||||
*/
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||||
pxTopOfStack[ 1 ] = ( StackType_t ) pxCode; /* SP[1] := SPC */
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||||
pxTopOfStack[ 2 ] = XS1_SR_IEBLE_MASK
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||||
| XS1_SR_KEDI_MASK; /* SP[2] := SSR */
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||||
pxTopOfStack[ 3 ] = 0x00000000; /* SP[3] := SED */
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||||
pxTopOfStack[ 4 ] = 0x00000000; /* SP[4] := ET */
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||||
pxTopOfStack[ 5 ] = dp; /* SP[5] := DP */
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||||
pxTopOfStack[ 6 ] = cp; /* SP[6] := CP */
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||||
pxTopOfStack[ 7 ] = 0x00000000; /* SP[7] := LR */
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||||
pxTopOfStack[ 8 ] = ( StackType_t ) pvParameters; /* SP[8] := R0 */
|
||||
pxTopOfStack[ 9 ] = 0x01010101; /* SP[9] := R1 */
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||||
pxTopOfStack[ 10 ] = 0x02020202; /* SP[10] := R2 */
|
||||
pxTopOfStack[ 11 ] = 0x03030303; /* SP[11] := R3 */
|
||||
pxTopOfStack[ 12 ] = 0x04040404; /* SP[12] := R4 */
|
||||
pxTopOfStack[ 13 ] = 0x05050505; /* SP[13] := R5 */
|
||||
pxTopOfStack[ 14 ] = 0x06060606; /* SP[14] := R6 */
|
||||
pxTopOfStack[ 15 ] = 0x07070707; /* SP[15] := R7 */
|
||||
pxTopOfStack[ 16 ] = 0x08080808; /* SP[16] := R8 */
|
||||
pxTopOfStack[ 17 ] = 0x09090909; /* SP[17] := R9 */
|
||||
pxTopOfStack[ 18 ] = 0x10101010; /* SP[18] := R10 */
|
||||
pxTopOfStack[ 19 ] = 0x11111111; /* SP[19] := R11 */
|
||||
pxTopOfStack[ 20 ] = 0x00000000; /* SP[20] := vH and vSR */
|
||||
memset(&pxTopOfStack[21], 0, 32); /* SP[21 - 28] := vR */
|
||||
memset(&pxTopOfStack[29], 1, 32); /* SP[29 - 36] := vD */
|
||||
memset(&pxTopOfStack[37], 2, 32); /* SP[37 - 44] := vC */
|
||||
|
||||
//debug_printf( "Top of stack is now %p for task %p\n", pxTopOfStack, pxCode );
|
||||
|
||||
/*
|
||||
* Returns the new top of the stack
|
||||
*/
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortStartSMPScheduler( void );
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
if( ( configNUMBER_OF_CORES > portMAX_CORE_COUNT ) || ( configNUMBER_OF_CORES <= 0 ) )
|
||||
{
|
||||
return pdFAIL;
|
||||
}
|
||||
|
||||
rtos_locks_initialize();
|
||||
xKernelTimer = hwtimer_alloc();
|
||||
|
||||
vPortStartSMPScheduler();
|
||||
|
||||
return pdPASS;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Do not implement. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
@ -0,0 +1,26 @@
|
||||
/*
|
||||
* port.xc
|
||||
*
|
||||
* Created on: Jul 31, 2019
|
||||
* Author: mbruno
|
||||
*/
|
||||
|
||||
//#include "rtos_support.h"
|
||||
|
||||
extern "C" {
|
||||
|
||||
#include "FreeRTOSConfig.h" /* to get configNUMBER_OF_CORES */
|
||||
#ifndef configNUMBER_OF_CORES
|
||||
#define configNUMBER_OF_CORES 1
|
||||
#endif
|
||||
|
||||
void __xcore_interrupt_permitted_ugs_vPortStartSchedulerOnCore(void);
|
||||
|
||||
} /* extern "C" */
|
||||
|
||||
void vPortStartSMPScheduler( void )
|
||||
{
|
||||
par (int i = 0; i < configNUMBER_OF_CORES; i++) {
|
||||
__xcore_interrupt_permitted_ugs_vPortStartSchedulerOnCore();
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,189 @@
|
||||
// Copyright (c) 2020, XMOS Ltd, All rights reserved
|
||||
|
||||
#include "rtos_support_rtos_config.h"
|
||||
|
||||
/* The FreeRTOS interrupt code calls vTaskSwitchContext.
|
||||
Therfore it must be added to the rtos_isr group with the
|
||||
rest of the ISR callback functions. */
|
||||
.weak _fptrgroup.rtos_isr.nstackwords.group
|
||||
.add_to_set _fptrgroup.rtos_isr.nstackwords.group, vTaskSwitchContext.nstackwords, vTaskSwitchContext
|
||||
|
||||
.globl kexcept
|
||||
.align 128 /* align the kernel section to 128 bytes */
|
||||
.type kexcept,@function
|
||||
.issue_mode dual
|
||||
.cc_top kexcept.function, kexcept
|
||||
kexcept:
|
||||
ldc r11, 0x0008
|
||||
shl r11, r11, 16
|
||||
ldc r9, 0x0080
|
||||
or r11, r11, r9
|
||||
bau r11 //_TrapHandler is at 0x00080080. TODO: Is it always? Why can't I access the symbol _TrapHandler?
|
||||
|
||||
_yield:
|
||||
{set sp, r4 /* Restore the task's SP to save the rest of its context. */
|
||||
get r11, id} /* Get the logical core ID into r11. */
|
||||
ldaw r0, dp[rtos_core_map]
|
||||
ldw r0, r0[r11] /* Translate to the RTOS core ID into r0 */
|
||||
bu _yield_continue /* Skip the ulPortYieldRequired check and jump right to */
|
||||
/* the context save and switch. Also skips saving SPC */
|
||||
/* since the kcall handler has already saved it. */
|
||||
|
||||
.align 64
|
||||
kcall:
|
||||
/* start saving the thread's context */
|
||||
extsp RTOS_SUPPORT_INTERRUPT_STACK_GROWTH
|
||||
stw r1, sp[9]
|
||||
stw r11, sp[19]
|
||||
|
||||
/* kcall sets SPC to the instruction of the kcall rather than the next instruction */
|
||||
/* so we need to adjust the SPC value that we save to the stack: */
|
||||
stw spc, sp[1] /* save the saved program counter onto the stack... */
|
||||
ldw r1, sp[1] /* so that we can load it into r1 (which we have already saved). */
|
||||
add r1, r1, 4 /* Add 4 to the spc to make it point to the instruction after the kcall. */
|
||||
{stw r1, sp[1] /* Now save it to the stack. */
|
||||
|
||||
/* kcall uses the same common function as interrupt callbacks. */
|
||||
/* tell it to call _yield above. */
|
||||
ldap r11, _yield}
|
||||
mov r1, r11
|
||||
|
||||
/* fall into rtos_interrupt_callback_common */
|
||||
|
||||
.globl rtos_interrupt_callback_common
|
||||
rtos_interrupt_callback_common:
|
||||
/* This is the body of the RTOS _xcore_c_interrupt_callback_XXX functions. */
|
||||
/* r1 = interrupt_callback_t function */
|
||||
|
||||
/* Save the thread's context onto the thread's stack. */
|
||||
/* The stack was extended for this by the wrapper function. */
|
||||
/* Begin only by saving some registers. The rest will be saved */
|
||||
/* later if vTaskSwitchContext() needs to be called. */
|
||||
/* DP and CP need to be saved because these are restored for the kernel ISR. */
|
||||
/* LR needs to be saved because it is clobbered when calling the callback. */
|
||||
/* r0-r3, and r11 need to be saved because the callback may clobber them. */
|
||||
/* r4 is saved because it is used here to hold the task SP. */
|
||||
|
||||
stw dp, sp[5]
|
||||
stw cp, sp[6]
|
||||
stw lr, sp[7]
|
||||
stw r0, sp[8]
|
||||
/*stw r1, sp[9] already saved by the wrapper function. */
|
||||
stw r2, sp[10]
|
||||
stw r3, sp[11]
|
||||
{stw r4, sp[12]
|
||||
/*stw r11, sp[19] already saved by the wrapper function. */
|
||||
|
||||
ldaw r4, sp[0]} /* Get value of current stackpointer into r4. */
|
||||
|
||||
{kentsp 0 /* switch to the kernel stack. */
|
||||
/* The value 0 is safe to use since we don't need the SP */
|
||||
/* that it saves to KSP[0]. We already have it in r4. */
|
||||
|
||||
get r11, ed} /* Get the event data... */
|
||||
ldw dp, sp[3] /* (Restore CP and DP required for the RTOS ISR */
|
||||
ldw cp, sp[4] /* in case the active thread has modified them.) */
|
||||
{mov r0, r11 /* ...into the first argument for the callback function, */
|
||||
bla r1} /* and call the callback function. */
|
||||
|
||||
{set sp, r4 /* Restore the task's SP now. */
|
||||
|
||||
get r11, id} /* Get the logical core ID into r11. */
|
||||
ldaw r0, dp[rtos_core_map]
|
||||
ldw r0, r0[r11] /* Translate to the RTOS core ID into r0. */
|
||||
ldaw r2, dp[ulPortYieldRequired] /* Get the yield required array into r2. */
|
||||
ldw r1, r2[r0] /* Is a yield required for this core? */
|
||||
{bf r1, _freertos_restore_ctx_partial /* If not, restore the context now. */
|
||||
ldc r1, 0}
|
||||
stw r1, r2[r0] /* Otherwise, clear the yield required flag. */
|
||||
|
||||
/* Save the rest of the current task's context. */
|
||||
|
||||
/* Save standard xs2 regs */
|
||||
stw spc, sp[1]
|
||||
_yield_continue:
|
||||
stw ssr, sp[2]
|
||||
stw sed, sp[3]
|
||||
stw et, sp[4]
|
||||
stw r5, sp[13]
|
||||
stw r6, sp[14]
|
||||
stw r7, sp[15]
|
||||
stw r8, sp[16]
|
||||
stw r9, sp[17]
|
||||
stw r10, sp[18]
|
||||
#if 1
|
||||
/* Save VPU status and headroom */
|
||||
vgetc r11
|
||||
{stw r11, sp[20]
|
||||
/* Save VPU regs */
|
||||
ldaw r11, sp[21]}
|
||||
{vstr r11[0]
|
||||
ldaw r11, sp[29]}
|
||||
{vstd r11[0]
|
||||
ldaw r11, sp[37]}
|
||||
vstc r11[0]
|
||||
#endif
|
||||
ldaw r5, dp[pxCurrentTCBs] /* Get the current TCB array into r5. */
|
||||
ldw r1, r5[r0] /* Get this core's current TCB pointer into r1. */
|
||||
stw r4, r1[0x0] /* Save the current task's SP to the first */
|
||||
/* word (top of stack) in the current TCB. */
|
||||
|
||||
{kentsp 0 /* switch back to the kernel stack. */
|
||||
|
||||
mov r6, r0} /* copy the RTOS core ID into r6 so we don't lose it. */
|
||||
ldap r11, vTaskSwitchContext
|
||||
bla r11 /* Finally call vTaskSwitchContext(core_id) now that the task's */
|
||||
/* entire context is saved. Note the core id in r0 is the argument. */
|
||||
|
||||
//krestsp 0 /* unnecessary since KSP is already set and the SP */
|
||||
/* is being restored next from the current TCB. */
|
||||
|
||||
.globl _freertos_restore_ctx
|
||||
_freertos_restore_ctx:
|
||||
|
||||
ldw r0, r5[r6] /* get this core's current TCB pointer into r0 */
|
||||
ldw r0, r0[0x0] /* Get the top of the stack from the current TCB... */
|
||||
set sp, r0 /* into the stack pointer register. */
|
||||
|
||||
/* Restore the current task's context */
|
||||
#if 1
|
||||
/* Restore VPU regs */
|
||||
ldaw r11, sp[37]
|
||||
{vldc r11[0]
|
||||
ldaw r11, sp[29]}
|
||||
{vldd r11[0]
|
||||
ldaw r11, sp[21]}
|
||||
vldr r11[0]
|
||||
/* Restore VPU status and headroom */
|
||||
ldw r11, sp[20]
|
||||
vsetc r11
|
||||
#endif
|
||||
/* Restore standard xs2 regs */
|
||||
ldw spc, sp[1]
|
||||
ldw ssr, sp[2]
|
||||
ldw sed, sp[3]
|
||||
ldw et, sp[4]
|
||||
ldw r5, sp[13]
|
||||
ldw r6, sp[14]
|
||||
ldw r7, sp[15]
|
||||
ldw r8, sp[16]
|
||||
ldw r9, sp[17]
|
||||
ldw r10, sp[18]
|
||||
_freertos_restore_ctx_partial:
|
||||
ldw dp, sp[5]
|
||||
ldw cp, sp[6]
|
||||
ldw lr, sp[7]
|
||||
ldw r0, sp[8]
|
||||
ldw r1, sp[9]
|
||||
ldw r2, sp[10]
|
||||
ldw r3, sp[11]
|
||||
ldw r4, sp[12]
|
||||
{ldw r11, sp[19]
|
||||
|
||||
/* shrink the stack by the size of the context just restored */
|
||||
ldaw sp, sp[RTOS_SUPPORT_INTERRUPT_STACK_GROWTH]}
|
||||
|
||||
kret /* exit kernel mode and return to the thread */
|
||||
|
||||
.cc_bottom kexcept.function
|
||||
|
||||
@ -0,0 +1,215 @@
|
||||
// Copyright (c) 2020, XMOS Ltd, All rights reserved
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
/* Inclusion of xc1.h will result in clock being defined as a type.
|
||||
* By default, FreeRTOS will require standard time.h, where clock is a function.
|
||||
*/
|
||||
#ifndef USE_XCORE_CLOCK_TYPE
|
||||
#define _clock_defined
|
||||
#endif
|
||||
|
||||
#include <xs1.h>
|
||||
#include "rtos_support.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Type definitions. */
|
||||
#define portSTACK_TYPE uint32_t
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef double portDOUBLE;
|
||||
typedef int32_t BaseType_t;
|
||||
typedef uint32_t UBaseType_t;
|
||||
|
||||
#define portBASE_TYPE BaseType_t
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#endif /* __ASSEMBLER__ */
|
||||
|
||||
/* Architecture specifics. These can be used by assembly files as well. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portCRITICAL_NESTING_IN_TCB 1
|
||||
#define portMAX_CORE_COUNT 8
|
||||
#ifndef configNUMBER_OF_CORES
|
||||
#define configNUMBER_OF_CORES 1
|
||||
#endif
|
||||
|
||||
/* This may be set to zero in the config file if the rtos_time
|
||||
functions are not needed or if it is incremented elsewhere. */
|
||||
#ifndef configUPDATE_RTOS_TIME_FROM_TICK_ISR
|
||||
#define configUPDATE_RTOS_TIME_FROM_TICK_ISR 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* When entering an ISR we need to grow the stack by one more word than
|
||||
* we actually need to save the thread context. This is because there are
|
||||
* some functions, written in assembly *cough* memcpy() *cough*, that think
|
||||
* it is OK to store words at SP[0]. Therefore the ISR must leave SP[0] alone
|
||||
* even though it is normally not necessary to do so.
|
||||
*/
|
||||
#define portTHREAD_CONTEXT_STACK_GROWTH RTOS_SUPPORT_INTERRUPT_STACK_GROWTH
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
/* Check validity of number of cores specified in config */
|
||||
#if ( configNUMBER_OF_CORES < 1 || portMAX_CORE_COUNT < configNUMBER_OF_CORES )
|
||||
#error "Invalid number of cores specified in config!"
|
||||
#endif
|
||||
|
||||
#define portMEMORY_BARRIER() RTOS_MEMORY_BARRIER()
|
||||
#define portTASK_STACK_DEPTH(pxTaskCode) RTOS_THREAD_STACK_SIZE(pxTaskCode)
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Scheduler utilities. */
|
||||
#define portYIELD() asm volatile( "KCALLI_lu6 0" ::: "memory" )
|
||||
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do \
|
||||
{ \
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
extern uint32_t ulPortYieldRequired[ portMAX_CORE_COUNT ]; \
|
||||
ulPortYieldRequired[ portGET_CORE_ID() ] = pdTRUE; \
|
||||
} \
|
||||
} while( 0 )
|
||||
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* SMP utilities. */
|
||||
#define portGET_CORE_ID() rtos_core_id_get()
|
||||
|
||||
void vPortYieldOtherCore( int xOtherCoreID );
|
||||
#define portYIELD_CORE( x ) vPortYieldOtherCore( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#endif
|
||||
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section management. */
|
||||
|
||||
#define portGET_INTERRUPT_STATE() rtos_interrupt_mask_get()
|
||||
|
||||
/*
|
||||
* This differs from the standard portDISABLE_INTERRUPTS()
|
||||
* in that it also returns what the interrupt state was
|
||||
* before it disabling interrupts.
|
||||
*/
|
||||
#define portDISABLE_INTERRUPTS() rtos_interrupt_mask_all()
|
||||
|
||||
#define portENABLE_INTERRUPTS() rtos_interrupt_unmask_all()
|
||||
|
||||
/*
|
||||
* Port set interrupt mask and clear interrupt mask.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK() rtos_interrupt_mask_all()
|
||||
#define portCLEAR_INTERRUPT_MASK( ulState ) rtos_interrupt_mask_set( ulState )
|
||||
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ( 0 )
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) ( (void) x )
|
||||
|
||||
/*
|
||||
* Will enable interrupts if ulState is non-zero.
|
||||
*/
|
||||
#define portRESTORE_INTERRUPTS(ulState) rtos_interrupt_mask_set(ulState)
|
||||
|
||||
/*
|
||||
* Returns non-zero if currently running in an
|
||||
* ISR or otherwise in kernel mode.
|
||||
*/
|
||||
#define portCHECK_IF_IN_ISR() rtos_isr_running()
|
||||
|
||||
#define portASSERT_IF_IN_ISR() configASSERT( portCHECK_IF_IN_ISR() == 0 )
|
||||
|
||||
#define portGET_ISR_LOCK() rtos_lock_acquire(0)
|
||||
#define portRELEASE_ISR_LOCK() rtos_lock_release(0)
|
||||
#define portGET_TASK_LOCK() rtos_lock_acquire(1)
|
||||
#define portRELEASE_TASK_LOCK() rtos_lock_release(1)
|
||||
|
||||
void vTaskEnterCritical(void);
|
||||
void vTaskExitCritical(void);
|
||||
#define portENTER_CRITICAL() vTaskEnterCritical()
|
||||
#define portEXIT_CRITICAL() vTaskExitCritical()
|
||||
|
||||
extern UBaseType_t vTaskEnterCriticalFromISR( void );
|
||||
extern void vTaskExitCriticalFromISR( UBaseType_t uxSavedInterruptStatus );
|
||||
#define portENTER_CRITICAL_FROM_ISR vTaskEnterCriticalFromISR
|
||||
#define portEXIT_CRITICAL_FROM_ISR vTaskExitCriticalFromISR
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Runtime stats support */
|
||||
#if ( configGENERATE_RUN_TIME_STATS == 1 )
|
||||
int xscope_gettime( void );
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() /* nothing needed here */
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() xscope_gettime()
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Maps sprintf and snprintf to the lite version in lib_rtos_support */
|
||||
#if ( configUSE_DEBUG_SPRINTF == 1 )
|
||||
#define sprintf(...) rtos_sprintf(__VA_ARGS__)
|
||||
#define snprintf(...) rtos_snprintf(__VA_ARGS__)
|
||||
#endif
|
||||
|
||||
/* Attribute for the pxCallbackFunction member of the Timer_t struct.
|
||||
Required by xcc to calculate stack usage. */
|
||||
#define portTIMER_CALLBACK_ATTRIBUTE __attribute__((fptrgroup("timerCallbackGroup")))
|
||||
|
||||
/* Timer callback function macros. For xcc this ensures they get added to the timer callback
|
||||
group so that stack usage for certain functions in timers.c can be calculated. */
|
||||
#define portTIMER_CALLBACK_FUNCTION_PROTO( vFunction, xTimer ) void vFunction( TimerHandle_t xTimer )
|
||||
#define portTIMER_CALLBACK_FUNCTION( vFunction, xTimer ) portTIMER_CALLBACK_ATTRIBUTE void vFunction( TimerHandle_t xTimer )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not necessary for to use this port. They are defined so the common demo files
|
||||
(which build with all the ports) will build. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLER__ */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
@ -0,0 +1,95 @@
|
||||
// Copyright (c) 2020, XMOS Ltd, All rights reserved
|
||||
|
||||
#ifndef RTOS_SUPPORT_RTOS_CONFIG_H_
|
||||
#define RTOS_SUPPORT_RTOS_CONFIG_H_
|
||||
|
||||
/**
|
||||
* Lets the application know that the RTOS in use is FreeRTOS.
|
||||
*/
|
||||
#define RTOS_FREERTOS 1
|
||||
|
||||
/**
|
||||
* The number of words to extend the stack by when entering an ISR.
|
||||
*
|
||||
* When entering an ISR we need to grow the stack by one more word than
|
||||
* we actually need to save the thread context. This is because there are
|
||||
* some functions, written in assembly *cough* memcpy() *cough*, that think
|
||||
* it is OK to store words at SP[0]. Therefore the ISR must leave SP[0] alone
|
||||
* even though it is normally not necessary to do so.
|
||||
*/
|
||||
#define RTOS_SUPPORT_INTERRUPT_STACK_GROWTH ( 44 + 1 )
|
||||
|
||||
/**
|
||||
* The word offset into the stack where R1 is to be stored after it
|
||||
* is extended when saving a thread's context.
|
||||
*/
|
||||
#define RTOS_SUPPORT_INTERRUPT_R1_STACK_OFFSET 9
|
||||
|
||||
/**
|
||||
* The word offset into the stack where R11 is to be stored after it
|
||||
* is extended when saving a thread's context.
|
||||
*/
|
||||
#define RTOS_SUPPORT_INTERRUPT_R11_STACK_OFFSET 19
|
||||
|
||||
/**
|
||||
* The RTOS provided handler that should run when a
|
||||
* core receives an intercore interrupt request.
|
||||
*/
|
||||
#define RTOS_INTERCORE_INTERRUPT_ISR() do { \
|
||||
void vIntercoreInterruptISR( void ); \
|
||||
vIntercoreInterruptISR(); \
|
||||
} while ( 0 )
|
||||
|
||||
/**
|
||||
* The number of hardware locks that the RTOS
|
||||
* requires. For a single core RTOS this could be
|
||||
* zero. Locks are recursive.
|
||||
*
|
||||
* Note that the IRQ routines require a lock and
|
||||
* will share the first one with the RTOS.
|
||||
*/
|
||||
#define RTOS_LOCK_COUNT 2
|
||||
|
||||
/**
|
||||
* Remaps all calls to debug_printf() to rtos_printf().
|
||||
* When this is on, files should not include both rtos_support.h
|
||||
* and debug_print.h.
|
||||
*/
|
||||
#define RTOS_DEBUG_PRINTF_REMAP 1
|
||||
|
||||
|
||||
#ifdef configENABLE_DEBUG_PRINTF
|
||||
#if configENABLE_DEBUG_PRINTF
|
||||
|
||||
/* ensure that debug_printf is enabled */
|
||||
#ifdef DEBUG_PRINT_ENABLE
|
||||
#undef DEBUG_PRINT_ENABLE
|
||||
#endif
|
||||
#define DEBUG_PRINT_ENABLE 1
|
||||
|
||||
#ifndef configTASKS_DEBUG
|
||||
#define configTASKS_DEBUG 0
|
||||
#endif
|
||||
#if configTASKS_DEBUG == 1
|
||||
#define DEBUG_PRINT_ENABLE_FREERTOS_TASKS 1
|
||||
#else
|
||||
#define DEBUG_PRINT_DISABLE_FREERTOS_TASKS 1
|
||||
#endif
|
||||
|
||||
#else /* configENABLE_DEBUG_PRINTF */
|
||||
|
||||
/* ensure that debug_printf is disabled */
|
||||
#ifdef DEBUG_UNIT
|
||||
#undef DEBUG_UNIT
|
||||
#endif
|
||||
#ifdef DEBUG_PRINT_ENABLE
|
||||
#undef DEBUG_PRINT_ENABLE
|
||||
#endif
|
||||
|
||||
#define DEBUG_PRINT_ENABLE 0
|
||||
|
||||
#endif /* configENABLE_DEBUG_PRINTF */
|
||||
#endif
|
||||
|
||||
#endif /* RTOS_SUPPORT_RTOS_CONFIG_H_ */
|
||||
|
||||
Loading…
Reference in New Issue