Update the Win32/MingW demo to match the latest Win32/MSVC demo.
Richard Barry
11 years ago
parent
d12ec14160
commit
660162a5b8
@ -1,474 +0,0 @@
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/*******************************************************************************
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* Tracealyzer v2.4.1 Recorder Library
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* Percepio AB, www.percepio.com
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*
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* trcHardwarePort.h
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*
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* Contains together with trcHardwarePort.c all hardware portability issues of
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* the trace recorder library.
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*
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* Terms of Use
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* This software is copyright Percepio AB. The recorder library is free for
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* use together with Percepio products. You may distribute the recorder library
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* in its original form, including modifications in trcPort.c and trcPort.h
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* given that these modification are clearly marked as your own modifications
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* and documented in the initial comment section of these source files.
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* This software is the intellectual property of Percepio AB and may not be
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* sold or in other ways commercially redistributed without explicit written
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* permission by Percepio AB.
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*
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* Disclaimer
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* The trace tool and recorder library is being delivered to you AS IS and
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* Percepio AB makes no warranty as to its use or performance. Percepio AB does
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* not and cannot warrant the performance or results you may obtain by using the
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* software or documentation. Percepio AB make no warranties, express or
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* implied, as to noninfringement of third party rights, merchantability, or
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* fitness for any particular purpose. In no event will Percepio AB, its
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* technology partners, or distributors be liable to you for any consequential,
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* incidental or special damages, including any lost profits or lost savings,
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* even if a representative of Percepio AB has been advised of the possibility
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* of such damages, or for any claim by any third party. Some jurisdictions do
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* not allow the exclusion or limitation of incidental, consequential or special
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* damages, or the exclusion of implied warranties or limitations on how long an
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* implied warranty may last, so the above limitations may not apply to you.
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*
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* Copyright Percepio AB, 2013.
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* www.percepio.com
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******************************************************************************/
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#ifndef TRCPORT_H
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#define TRCPORT_H
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#include "trcKernelPort.h"
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/* If Win32 port */
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#ifdef WIN32
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#undef _WIN32_WINNT
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#define _WIN32_WINNT 0x0600
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/* Standard includes. */
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#include <stdio.h>
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#include <windows.h>
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#include <direct.h>
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/*******************************************************************************
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* The Win32 port by default saves the trace to file and then kills the
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* program when the recorder is stopped, to facilitate quick, simple tests
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* of the recorder.
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******************************************************************************/
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#define WIN32_PORT_SAVE_WHEN_STOPPED 1
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#define WIN32_PORT_EXIT_WHEN_STOPPED 1
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#endif
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#define DIRECTION_INCREMENTING 1
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#define DIRECTION_DECREMENTING 2
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/******************************************************************************
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* Supported ports
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*
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* PORT_HWIndependent
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* A hardware independent fallback option for event timestamping. Provides low
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* resolution timestamps based on the OS tick.
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* This may be used on the Win32 port, but may also be used on embedded hardware
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* platforms. All time durations will be truncated to the OS tick frequency,
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* typically 1 KHz. This means that a task or ISR that executes in less than
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* 1 ms get an execution time of zero.
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*
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* PORT_Win32
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* "Accurate" timestamping based on the Windows performance counter. Note that
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* this gives the host machine time.
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*
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* Officially supported hardware timer ports:
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* - PORT_Atmel_AT91SAM7
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* - PORT_Atmel_UC3A0
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* - PORT_ARM_CortexM
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* - PORT_Renesas_RX600
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* - PORT_Microchip_dsPIC_AND_PIC24
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*
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* We also provide several "unofficial" hardware-specific ports. There have
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* been developed by external contributors, and have not yet been verified
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* by Percepio AB. Let us know if you have problems getting these to work.
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*
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* Unofficial hardware specific ports provided are:
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* - PORT_TEXAS_INSTRUMENTS_TMS570
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* - PORT_TEXAS_INSTRUMENTS_MSP430
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* - PORT_MICROCHIP_PIC32
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* - PORT_XILINX_PPC405
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* - PORT_XILINX_PPC440
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* - PORT_XILINX_MICROBLAZE
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* - PORT_NXP_LPC210X
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*
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*****************************************************************************/
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#define PORT_NOT_SET -1
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/*** Officially supported hardware timer ports *******************************/
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#define PORT_HWIndependent 0
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#define PORT_Win32 1
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#define PORT_Atmel_AT91SAM7 2
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#define PORT_Atmel_UC3A0 3
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#define PORT_ARM_CortexM 4
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#define PORT_Renesas_RX600 5
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#define PORT_Microchip_dsPIC_AND_PIC24 6
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/*** Unofficial ports, provided by external developers, not yet verified *****/
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#define PORT_TEXAS_INSTRUMENTS_TMS570 7
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#define PORT_TEXAS_INSTRUMENTS_MSP430 8
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#define PORT_MICROCHIP_PIC32 9
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#define PORT_XILINX_PPC405 10
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#define PORT_XILINX_PPC440 11
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#define PORT_XILINX_MICROBLAZE 12
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#define PORT_NXP_LPC210X 13
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/*** Select your port here! **************************************************/
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#define SELECTED_PORT PORT_Win32
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/*****************************************************************************/
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#if (SELECTED_PORT == PORT_NOT_SET)
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#error "You need to define SELECTED_PORT here!"
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#endif
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/*******************************************************************************
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* IRQ_PRIORITY_ORDER
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*
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* Macro which should be defined as an integer of 0 or 1.
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*
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* This should be 0 if lower IRQ priority values implies higher priority
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* levels, such as on ARM Cortex M. If the opposite scheme is used, i.e.,
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* if higher IRQ priority values means higher priority, this should be 1.
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*
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* This setting is not critical. It is used only to sort and colorize the
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* interrupts in priority order, in case you record interrupts using
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* the vTraceStoreISRBegin and vTraceStoreISREnd routines.
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*
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* We provide this setting for some hardware architectures below:
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* - ARM Cortex M: 0 (lower IRQ priority values are more significant)
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* - Atmel AT91SAM7x: 1 (higher IRQ priority values are more significant)
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* - Atmel AVR32: 1 (higher IRQ priority values are more significant)
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* - Renesas RX600: 1 (higher IRQ priority values are more significant)
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* - Microchip PIC24: 0 (lower IRQ priority values are more significant)
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* - Microchip dsPIC: 0 (lower IRQ priority values are more significant)
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* - TI TMS570: 0 (lower IRQ priority values are more significant)
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* - Freescale HCS08: 0 (lower IRQ priority values are more significant)
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* - Freescale HCS12: 0 (lower IRQ priority values are more significant)
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* - PowerPC 405: 0 (lower IRQ priority values are more significant)
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* - PowerPC 440: 0 (lower IRQ priority values are more significant)
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* - Freescale ColdFire: 1 (higher IRQ priority values are more significant)
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* - NXP LPC210x: 0 (lower IRQ priority values are more significant)
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* - MicroBlaze: 0 (lower IRQ priority values are more significant)
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*
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* If your chip is not on the above list, and you perhaps know this detail by
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* heart, please inform us by e-mail to support@percepio.com.
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*
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******************************************************************************
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*
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* HWTC Macros
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*
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* These four HWTC macros provides a hardware isolation layer representing a
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* generic hardware timer/counter used for driving the operating system tick,
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* such as the SysTick feature of ARM Cortex M3/M4, or the PIT of the Atmel
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* AT91SAM7X.
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*
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* HWTC_COUNT: The current value of the counter. This is expected to be reset
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* a each tick interrupt. Thus, when the tick handler starts, the counter has
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* already wrapped.
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*
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* HWTC_COUNT_DIRECTION: Should be one of:
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* - DIRECTION_INCREMENTING - for hardware timer/counters of incrementing type
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* such as the PIT on Atmel AT91SAM7X.
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* When the counter value reach HWTC_PERIOD, it is reset to zero and the
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* interrupt is signaled.
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* - DIRECTION_DECREMENTING - for hardware timer/counters of decrementing type
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* such as the SysTick on ARM Cortex M3/M4 chips.
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* When the counter value reach 0, it is reset to HWTC_PERIOD and the
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* interrupt is signaled.
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*
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* HWTC_PERIOD: The number of increments or decrements of HWTC_COUNT between
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* two tick interrupts. This should preferably be mapped to the reload
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* register of the hardware timer, to make it more portable between chips in the
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* same family. The macro should in most cases be (reload register + 1).
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*
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* HWTC_DIVISOR: If the timer frequency is very high, like on the Cortex M chips
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* (where the SysTick runs at the core clock frequency), the "differential
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* timestamping" used in the recorder will more frequently insert extra XTS
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* events to store the timestamps, which increases the event buffer usage.
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* In such cases, to reduce the number of XTS events and thereby get longer
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* traces, you use HWTC_DIVISOR to scale down the timestamps and frequency.
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* Assuming a OS tick rate of 1 KHz, it is suggested to keep the effective timer
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* frequency below 65 MHz to avoid an excessive amount of XTS events. Thus, a
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* Cortex M chip running at 72 MHZ should use a HWTC_DIVISOR of 2, while a
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* faster chip require a higher HWTC_DIVISOR value.
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*
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* The HWTC macros and vTracePortGetTimeStamp is the main porting issue
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* or the trace recorder library. Typically you should not need to change
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* the code of vTracePortGetTimeStamp if using the HWTC macros.
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*
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******************************************************************************/
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#if (SELECTED_PORT == PORT_Win32)
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (ulGetRunTimeCounterValue())
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#define HWTC_PERIOD 0
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 1 // Please update according to your hardware...
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#elif (SELECTED_PORT == PORT_HWIndependent)
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT 0
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#define HWTC_PERIOD 1
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 1 // Please update according to your hardware...
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#elif (SELECTED_PORT == PORT_Atmel_AT91SAM7)
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/* HWTC_PERIOD is hardcoded for AT91SAM7X256-EK Board (48 MHz)
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A more generic solution is to get the period from pxPIT->PITC_PIMR */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (AT91C_BASE_PITC->PITC_PIIR & 0xFFFFF)
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#define HWTC_PERIOD 2995
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_Atmel_UC3A0)
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/* For Atmel AVR32 (AT32UC3A) */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT sysreg_read(AVR32_COUNT)
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#define HWTC_PERIOD ( TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ )
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_ARM_CortexM)
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/* For all chips using ARM Cortex M cores */
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#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
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#define HWTC_COUNT (*((uint32_t*)0xE000E018))
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#define HWTC_PERIOD ((*(uint32_t*)0xE000E014) + 1)
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#define HWTC_DIVISOR 2
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#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_Renesas_RX600)
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#include "iodefine.h"
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (CMT0.CMCNT)
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#define HWTC_PERIOD ((((TRACE_PERIPHERAL_CLOCK_HZ/TRACE_TICK_RATE_HZ)-1)/8))
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_Microchip_dsPIC_AND_PIC24)
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/* For Microchip PIC24 and dsPIC (16 bit) */
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/* Note: The trace library was originally designed for 32-bit MCUs, and is slower
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than intended on 16-bit MCUs. Storing an event on a PIC24 takes about 70 µs.
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In comparison, 32-bit MCUs are often 10-20 times faster. If recording overhead
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becomes a problem on PIC24, use the filters to exclude less interesting tasks
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or system calls. */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (TMR1)
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#define HWTC_PERIOD (PR1+1)
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_NXP_LPC210X)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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/* Tested with LPC2106, but should work with most LPC21XX chips. */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT *((uint32_t *)0xE0004008 )
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#define HWTC_PERIOD ( TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ )
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_TMS570)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define RTIFRC0 *((uint32_t *)0xFFFFFC10)
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#define RTICOMP0 *((uint32_t *)0xFFFFFC50)
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#define RTIUDCP0 *((uint32_t *)0xFFFFFC54)
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (RTIFRC0 - (RTICOMP0 - RTIUDCP0))
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#define HWTC_PERIOD (RTIUDCP0)
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_MSP430)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (TA0R)
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#define HWTC_PERIOD TRACE_CPU_CLOCKS_PER_TICK
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_MICROCHIP_PIC32)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (ReadTimer1()) /* Should be available in BSP */
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#define HWTC_PERIOD (ReadPeriod1()+1) /* Should be available in BSP */
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_XILINX_PPC405)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
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#define HWTC_COUNT mfspr( 0x3db)
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#define HWTC_PERIOD ( TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ )
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_XILINX_PPC440)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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/* This should work with most PowerPC chips */
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#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
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#define HWTC_COUNT mfspr( 0x016 )
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#define HWTC_PERIOD ( TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ )
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
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#elif (SELECTED_PORT == PORT_XILINX_MICROBLAZE)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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/* This should work with most Microblaze configurations.
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* It uses the AXI Timer 0 - the tick interrupt source.
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* If an AXI Timer 0 peripheral is available on your hardware platform, no modifications are required.
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*/
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#include "xtmrctr_l.h"
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#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
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#define HWTC_COUNT XTmrCtr_GetTimerCounterReg( XPAR_TMRCTR_0_BASEADDR, 0 )
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#define HWTC_PERIOD ( TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ )
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#define HWTC_DIVISOR 16
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#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
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#elif (SELECTED_PORT != PORT_NOT_SET)
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#error "SELECTED_PORT had unsupported value!"
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#define SELECTED_PORT PORT_NOT_SET
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#endif
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#if (SELECTED_PORT != PORT_NOT_SET)
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#ifndef HWTC_COUNT_DIRECTION
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#error "HWTC_COUNT_DIRECTION is not set!"
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#endif
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#ifndef HWTC_COUNT
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#error "HWTC_COUNT is not set!"
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#endif
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#ifndef HWTC_PERIOD
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#error "HWTC_PERIOD is not set!"
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#endif
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#ifndef HWTC_DIVISOR
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#error "HWTC_DIVISOR is not set!"
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#endif
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#ifndef IRQ_PRIORITY_ORDER
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#error "IRQ_PRIORITY_ORDER is not set!"
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#elif (IRQ_PRIORITY_ORDER != 0) && (IRQ_PRIORITY_ORDER != 1)
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#error "IRQ_PRIORITY_ORDER has bad value!"
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#endif
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#if (HWTC_DIVISOR < 1)
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#error "HWTC_DIVISOR must be a non-zero positive value!"
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#endif
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#endif
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/*******************************************************************************
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* vTraceConsoleMessage
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*
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* A wrapper for your system-specific console "printf" console output function.
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* This needs to be correctly defined to see status reports from the trace
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* status monitor task (this is defined in trcUser.c).
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******************************************************************************/
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#if (SELECTED_PORT == PORT_Atmel_AT91SAM7)
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/* Port specific includes */
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#include "console.h"
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#endif
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|
||||
#define vTraceConsoleMessage(x)
|
||||
|
||||
/*******************************************************************************
|
||||
* vTracePortGetTimeStamp
|
||||
*
|
||||
* Returns the current time based on the HWTC macros which provide a hardware
|
||||
* isolation layer towards the hardware timer/counter.
|
||||
*
|
||||
* The HWTC macros and vTracePortGetTimeStamp is the main porting issue
|
||||
* or the trace recorder library. Typically you should not need to change
|
||||
* the code of vTracePortGetTimeStamp if using the HWTC macros.
|
||||
*
|
||||
******************************************************************************/
|
||||
void vTracePortGetTimeStamp(uint32_t *puiTimestamp);
|
||||
|
||||
/*******************************************************************************
|
||||
* vTracePortEnd
|
||||
*
|
||||
* This function is called when the recorder is stopped due to full buffer.
|
||||
* Mainly intended to show a message in the console.
|
||||
* This is used by the Win32 port to store the trace to a file. The file path is
|
||||
* set using vTracePortSetFileName.
|
||||
******************************************************************************/
|
||||
void vTracePortEnd(void);
|
||||
|
||||
#if (INCLUDE_SAVE_TO_FILE == 1)
|
||||
|
||||
/*******************************************************************************
|
||||
* vTracePortSetOutFile
|
||||
*
|
||||
* Sets the filename/path used in vTracePortSave.
|
||||
* This is set in a separate function, since the Win32 port calls vTracePortSave
|
||||
* in vTracePortEnd if WIN32_PORT_SAVE_WHEN_STOPPED is set.
|
||||
******************************************************************************/
|
||||
void vTracePortSetOutFile(char* path);
|
||||
|
||||
/******************************************************************************
|
||||
* vTracePortSave
|
||||
*
|
||||
* Saves the trace to a file on a target-side file system. The path is set in a
|
||||
* separate function, vTracePortSetOutFile, since the Win32 port may call
|
||||
* vTracePortSave in vTracePortEnd, if using WIN32_PORT_SAVE_WHEN_STOPPED.
|
||||
******************************************************************************/
|
||||
void vTracePortSave(void);
|
||||
|
||||
#else
|
||||
|
||||
#define vTraceConsoleMessage(x)
|
||||
#define vTracePortSetOutFile(path)
|
||||
#define vTracePortSave(void)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue