Create RX630/Renesas project.

pull/4/head
Richard Barry 14 years ago
parent 317dc7ffd4
commit 56eb9ebec3

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/*
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/* Board specifics. */
#include "rskrx630def.h"
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ICLK_FREQUENCY ) /* Set in rskrx630def.h. */
#define configPERIPHERAL_CLOCK_HZ ( PCLKB_FREQUENCY ) /* Set in rskrx630def.h. */
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 140 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 45 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 12 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_CO_ROUTINES 0
#define configUSE_MUTEXES 1
#define configGENERATE_RUN_TIME_STATS 1
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_RECURSIVE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configUSE_MALLOC_FAILED_HOOK 1
#define configUSE_APPLICATION_TASK_TAG 0
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 7 )
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Software timer definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( 3 )
#define configTIMER_QUEUE_LENGTH 5
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
/* The interrupt priority used by the kernel itself for the tick interrupt and
the pended interrupt. This would normally be the lowest priority. */
#define configKERNEL_INTERRUPT_PRIORITY 1
/* The maximum interrupt priority from which FreeRTOS API calls can be made.
Interrupts that use a priority above this will not be effected by anything the
kernel is doing. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
/* The peripheral used to generate the tick interrupt is configured as part of
the application code. This constant should be set to the vector number of the
peripheral chosen. As supplied this is CMT0. */
#define configTICK_VECTOR _CMT0_CMI0
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_xTaskGetSchedulerState 1
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
extern volatile unsigned long ulHighFrequencyTickCount;
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() nop() /* Run time stats use the same timer as the high frequency timer test. */
#define portGET_RUN_TIME_COUNTER_VALUE() ulHighFrequencyTickCount
/* Override some of the priorities set in the common demo tasks. This is
required to ensure flase positive timing errors are not reported. */
#define bktPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 )
#define bktSECONDARY_PRIORITY ( configMAX_PRIORITIES - 4 )
#define intqHIGHER_PRIORITY ( configMAX_PRIORITIES - 3 )
/*-----------------------------------------------------------
* Ethernet configuration.
*-----------------------------------------------------------*/
/* MAC address configuration. */
#define configMAC_ADDR0 0x00
#define configMAC_ADDR1 0x12
#define configMAC_ADDR2 0x13
#define configMAC_ADDR3 0x10
#define configMAC_ADDR4 0x15
#define configMAC_ADDR5 0x11
/* IP address configuration. */
#define configIP_ADDR0 192
#define configIP_ADDR1 168
#define configIP_ADDR2 0
#define configIP_ADDR3 200
/* Netmask configuration. */
#define configNET_MASK0 255
#define configNET_MASK1 255
#define configNET_MASK2 255
#define configNET_MASK3 0
#endif /* FREERTOS_CONFIG_H */

@ -0,0 +1,170 @@
/*
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* High frequency timer test as described in main.c.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
/* Hardware specifics. */
#include "iodefine.h"
/* The set frequency of the interrupt. Deviations from this are measured as
the jitter. */
#define timerINTERRUPT_FREQUENCY ( 20000UL )
/* The expected time between each of the timer interrupts - if the jitter was
zero. */
#define timerEXPECTED_DIFFERENCE_VALUE ( ( unsigned short ) ( ( configPERIPHERAL_CLOCK_HZ / 8UL ) / timerINTERRUPT_FREQUENCY ) )
/* The highest available interrupt priority. */
#define timerHIGHEST_PRIORITY ( 15 )
/* Misc defines. */
#define timerTIMER_3_COUNT_VALUE ( *( ( unsigned short * ) 0x8801a ) ) /*( CMT3.CMCNT )*/
/*-----------------------------------------------------------*/
/* Interrupt handler in which the jitter is measured. */
static void prvTimer2IntHandler( void );
/* Stores the value of the maximum recorded jitter between interrupts. This is
displayed on one of the served web pages. */
volatile unsigned short usMaxJitter = 0;
/* Counts the number of high frequency interrupts - used to generate the run
time stats. */
volatile unsigned long ulHighFrequencyTickCount = 0UL;
/*-----------------------------------------------------------*/
void vSetupHighFrequencyTimer( void )
{
/* Timer CMT2 is used to generate the interrupts, and CMT3 is used
to measure the jitter. */
/* Enable compare match timer 2 and 3. */
MSTP( CMT2 ) = 0;
MSTP( CMT3 ) = 0;
/* Interrupt on compare match. */
CMT2.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT2.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / timerINTERRUPT_FREQUENCY ) -1 ) / 8 );
/* Divide the PCLK by 8. */
CMT2.CMCR.BIT.CKS = 0;
CMT3.CMCR.BIT.CKS = 0;
/* Enable the interrupt... */
_IEN( _CMT2_CMI2 ) = 1;
/* ...and set its priority to the maximum possible, this is above the priority
set by configMAX_SYSCALL_INTERRUPT_PRIORITY so will nest. */
_IPR( _CMT2_CMI2 ) = timerHIGHEST_PRIORITY;
/* Start the timers. */
CMT.CMSTR1.BIT.STR2 = 1;
CMT.CMSTR1.BIT.STR3 = 1;
}
/*-----------------------------------------------------------*/
#pragma interrupt ( prvTimer2IntHandler( vect = _VECT( _CMT2_CMI2 ), enable ) )
static void prvTimer2IntHandler( void )
{
volatile unsigned short usCurrentCount;
static unsigned short usMaxCount = 0;
static unsigned long ulErrorCount = 0UL;
/* We use the timer 1 counter value to measure the clock cycles between
the timer 0 interrupts. First stop the clock. */
CMT.CMSTR1.BIT.STR3 = 0;
nop();
nop();
usCurrentCount = timerTIMER_3_COUNT_VALUE;
/* Is this the largest count we have measured yet? */
if( usCurrentCount > usMaxCount )
{
if( usCurrentCount > timerEXPECTED_DIFFERENCE_VALUE )
{
usMaxJitter = usCurrentCount - timerEXPECTED_DIFFERENCE_VALUE;
}
else
{
/* This should not happen! */
ulErrorCount++;
}
usMaxCount = usCurrentCount;
}
/* Used to generate the run time stats. */
ulHighFrequencyTickCount++;
/* Clear the timer. */
timerTIMER_3_COUNT_VALUE = 0;
/* Then start the clock again. */
CMT.CMSTR1.BIT.STR3 = 1;
}

@ -0,0 +1,143 @@
/*
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* This file contains the non-portable and therefore RX62N specific parts of
* the IntQueue standard demo task - namely the configuration of the timers
* that generate the interrupts and the interrupt entry points.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo includes. */
#include "IntQueueTimer.h"
#include "IntQueue.h"
/* Hardware specifics. */
#include "iodefine.h"
#define tmrTIMER_0_1_FREQUENCY ( 2000UL )
#define tmrTIMER_2_3_FREQUENCY ( 2001UL )
void vInitialiseTimerForIntQueueTest( void )
{
/* Ensure interrupts do not start until full configuration is complete. */
portENTER_CRITICAL();
{
/* Cascade two 8bit timer channels to generate the interrupts.
8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
utilised for this test. */
/* Enable the timers. */
SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;
SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;
/* Enable compare match A interrupt request. */
TMR0.TCR.BIT.CMIEA = 1;
TMR2.TCR.BIT.CMIEA = 1;
/* Clear the timer on compare match A. */
TMR0.TCR.BIT.CCLR = 1;
TMR2.TCR.BIT.CCLR = 1;
/* Set the compare match value. */
TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
/* 16 bit operation ( count from timer 1,2 ). */
TMR0.TCCR.BIT.CSS = 3;
TMR2.TCCR.BIT.CSS = 3;
/* Use PCLK as the input. */
TMR1.TCCR.BIT.CSS = 1;
TMR3.TCCR.BIT.CSS = 1;
/* Divide PCLK by 8. */
TMR1.TCCR.BIT.CKS = 2;
TMR3.TCCR.BIT.CKS = 2;
/* Enable TMR 0, 2 interrupts. */
IEN( TMR0, CMIA0 ) = 1;
IEN( TMR2, CMIA2 ) = 1;
/* Set the timer interrupts to be above the kernel. The interrupts are
assigned different priorities so they nest with each other. */
IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
IPR( TMR2, CMIA2 ) = ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 );
}
portEXIT_CRITICAL();
/* Ensure the interrupts are clear as they are edge detected. */
IR( TMR0, CMIA0 ) = 0;
IR( TMR2, CMIA2 ) = 0;
}
/*-----------------------------------------------------------*/
#pragma interrupt ( vT0_1InterruptHandler( vect = VECT_TMR0_CMIA0, enable ) )
void vT0_1InterruptHandler( void )
{
portYIELD_FROM_ISR( xFirstTimerHandler() );
}
/*-----------------------------------------------------------*/
#pragma interrupt ( vT2_3InterruptHandler( vect = VECT_TMR2_CMIA2, enable ) )
void vT2_3InterruptHandler( void )
{
portYIELD_FROM_ISR( xSecondTimerHandler() );
}

@ -0,0 +1,183 @@
/*
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*-----------------------------------------------------------
* Simple IO routines to control the LEDs.
*-----------------------------------------------------------*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo includes. */
#include "partest.h"
/* Hardware specifics. */
#include "iodefine.h"
#define partestNUM_LEDS ( 4 )
long lParTestGetLEDState( unsigned long ulLED );
/*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
/* Port pin configuration is done by the low level set up prior to this
function being called. */
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned long ulLED, signed long xValue )
{
if( ulLED < partestNUM_LEDS )
{
if( xValue != 0 )
{
/* Turn the LED on. */
taskENTER_CRITICAL();
{
switch( ulLED )
{
case 0: LED0 = LED_ON;
break;
case 1: LED1 = LED_ON;
break;
case 2: LED2 = LED_ON;
break;
case 3: LED3 = LED_ON;
break;
}
}
taskEXIT_CRITICAL();
}
else
{
/* Turn the LED off. */
taskENTER_CRITICAL();
{
switch( ulLED )
{
case 0: LED0 = LED_OFF;
break;
case 1: LED1 = LED_OFF;
break;
case 2: LED2 = LED_OFF;
break;
case 3: LED3 = LED_OFF;
break;
}
}
taskEXIT_CRITICAL();
}
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned long ulLED )
{
if( ulLED < partestNUM_LEDS )
{
taskENTER_CRITICAL();
{
if( lParTestGetLEDState( ulLED ) != 0x00 )
{
vParTestSetLED( ulLED, 0 );
}
else
{
vParTestSetLED( ulLED, 1 );
}
}
taskEXIT_CRITICAL();
}
}
/*-----------------------------------------------------------*/
long lParTestGetLEDState( unsigned long ulLED )
{
long lReturn = pdTRUE;
if( ulLED < partestNUM_LEDS )
{
switch( ulLED )
{
case 0 : if( LED0 != 0 )
{
lReturn = pdFALSE;
}
break;
case 1 : if( LED1 != 0 )
{
lReturn = pdFALSE;
}
break;
case 2 : if( LED2 != 0 )
{
lReturn = pdFALSE;
}
break;
case 3 : if( LED3 != 0 )
{
lReturn = pdFALSE;
}
break;
}
}
return lReturn;
}
/*-----------------------------------------------------------*/

@ -0,0 +1,591 @@
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[OPTIONS_Debug_RX600_E1_E20_SYSTEM_Renesas RX C/C++ Library Generator]
"Single Shot" "05beda5b8738cc10" 1
[OPTIONS_Debug_RX600_E1_E20_SYSTEM_Renesas RX Configurator]
"Single Shot" "0bf59a677438cc10" 6
[OPTIONS_Debug_RX600_E1_E20_SYSTEM]
"" 0
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" 2
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[OPTIONS_Debug_with_optimisation_Renesas OptLinker]
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[OPTIONS_Debug_with_optimisation_Renesas RX Assembler]
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[OPTIONS_Debug_with_optimisation_Renesas RX C/C++ Library Generator]
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[OPTIONS_Debug_with_optimisation_Renesas RX Configurator]
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[OPTIONS_Debug_with_optimisation]
"" 0
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"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\ParTest.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\Renesas-Files\cgc.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\Renesas-Files\dbsct.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\Renesas-Files\hwsetup.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\Renesas-Files\intprg.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\Renesas-Files\lowsrc.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\Renesas-Files\resetprg.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\Renesas-Files\sbrk.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\Renesas-Files\vecttbl.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\main-blinky.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\main-full.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\list.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\MemMang\heap_2.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\Renesas\RX600\port.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\queue.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\tasks.c" "074935dc9738cc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\timers.c" "074935dc9738cc10" 2
[OPTIONS_SimDebug_RX600_Renesas RX C/C++ Library Generator]
"Single Shot" "0cd2772f9738cc10" 1
[OPTIONS_SimDebug_RX600_Renesas RX Configurator]
"Single Shot" "0bf59a677438cc10" 6
[OPTIONS_SimDebug_RX600]
"" 0
"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON4] [S|OUTPUTPATH|^"$(CONFIGDIR)^"] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 6
"[V|VERSION|1] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|LISTFILE|0] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 4
"[V|VERSION|1] [S|LANG|CPP] [B|SJIS|1] [S|INCLUDE|^"$(PROJDIR)\..\..\..\Source\portable\Renesas\RX600^"|^"$(PROJDIR)\..\..\..\Source\include^"|^"$(PROJDIR)^"|^"$(PROJDIR)\..\..\include^"|^"$(PROJDIR)\..\..\Common\include^"|^"$(PROJDIR)\.\include^"|^"$(PROJDIR)\Renesas-Files^"] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|DEBUG|1] [B|SIZE|1] [B|MAP|0] [I|INLINE|100] [I|LOOP|2] [S|MISRA2004_CHECK_RULE|ALL] [S|MISRA2004_RULE|1.1|3.4|4.1|5.2|5.3|5.4|5.5|5.6|5.7|6.1|6.2|6.3|6.4|6.5|7.1|8.1|8.2|8.3|8.5|8.6|8.7|8.8|8.11|8.12|9.2|9.3|10.1|10.2|10.3|10.4|10.5|10.6|11.1|11.2|11.3|11.4|11.5|12.1|12.2|12.3|12.4|12.5|12.6|12.7|12.8|12.9|12.10|12.11|12.12|12.13|13.1|13.2|13.3|13.4|13.7|14.1|14.2|14.3|14.4|14.5|14.6|14.7|14.8|14.9|14.10|15.1|15.2|15.3|15.4|15.5|16.1|16.2|16.3|16.4|16.5|16.6|16.8|16.9|17.3|17.4|17.5|17.6|18.1|18.2|18.4|19.1|20.2|20.4|20.5|20.7|20.8|20.9|20.10|20.11|20.12] [S|MISRA1998_CHECK_RULE|ALL] [S|MISRA1998_RULE|1|5|8|12|13|14|17|18|19|20|21|22|24|28|29|31|32|33|34|35|36|37|38|39|40|42|43|44|45|46|48|49|50|51|53|54|55|56|57|58|59|60|61|62|63|64|65|68|69|70|71|72|73|74|75|76|77|78|79|80|82|83|84|85|99|101|102|103|104|105|106|108|110|111|112|113|115|118|119|121|122|123|124|125|126|127] [S|MISRA_GROUP_FILE_PATH|^"$(PROJDIR)\$(PROJECTNAME).rde^"] [S|CPU|RX600] [S|BASE|00000000=NONE] [I|PID|16]
" 3
"[V|VERSION|1] [S|LANG|C] [B|SJIS|1] [S|INCLUDE|^"$(PROJDIR)\..\..\..\Source\portable\Renesas\RX600^"|^"$(PROJDIR)\..\..\..\Source\include^"|^"$(PROJDIR)^"|^"$(PROJDIR)\..\..\include^"|^"$(PROJDIR)\..\..\Common\include^"|^"$(PROJDIR)\.\include^"|^"$(PROJDIR)\Renesas-Files^"] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|DEBUG|1] [B|SIZE|1] [B|MAP|0] [I|INLINE|100] [I|LOOP|2] [S|MISRA2004_CHECK_RULE|ALL] [S|MISRA2004_RULE|1.1|3.4|4.1|5.2|5.3|5.4|5.5|5.6|5.7|6.1|6.2|6.3|6.4|6.5|7.1|8.1|8.2|8.3|8.5|8.6|8.7|8.8|8.11|8.12|9.2|9.3|10.1|10.2|10.3|10.4|10.5|10.6|11.1|11.2|11.3|11.4|11.5|12.1|12.2|12.3|12.4|12.5|12.6|12.7|12.8|12.9|12.10|12.11|12.12|12.13|13.1|13.2|13.3|13.4|13.7|14.1|14.2|14.3|14.4|14.5|14.6|14.7|14.8|14.9|14.10|15.1|15.2|15.3|15.4|15.5|16.1|16.2|16.3|16.4|16.5|16.6|16.8|16.9|17.3|17.4|17.5|17.6|18.1|18.2|18.4|19.1|20.2|20.4|20.5|20.7|20.8|20.9|20.10|20.11|20.12] [S|MISRA1998_CHECK_RULE|ALL] [S|MISRA1998_RULE|1|5|8|12|13|14|17|18|19|20|21|22|24|28|29|31|32|33|34|35|36|37|38|39|40|42|43|44|45|46|48|49|50|51|53|54|55|56|57|58|59|60|61|62|63|64|65|68|69|70|71|72|73|74|75|76|77|78|79|80|82|83|84|85|99|101|102|103|104|105|106|108|110|111|112|113|115|118|119|121|122|123|124|125|126|127] [S|MISRA_GROUP_FILE_PATH|^"$(PROJDIR)\$(PROJECTNAME).rde^"] [S|CPU|RX600] [S|BASE|00000000=NONE] [I|PID|16]
" 2
"[V|VERSION|1] [S|MODE|BUILD/CHANGED] [S|EXISTOUTPUTPATH|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] [B|RUNTIME|1] [B|MATH|1] [B|STDIO|1] [B|STDLIB|1] [B|STRING|1] [B|NEW|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] [B|SIZE|1] [I|INLINE|100] [I|LOOP|2] [S|CPU|RX600] [S|BASE|00000000=NONE] [I|PID|16]
" 1
"[V|VERSION|6] [S|FORM|STYPE] [S|BYTE_COUNT_VALUE|FF] [B|DEBUG|1] [S|ROM|(D,R)|(D_1,R_1)|(D_2,R_2)] [S|CRC|NONE|DEFAULT|00000000] [B|LIST|1] [S|LIST|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [S|SHOW|METHODCUSTOM|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] [I|SPACE|^"FF^"] [B|OPTIMIZE|0] [S|START|B_1,R_1,B_2,R_2,B,R,SU,SI(00)|PResetPRG(0FFE00000)|C_1,C_2,C,C$*,D*,P,PIntPRG,W*,L(0FFE01000)|FIXEDVECT(0FFFFFFD0)]
" 5
[EXCLUDED_FILES_SimDebug_RX600]
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX630-RSK_Renesas\RTOSDemo\main-blinky.c"
[LINKAGE_ORDER_SimDebug_RX600]
[GENERAL_DATA_CONFIGURATION_SimDebug_RX600]
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_DefaultSession]
[SESSION_DATA_CONFIGURATION_SESSION_Blinky_DefaultSession]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_SessionRX600_E1_E20_SYSTEM]
[SESSION_DATA_CONFIGURATION_SESSION_Blinky_SessionRX600_E1_E20_SYSTEM]
"MEMORY_MAPPING_OPTIONS" "Unknown Options"
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_SimSessionRX600]
[SESSION_DATA_CONFIGURATION_SESSION_Blinky_SimSessionRX600]
"MEMORY_MAPPING_OPTIONS" "[V|VERSION|1] [S|CPUTYPE|^"Other (RX600)^"] [S|MAP|^"0x00000000,0x0001FFFF,RAM,32,0101,2 0x00080000,0x000FFFFF,I/O,32,0101,2 0x00100000,0x00107FFF,ROM,32,0101,2 0x007F8000,0x007F9FFF,RAM,32,0101,2 0x007FC000,0x007FC4FF,I/O,32,0101,2 0x007FFC00,0x007FFFFF,I/O,32,0101,2 0x00E00000,0x00FFFFFF,ROM,32,0101,2 0xFEFFE000,0xFEFFFFFF,ROM,32,0101,2 0xFF7FC000,0xFF7FFFFF,ROM,32,0101,2 0xFFE00000,0xFFFFFFFF,ROM,32,0101,2^"] [S|RESOURCE|^"0x00000000,0x0001FFFF,R/W 0x00080000,0x000FFFFF,R/W 0x007FC000,0x007FC4FF,R/W 0x007FFC00,0x007FFFFF,R/W 0xFFFF8000,0xFFFFFFFF,R/W ^"] [B|SIMIOF|0] [I|SIMIOADR|0x0] [I|BUS_MODE|0] [S|ENDIAN|^"LITTLE^"] [S|PATCH|^"OFF^"]"
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionRX600_E1_E20_SYSTEM]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_SessionRX600_E1_E20_SYSTEM]
"MEMORY_MAPPING_OPTIONS" "Unknown Options"
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SimSessionRX600]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_SimSessionRX600]
"MEMORY_MAPPING_OPTIONS" "[V|VERSION|1] [S|CPUTYPE|^"Other (RX600)^"] [S|MAP|^"0x00000000,0x0001FFFF,RAM,32,0101,2 0x00080000,0x000FFFFF,I/O,32,0101,2 0x00100000,0x00107FFF,ROM,32,0101,2 0x007F8000,0x007F9FFF,RAM,32,0101,2 0x007FC000,0x007FC4FF,I/O,32,0101,2 0x007FFC00,0x007FFFFF,I/O,32,0101,2 0x00E00000,0x00FFFFFF,ROM,32,0101,2 0xFEFFE000,0xFEFFFFFF,ROM,32,0101,2 0xFF7FC000,0xFF7FFFFF,ROM,32,0101,2 0xFFE00000,0xFFFFFFFF,ROM,32,0101,2^"] [S|RESOURCE|^"0x00000000,0x0001FFFF,R/W 0x00080000,0x000FFFFF,R/W 0x007FC000,0x007FC4FF,R/W 0x007FFC00,0x007FFFFF,R/W 0xFFFF8000,0xFFFFFFFF,R/W ^"] [B|SIMIOF|0] [I|SIMIOADR|0x0] [I|BUS_MODE|0] [S|ENDIAN|^"LITTLE^"] [S|PATCH|^"OFF^"]"
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM]
"MEMORY_MAPPING_OPTIONS" "Unknown Options"
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SimSessionRX600]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SimSessionRX600]
"MEMORY_MAPPING_OPTIONS" "[V|VERSION|1] [S|CPUTYPE|^"Other (RX600)^"] [S|MAP|^"0x00000000,0x0001FFFF,RAM,32,0101,2 0x00080000,0x000FFFFF,I/O,32,0101,2 0x00100000,0x00107FFF,ROM,32,0101,2 0x007F8000,0x007F9FFF,RAM,32,0101,2 0x007FC000,0x007FC4FF,I/O,32,0101,2 0x007FFC00,0x007FFFFF,I/O,32,0101,2 0x00E00000,0x00FFFFFF,ROM,32,0101,2 0xFEFFE000,0xFEFFFFFF,ROM,32,0101,2 0xFF7FC000,0xFF7FFFFF,ROM,32,0101,2 0xFFE00000,0xFFFFFFFF,ROM,32,0101,2^"] [S|RESOURCE|^"0x00000000,0x0001FFFF,R/W 0x00080000,0x000FFFFF,R/W 0x007FC000,0x007FC4FF,R/W 0x007FFC00,0x007FFFFF,R/W 0xFFFF8000,0xFFFFFFFF,R/W ^"] [B|SIMIOF|0] [I|SIMIOADR|0x0] [I|BUS_MODE|0] [S|ENDIAN|^"LITTLE^"] [S|PATCH|^"OFF^"]"
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_DefaultSession]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_DefaultSession]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_SessionRX600_E1_E20_SYSTEM]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_SessionRX600_E1_E20_SYSTEM]
"MEMORY_MAPPING_OPTIONS" "Unknown Options"
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_SimSessionRX600]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_SimSessionRX600]
"MEMORY_MAPPING_OPTIONS" "[V|VERSION|1] [S|CPUTYPE|^"Other (RX600)^"] [S|MAP|^"0x00000000,0x0001FFFF,RAM,32,0101,2 0x00080000,0x000FFFFF,I/O,32,0101,2 0x00100000,0x00107FFF,ROM,32,0101,2 0x007F8000,0x007F9FFF,RAM,32,0101,2 0x007FC000,0x007FC4FF,I/O,32,0101,2 0x007FFC00,0x007FFFFF,I/O,32,0101,2 0x00E00000,0x00FFFFFF,ROM,32,0101,2 0xFEFFE000,0xFEFFFFFF,ROM,32,0101,2 0xFF7FC000,0xFF7FFFFF,ROM,32,0101,2 0xFFE00000,0xFFFFFFFF,ROM,32,0101,2^"] [S|RESOURCE|^"0x00000000,0x0001FFFF,R/W 0x00080000,0x000FFFFF,R/W 0x007FC000,0x007FC4FF,R/W 0x007FFC00,0x007FFFFF,R/W 0xFFFF8000,0xFFFFFFFF,R/W ^"] [B|SIMIOF|0] [I|SIMIOADR|0x0] [I|BUS_MODE|0] [S|ENDIAN|^"LITTLE^"] [S|PATCH|^"OFF^"]"
[GENERAL_DATA_CONFIGURATION_SESSION_SimDebug_RX600_DefaultSession]
[SESSION_DATA_CONFIGURATION_SESSION_SimDebug_RX600_DefaultSession]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_SimDebug_RX600_SessionRX600_E1_E20_SYSTEM]
[SESSION_DATA_CONFIGURATION_SESSION_SimDebug_RX600_SessionRX600_E1_E20_SYSTEM]
"MEMORY_MAPPING_OPTIONS" "Unknown Options"
[GENERAL_DATA_CONFIGURATION_SESSION_SimDebug_RX600_SimSessionRX600]
[SESSION_DATA_CONFIGURATION_SESSION_SimDebug_RX600_SimSessionRX600]
"MEMORY_MAPPING_OPTIONS" "[V|VERSION|1] [S|CPUTYPE|^"Other (RX600)^"] [S|MAP|^"0x00000000,0x0001FFFF,RAM,32,0101,2 0x00080000,0x000FFFFF,I/O,32,0101,2 0x00100000,0x00107FFF,ROM,32,0101,2 0x007F8000,0x007F9FFF,RAM,32,0101,2 0x007FC000,0x007FC4FF,I/O,32,0101,2 0x007FFC00,0x007FFFFF,I/O,32,0101,2 0x00E00000,0x00FFFFFF,ROM,32,0101,2 0xFEFFE000,0xFEFFFFFF,ROM,32,0101,2 0xFF7FC000,0xFF7FFFFF,ROM,32,0101,2 0xFFE00000,0xFFFFFFFF,ROM,32,0101,2^"] [S|RESOURCE|^"0x00000000,0x0001FFFF,R/W 0x00080000,0x000FFFFF,R/W 0x007FC000,0x007FC4FF,R/W 0x007FFC00,0x007FFFFF,R/W 0xFFFF8000,0xFFFFFFFF,R/W ^"] [B|SIMIOF|0] [I|SIMIOADR|0x0] [I|BUS_MODE|0] [S|ENDIAN|^"LITTLE^"] [S|PATCH|^"OFF^"]"
[EXT_DEBUGGER_INFO]
0 "" "" "" ""
[END]

@ -0,0 +1,69 @@
[HIMDBVersion]
2.0
[DATABASE_VERSION]
"1.1"
[SESSIONS_]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
"SimSessionRX600"
[CONFIGURATIONS]
"Blinky"
"Debug"
"Debug_RX600_E1_E20_SYSTEM"
"Debug_with_optimisation"
"SimDebug_RX600"
[CURRENT_CONFIGURATION]
"Debug"
[CURRENT_SESSION]
"SessionRX600_E1_E20_SYSTEM"
[GENERAL_DATA_PROJECT]
"FDT_UserBootAreaFiles" ""
[GENERAL_DATA_CONFIGURATION_Blinky]
"PROJECT_FILES_MODIFIED_DATA_TAG" "TRUE"
[SESSIONS_Blinky]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
"SimSessionRX600"
[GENERAL_DATA_CONFIGURATION_Debug]
"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE"
[SESSIONS_Debug]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
"SimSessionRX600"
[GENERAL_DATA_CONFIGURATION_Debug_RX600_E1_E20_SYSTEM]
"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE"
[SESSIONS_Debug_RX600_E1_E20_SYSTEM]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
"SimSessionRX600"
[GENERAL_DATA_CONFIGURATION_Debug_with_optimisation]
"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE"
[SESSIONS_Debug_with_optimisation]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
"SimSessionRX600"
[GENERAL_DATA_CONFIGURATION_SimDebug_RX600]
"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE"
[SESSIONS_SimDebug_RX600]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
"SimSessionRX600"
[GENERAL_DATA_SESSION_SimSessionRX600]
[GENERAL_DATA_SESSION_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_SimSessionRX600]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SimSessionRX600]
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_SessionRX600_E1_E20_SYSTEM]
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_SimDebug_RX600_SessionRX600_E1_E20_SYSTEM]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_SimDebug_RX600_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionRX600_E1_E20_SYSTEM]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SimSessionRX600]
[GENERAL_DATA_CONFIGURATION_SESSION_SimDebug_RX600_SimSessionRX600]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_SimSessionRX600]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_SessionRX600_E1_E20_SYSTEM]
[GENERAL_DATA_SESSION_SessionRX600_E1_E20_SYSTEM]
[END]

@ -0,0 +1,139 @@
/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*******************************************************************************/
/*
* cgc.c
*
* Created on: 01 Oct 2011
* Author: RJW
* Reneses Electronics Europe Ltd
*/
/******************************************************************************
System Includes
******************************************************************************/
/******************************************************************************
User Includes
******************************************************************************/
#include "iodefine.h"
#include "cgc.h"
/*****************************************************************************/
/* */
/* Configure the CGC (Clock Generation Circuit) of the RX630 using the */
/* using the 7 STEPS specified in cgc.h */
/* */
/*****************************************************************************/
/******************************************************************************
Function : InitCGC
Description : Initialises the CGC registers based upon the settings
made in file cgc.h
Argument : none
Return value : none
******************************************************************************/
void InitCGC(void)
{
unsigned long i;
#if (ENABLE_SUB)
SYSTEM.SOSCCR.BYTE = 0x00; /* Sub-clock oscillator ON */
#else
SYSTEM.SOSCCR.BYTE = 0x01; /* Sub-clock oscillator OFF */
#endif
#if (ENABLE_HOCO)
SYSTEM.HOCOPCR.BYTE = 0x00; /* HOCO PSU ON */
SYSTEM.HOCOCR.BYTE = 0x00; /* HOCO ON */
#else
SYSTEM.HOCOPCR.BYTE = 0x01; /* HOCO PSU OFF */
SYSTEM.HOCOCR.BYTE = 0x01; /* HOCO OFF */
#endif
#if (ENABLE_MAIN)
SYSTEM.MOSCWTCR.BYTE = 0x0e; /* Main Clock Oscillator Wait Control Register */
/* 262144 states */
SYSTEM.MOSCCR.BYTE = 0x00; /* EXTAL ON */
#else
SYSTEM.MOSCCR.BYTE = 0x01; /* EXTAL OFF */
#endif
#if (ENABLE_PLL)
SYSTEM.MOSCWTCR.BYTE = 0x0e; /* Main Clock Oscillator Wait Control Register */
/* 262144 states */
SYSTEM.MOSCCR.BYTE = 0x00; /* EXTAL ON */
SYSTEM.PLLWTCR.BYTE = 0x0e; /* PLL Wait Control Register */
/* 2097152 states */
SYSTEM.PLLCR2.BYTE = 0x01; /* PLL OFF */
#if (PLL_INPUT_FREQ_DIV == 1)
SYSTEM.PLLCR.BIT.PLIDIV = 0;
#elif (PLL_INPUT_FREQ_DIV == 2)
SYSTEM.PLLCR.BIT.PLIDIV = 1;
#elif (PLL_INPUT_FREQ_DIV == 4)
SYSTEM.PLLCR.BIT.PLIDIV = 2;
#else
SYSTEM.PLLCR.BIT.PLIDIV = 0;
#endif
SYSTEM.PLLCR.BIT.STC = (PLL_MUL - 1);
/* External oscillation input selection */
SYSTEM.PLLCR2.BYTE = 0x00; /* PLL ON */
#else
SYSTEM.PLLCR2.BYTE = 0x01; /* PLL OFF */
#endif
for(i = 0; i<2500; i++) /* Wait for stabilisation of */
{ /* HOCO, LOCO, PLL and main clock */
} /* = 20ms */
/* (2500 x 1/125kHz = 20ms) */
SYSTEM.SCKCR.LONG = FCLK_SCKCR |
ICLK_SCKCR |
PSTOP1_SCKCR |
BCLK_SCKCR |
PCLK1215_SCKCR |
PCLKB_SCKCR |
PCLK47_SCKCR |
PCLK03_SCKCR ;
SYSTEM.SCKCR2.WORD = UCK_SCKCR2 |
IEBCK_SCKCR2 ;
SYSTEM.SCKCR3.WORD = CLK_SOURCE;
}

@ -0,0 +1,205 @@
/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*******************************************************************************/
/*
* cgc.h
*
* Created on: 01 Oct 2011
* Author: RJW
* Reneses Electronics Europe Ltd
*/
#ifndef CGC_H_
#define CGC_H_
/******************************************************************************
Function Prototypes
******************************************************************************/
void InitCGC(void);
/*****************************************************************************/
/* */
/* Set the CGC (Clock Generation Circuit of the RX630 using the */
/* following 7 STEPS */
/* */
/*****************************************************************************/
/*****************************************************************************/
/* */
/* STEP 1: System Clock Options */
/* */
/* Enter one of the CLK_SOURCE_ options into the */
/* */
/* #define CLK_SOURCE ( xxx ) */
/* below. */
/* This will be the clock source that the device will switch to as part of */
/* HardwareSetup() */
/* Extra clocks can be enabled in STEP 3. */
/* */
/* For example */
/* #define CLK_SOURCE (CLK_SOURCE_MAIN) */
/* */
/*****************************************************************************/
#define CLK_SOURCE_LOCO 0x0000
#define CLK_SOURCE_HOCO 0x0100
#define CLK_SOURCE_MAIN 0x0200
#define CLK_SOURCE_SUB 0x0300
#define CLK_SOURCE_PLL 0x0400
#define CLK_SOURCE (CLK_SOURCE_PLL)
/*****************************************************************************/
/* */
/* STEP 2: External XTAL values */
/* */
/* If using the CLK_SOURCE_MAIN, CLK_SOURCE_SUB, CLK_SOURCE_PLL */
/* enter the MAIN XTAL and SUB XTAL values here. */
/* */
/* If using the PLL, enter the PLL multiplier and PLL frequency divder */
/* Use the divider so that the input frequency into the PLL is in */
/* the range of 4 MHz to 16 MHz. */
/* */
/* Use the multiplier so that the output frequency of the PLL is in */
/* the range of 104MHz to 200Mhz */
/* */
/* The PLL frequency divider values are: */
/* /1, /2, /4 */
/* The PLL muliplier values are: */
/* x8, x10, x12, x16, x20, x24, x25, x50 */
/* */
/* Example: */
/* XTAL = 12MHz */
/* PLL Divider = 1 */
/* */
/* Therefore, input into PLL = 12M / 1 */
/* = 12M */
/* PLL Multipler = 16 */
/* */
/* Therefore, ouput of PLL = 12M x 16 */
/* = 192M */
/* */
/* NOTE: The maximum XTAL is 20MHz */
/*****************************************************************************/
#define XTAL_FREQUENCY (12000000L)
#define PLL_MUL (16)
#define PLL_INPUT_FREQ_DIV (1)
#define SUB_FREQUENCY (32768L)
/*****************************************************************************/
/* */
/* STEP 3: Enable the chosen clock source and any extra clock sources */
/* Remeber to enable the clock source chosen in STEP 1. */
/* Foe example, if CLK_SOURCE_PLL has been chosen, set */
/* #define ENABLE_PLL (1) */
/* */
/*****************************************************************************/
#define ENABLE_HOCO (1)
#define ENABLE_SUB (0)
#define ENABLE_MAIN (0)
#define ENABLE_PLL (1)
/*****************************************************************************/
/* */
/* STEP 4: */
/* Enter the Clock Divders for */
/* - FCLK_DIV, ICLK_DIV, BCLK_DIV, PCLKA_DIV, PCLKB_DIV */
/* Valid values are 1, 2, 4, 8, 16, 32 and 64 */
/* */
/* The Clock Value being divided is: */
/* If LOCO, 125kHz */
/* If HOCO, 50MHz */
/* If SUB, the value of SUB specified in STEP 2 */
/* If MAIN, the value of XTAL specified in STEP 2 */
/* If PLL, the result of the XTAL, PLL Div, PLL Mul specified in STEP 2 */
/*****************************************************************************/
#define FCLK_DIV (4)
#define ICLK_DIV (2)
#define BCLK_DIV (4)
#define PCLK1215_DIV (2) /* Do not change this */
#define PCLKB_DIV (4)
#define PCLK47_DIV (2) /* Do not change this */
#define PCLK03_DIV (2) /* Do not change this */
/*****************************************************************************/
/* */
/* STEP 5: */
/* Enter the Clock Divder for */
/* - IEBCK_DIV */
/* Valid values are 2, 4, 6, 8, 16, 32 and 64 */
/* */
/* The Clock Value being divided is: */
/* If LOCO, 125kHz */
/* If HOCO, 50MHz */
/* If SUB, the value of SUB specified in STEP 2 */
/* If MAIN, the value of XTAL specified in STEP 2 */
/* If PLL, the result of the XTAL, PLL Div, PLL Mul specified in STEP 2 */
/*****************************************************************************/
#define IEBCK_DIV (2)
/*****************************************************************************/
/* */
/* STEP 6: */
/* Enter the Clock Divder for */
/* - UCK_DIV */
/* Valid values are 3, 4 */
/* */
/* The Clock Value being divided is: */
/* If LOCO, 125kHz */
/* If HOCO, 50MHz */
/* If SUB, the value of SUB specified in STEP 2 */
/* If MAIN, the value of XTAL specified in STEP 2 */
/* If PLL, the result of the XTAL, PLL Div, PLL Mul specified in STEP 2 */
/*****************************************************************************/
#define UCK_DIV (3)
/*****************************************************************************/
/* */
/* STEP 7: */
/* Specify the use of BCLK pin */
/* To ENABLE, set to (0) */
/* To DISABLE, set to (1) */
/* */
/*****************************************************************************/
#define BCLK_PIN (1)
/*****************************************************************************/
/* Clock configuration is now complete. */
/*****************************************************************************/
#include "cgc_set.h"
#include "cgc_error.h"
#endif

@ -0,0 +1,47 @@
#ifndef CGC_ERROR_H_
#define CGC_ERROR_H_
/* Error checking macros for the clock selction and clock enable defines */
#if ( (CLK_SOURCE != CLK_SOURCE_LOCO) && \
(CLK_SOURCE != CLK_SOURCE_HOCO) && \
(CLK_SOURCE != CLK_SOURCE_MAIN) && \
(CLK_SOURCE != CLK_SOURCE_SUB) && \
(CLK_SOURCE != CLK_SOURCE_PLL) )
#error "No CLK_SOURCE specified. Please specify a valid CLK_SOURCE";
#endif
#if (CLK_SOURCE == CLK_SOURCE_HOCO) && (ENABLE_HOCO == 0)
#error "HOCO has been specified as the CLK_SOURCE but ENABLE_HOCO is (0). Please set to (1) in file cgc.h"
#endif
#if (CLK_SOURCE == CLK_SOURCE_MAIN) && (ENABLE_MAIN == 0)
#error "HOCO has been specified as the CLK_SOURCE but ENABLE_HOCO is (0). Please set to (1) in file cgc.h"
#endif
#if (CLK_SOURCE == CLK_SOURCE_SUB) && (ENABLE_SUB == 0)
#error "HOCO has been specified as the CLK_SOURCE but ENABLE_HOCO is (0). Please set to (1) in file cgc.h"
#endif
#if (CLK_SOURCE == CLK_SOURCE_PLL) && (ENABLE_PLL == 0)
#error "PLL has been specified as the CLK_SOURCE but ENABLE_PLL is (0). Please set to (1) in file cgc.h"
#endif
#if ( FCLK_FREQUENCY > 50000000L )
#error "FCLK_FREQUENCY Error: Please enter a valid divider value"
#endif
#if ( ICLK_FREQUENCY > 100000000L )
#error "ICLK_FREQUENCY Error: Please enter a valid divider value"
#endif
#if ( BCLK_FREQUENCY > 100000000L )
#error "BCLK_FREQUENCY Error: Please enter a valid divider value"
#endif
#if ( PCLKB_FREQUENCY > 50000000L )
#error "PCLKB_FREQUENCY Error: Please enter a valid divider value"
#endif
#endif

@ -0,0 +1,233 @@
#ifndef CGC_SET_VALUES_H_
#define CGC_SET_VALUES_H_
/* Do not modify these macros. These values are used to initialise
the SCKCR and SCKCR2 registers based upon the above values. */
#if (FCLK_DIV == 64)
#define FCLK_SCKCR 0x60000000L
#elif (FCLK_DIV == 32)
#define FCLK_SCKCR 0x50000000L
#elif (FCLK_DIV == 16)
#define FCLK_SCKCR 0x40000000L
#elif (FCLK_DIV == 8)
#define FCLK_SCKCR 0x30000000L
#elif (FCLK_DIV == 4)
#define FCLK_SCKCR 0x20000000L
#elif (FCLK_DIV == 2)
#define FCLK_SCKCR 0x10000000L
#elif(FCLK_DIV == 1)
#define FCLK_SCKCR 0x00000000L
#else
#define FCLK_SCKCR 0x10000000L
#endif
#if (ICLK_DIV == 64)
#define ICLK_SCKCR 0x06000000L
#elif (ICLK_DIV == 32)
#define ICLK_SCKCR 0x05000000L
#elif (ICLK_DIV == 16)
#define ICLK_SCKCR 0x04000000L
#elif (ICLK_DIV == 8)
#define ICLK_SCKCR 0x03000000L
#elif (ICLK_DIV == 4)
#define ICLK_SCKCR 0x02000000L
#elif (ICLK_DIV == 2)
#define ICLK_SCKCR 0x01000000L
#elif (ICLK_DIV == 1)
#define ICLK_SCKCR 0x00000000L
#else
#define ICLK_SCKCR 0x01000000L
#endif
#if (BCLK_PIN == 1)
#define PSTOP1_SCKCR 0x00800000L
#elif
#define PSTOP1_SCKCR 0x00000000L
#endif
#if (BCLK_DIV == 64)
#define BCLK_SCKCR 0x00060000L
#elif (BCLK_DIV == 32)
#define BCLK_SCKCR 0x00050000L
#elif (BCLK_DIV == 16)
#define BCLK_SCKCR 0x00040000L
#elif (BCLK_DIV == 8)
#define BCLK_SCKCR 0x00030000L
#elif (BCLK_DIV == 4)
#define BCLK_SCKCR 0x00020000L
#elif (BCLK_DIV == 2)
#define BCLK_SCKCR 0x00010000L
#elif (BCLK_DIV == 1)
#define BCLK_SCKCR 0x00000000L
#else
#define BCLK_SCKCR 0x00010000L
#endif
#if (PCLK1215_DIV == 64)
#define PCLK1215_SCKCR 0x00006000L
#elif (PCLK1215_DIV == 32)
#define PCLK1215_SCKCR 0x00005000L
#elif (PCLK1215_DIV == 16)
#define PCLK1215_SCKCR 0x00004000L
#elif (PCLK1215_DIV == 8)
#define PCLK1215_SCKCR 0x00003000L
#elif (PCLK1215_DIV == 4)
#define PCLK1215_SCKCR 0x00002000L
#elif (PCLK1215_DIV == 2)
#define PCLK1215_SCKCR 0x00001000L
#elif (PCLK1215_DIV == 1)
#define PCLK1215_SCKCR 0x00000000L
#else
#define PCLK1215_SCKCR 0x00001000L
#endif
#if (PCLKB_DIV == 64)
#define PCLKB_SCKCR 0x00000600L
#elif (PCLKB_DIV == 32)
#define PCLKB_SCKCR 0x00000500L
#elif (PCLKB_DIV == 16)
#define PCLKB_SCKCR 0x00000400L
#elif (PCLKB_DIV == 8)
#define PCLKB_SCKCR 0x00000300L
#elif (PCLKB_DIV == 4)
#define PCLKB_SCKCR 0x00000200L
#elif (PCLKB_DIV == 2)
#define PCLKB_SCKCR 0x00000100L
#elif (PCLKB_DIV == 1)
#define PCLKB_SCKCR 0x00000000L
#else
#define PCLKB_SCKCR 0x00000100L
#endif
#if (PCLK47_DIV == 64)
#define PCLK47_SCKCR 0x00000060L
#elif (PCLK47_DIV == 32)
#define PCLK47_SCKCR 0x00000050L
#elif (PCLK47_DIV == 16)
#define PCLK47_SCKCR 0x00000040L
#elif (PCLK47_DIV == 8)
#define PCLK47_SCKCR 0x00000030L
#elif (PCLK47_DIV == 4)
#define PCLK47_SCKCR 0x00000020L
#elif (PCLK47_DIV == 2)
#define PCLK47_SCKCR 0x00000010L
#elif (PCLK47_DIV == 1)
#define PCLK47_SCKCR 0x00000000L
#else
#define PCLK47_SCKCR 0x00000010L
#endif
#if (PCLK03_DIV == 64)
#define PCLK03_SCKCR 0x00000006L
#elif (PCLK03_DIV == 32)
#define PCLK03_SCKCR 0x00000005L
#elif (PCLK03_DIV == 16)
#define PCLK03_SCKCR 0x00000004L
#elif (PCLK03_DIV == 8)
#define PCLK03_SCKCR 0x00000003L
#elif (PCLK03_DIV == 4)
#define PCLK03_SCKCR 0x00000002L
#elif (PCLK03_DIV == 2)
#define PCLK03_SCKCR 0x00000001L
#elif (PCLK03_DIV == 1)
#define PCLK03_SCKCR 0x00000000L
#else
#define PCLK03_SCKCR 0x00000001L
#endif
#if (UCK_DIV == 6)
#define UCK_SCKCR2 0x00C0L
#elif (UCK_DIV == 64)
#define UCK_SCKCR2 0x0060L
#elif (UCK_DIV == 32)
#define UCK_SCKCR2 0x0050L
#elif (UCK_DIV == 16)
#define UCK_SCKCR2 0x0040L
#elif (UCK_DIV == 8)
#define UCK_SCKCR2 0x0030L
#elif (UCK_DIV == 4)
#define UCK_SCKCR2 0x0020L
#elif (UCK_DIV == 2)
#define UCK_SCKCR2 0x0010L
#else
#define UCK_SCKCR2 0x0010L
#endif
#if (IEBCK_DIV == 3)
#define IEBCK_SCKCR2 0x00000020L
#elif (IEBCK_DIV == 4)
#define IEBCK_SCKCR2 0x00000030L
#else
#define IEBCK_SCKCR2 0x00000030L
#endif
#if (CLK_SOURCE == CLK_SOURCE_LOCO)
/* Internal LOCO circuit - 125kHz*/
#define CLK_FREQUENCY (125000L)
#define FCLK_FREQUENCY (CLK_FREQUENCY / FCLK_DIV)
#define ICLK_FREQUENCY (CLK_FREQUENCY / ICLK_DIV)
#define BCLK_FREQUENCY (CLK_FREQUENCY / BCLK_DIV)
#define PCLKA_FREQUENCY (CLK_FREQUENCY / PCLK1215_DIV)
#define PCLKB_FREQUENCY (CLK_FREQUENCY / PCLKB_DIV)
#define PCLK47_FREQUENCY (CLK_FREQUENCY / PCLK47_DIV)
#define PCLK03_FREQUENCY (CLK_FREQUENCY / PCLK03_DIV)
#elif (CLK_SOURCE == CLK_SOURCE_HOCO)
/* Internal high speed on-chip oscillator (HOCO) */
#define CLK_FREQUENCY (50000000L)
#define FCLK_FREQUENCY (CLK_FREQUENCY / FCLK_DIV)
#define ICLK_FREQUENCY (CLK_FREQUENCY / ICLK_DIV)
#define BCLK_FREQUENCY (CLK_FREQUENCY / BCLK_DIV)
#define PCLKA_FREQUENCY (CLK_FREQUENCY / PCLK1215_DIV)
#define PCLKB_FREQUENCY (CLK_FREQUENCY / PCLKB_DIV)
#define PCLK47_FREQUENCY (CLK_FREQUENCY / PCLK47_DIV)
#define PCLK03_FREQUENCY (CLK_FREQUENCY / PCLK03_DIV)
#elif (CLK_SOURCE == CLK_SOURCE_MAIN)
/* External XTAL, but not via the PLL circuit */
#define FCLK_FREQUENCY (XTAL_FREQUENCY / FCLK_DIV)
#define ICLK_FREQUENCY (XTAL_FREQUENCY / ICLK_DIV)
#define BCLK_FREQUENCY (XTAL_FREQUENCY / BCLK_DIV)
#define PCLKA_FREQUENCY (XTAL_FREQUENCY / PCLK1215_DIV)
#define PCLKB_FREQUENCY (XTAL_FREQUENCY / PCLKB_DIV)
#define PCLK47_FREQUENCY (XTAL_FREQUENCY / PCLK47_DIV)
#define PCLK03_FREQUENCY (XTAL_FREQUENCY / PCLK03_DIV)
#elif (CLK_SOURCE == CLK_SOURCE_SUB)
/* External 32khZ XTAL */
#define FCLK_FREQUENCY (SUB_FREQUENCY / FCLK_DIV)
#define ICLK_FREQUENCY (SUB_FREQUENCY / ICLK_DIV)
#define BCLK_FREQUENCY (SUB_FREQUENCY / BCLK_DIV)
#define PCLKA_FREQUENCY (SUB_FREQUENCY / PCLK1215_DIV)
#define PCLKB_FREQUENCY (SUB_FREQUENCY / PCLKB_DIV)
#define PCLK47_FREQUENCY (SUB_FREQUENCY / PCLK47_DIV)
#define PCLK03_FREQUENCY (SUB_FREQUENCY / PCLK03_DIV)
#elif (CLK_SOURCE == CLK_SOURCE_PLL)
/* External XTAL, but using the PLL circuit */
#define PLL_FREQUENCY (XTAL_FREQUENCY * (PLL_MUL / PLL_INPUT_FREQ_DIV))
#define FCLK_FREQUENCY (PLL_FREQUENCY / FCLK_DIV)
#define ICLK_FREQUENCY (PLL_FREQUENCY / ICLK_DIV)
#define BCLK_FREQUENCY (PLL_FREQUENCY / BCLK_DIV)
#define PCLKA_FREQUENCY (PLL_FREQUENCY / PCLK1215_DIV)
#define PCLKB_FREQUENCY (PLL_FREQUENCY / PCLKB_DIV)
#define PCLK47_FREQUENCY (PLL_FREQUENCY / PCLK47_DIV)
#define PCLK03_FREQUENCY (PLL_FREQUENCY / PCLK03_DIV)
#endif
#endif

@ -0,0 +1,66 @@
/***********************************************************************/
/* */
/* FILE :dbsct.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Setting of B,R Section */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX
*
* File Name : dbsct.c
*
* Abstract : Setting of B,R Section.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include "typedefine.h"
#pragma unpack
#pragma section C C$DSEC
extern const struct {
_UBYTE *rom_s; /* Start address of the initialized data section in ROM */
_UBYTE *rom_e; /* End address of the initialized data section in ROM */
_UBYTE *ram_s; /* Start address of the initialized data section in RAM */
} _DTBL[] = {
{ __sectop("D"), __secend("D"), __sectop("R") },
{ __sectop("D_2"), __secend("D_2"), __sectop("R_2") },
{ __sectop("D_1"), __secend("D_1"), __sectop("R_1") }
};
#pragma section C C$BSEC
extern const struct {
_UBYTE *b_s; /* Start address of non-initialized data section */
_UBYTE *b_e; /* End address of non-initialized data section */
} _BTBL[] = {
{ __sectop("B"), __secend("B") },
{ __sectop("B_2"), __secend("B_2") },
{ __sectop("B_1"), __secend("B_1") }
};
#pragma section
/*
** CTBL prevents excessive output of L1100 messages when linking.
** Even if CTBL is deleted, the operation of the program does not change.
*/
_UBYTE * const _CTBL[] = {
__sectop("C_1"), __sectop("C_2"), __sectop("C"),
__sectop("W_1"), __sectop("W_2"), __sectop("W")
};
#pragma packoption

@ -0,0 +1,154 @@
/******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Technology Corp. and is only
* intended for use with Renesas products. No other uses are authorized.
* This software is owned by Renesas Technology Corp. and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES
* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY
* DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this
* software and to discontinue the availability of this software.
* By using this software, you agree to the additional terms and
* conditions found by accessing the following link:
* http://www.renesas.com/disclaimer
******************************************************************************
* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : hwsetup.c
* Version : 1.00
* Description : Power up hardware initializations
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 15.02.2010 1.00 First Release
******************************************************************************/
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
#include <stdint.h>
#include "iodefine.h"
#include "cgc.h"
#include "rskrx630def.h"
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/******************************************************************************
Imported global variables and functions (from other files)
******************************************************************************/
/******************************************************************************
Exported global variables and functions (to be accessed by other files)
******************************************************************************/
/******************************************************************************
Private global variables and functions
******************************************************************************/
void io_set_cpg(void);
void ConfigurePortPins(void);
void EnablePeripheralModules(void);
/******************************************************************************
* Function Name: HardwareSetup
* Description : This function does initial setting for CPG port pins used in
* : the Demo including the MII pins of the Ethernet PHY connection.
* Arguments : none
* Return Value : none
******************************************************************************/
void HardwareSetup(void)
{
/* Gain access to the System control registers */
/* Refer to section 13 of the Hardware User Manual for further details */
SYSTEM.PRCR.WORD = 0xA503;
/* Gain access to the Port Function Select Registers */
/* Refer to section 21 of the Hardware User Manual for further details */
MPC.PWPR.BIT.B0WI = 0;
MPC.PWPR.BIT.PFSWE = 1;
/* CPG setting */
/* User defined values for XTAL, Clock Divders etc are set in cgc.h */
InitCGC();
/* Setup the port pins */
ConfigurePortPins();
/* Enables peripherals */
EnablePeripheralModules();
#if INCLUDE_LCD == 1
/* Initialize display */
InitialiseDisplay();
#endif
}
/******************************************************************************
* Function Name: EnablePeripheralModules
* Description : Enables Peripheral Modules before use
* Arguments : none
* Return Value : none
******************************************************************************/
void EnablePeripheralModules(void)
{
/* Module standby clear */
SYSTEM.MSTPCRA.BIT.MSTPA15 = 0; /* CMT0 */
}
/******************************************************************************
* Function Name: ConfigurePortPins
* Description : Configures port pins.
* Arguments : none
* Return Value : none
******************************************************************************/
void ConfigurePortPins(void)
{
/* Port pins default to inputs. To ensure safe initialisation set the pin states
before changing the data direction registers. This will avoid any unintentional
state changes on the external ports.
Many peripheral modules will override the setting of the port registers. Ensure
that the state is safe for external devices if the internal peripheral module is
disabled or powered down. */
/* Set initial LED pin state to off */
LED0 = 1;
LED1 = 1;
LED2 = 1;
LED3 = 1;
/* Configure LED 0-3 pin settings */
LED0_PDR = 1;
LED1_PDR = 1;
LED2_PDR = 1;
LED3_PDR = 1;
/* Configure SW 1-3 pin settings */
/* No need to configure inputs as they are inputs by default */
#if INCLUDE_LCD == 1
/* Set LCD pins as outputs */
/* LCD-RS */
LCD_RS_PDR = 1;
/* LCD-EN */
LCD_EN = 1;
/*LCD-data */
LCD_DATA_PDR = 0xF0;
#endif
}

@ -0,0 +1,53 @@
/***********************************************************************/
/* */
/* FILE :intprg.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Interrupt Program */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : intprg.c
*
* Abstract : Interrupt Program.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include <machine.h>
#include "vect.h"
#pragma section IntPRG
// Exception(Supervisor Instruction)
void Excep_SuperVisorInst(void){/* brk(); */}
// Exception(Undefined Instruction)
void Excep_UndefinedInst(void){/* brk(); */}
// Exception(Floating Point)
void Excep_FloatingPoint(void){/* brk(); */}
// NMI
void NonMaskableInterrupt(void){/* brk(); */}
// Dummy
void Dummy(void){/* brk(); */}
// BRK
void Excep_BRK(void){ wait(); }

@ -0,0 +1,120 @@
; Comment out the orginal code
.IF 0
;------------------------------------------------------------------------
; |
; FILE :lowlvl.src |
; DATE :Wed, Jun 16, 2010 |
; DESCRIPTION :Program of Low level |
; CPU TYPE :Other |
; |
; This file is generated by Renesas Project Generator (Ver.4.50). |
; NOTE:THIS IS A TYPICAL EXAMPLE. |
; |
;------------------------------------------------------------------------
.GLB _charput
.GLB _charget
SIM_IO .EQU 0h
.SECTION P,CODE
;-----------------------------------------------------------------------
; _charput:
;-----------------------------------------------------------------------
_charput:
MOV.L #IO_BUF,R2
MOV.B R1,[R2]
MOV.L #1220000h,R1
MOV.L #PARM,R3
MOV.L R2,[R3]
MOV.L R3,R2
MOV.L #SIM_IO,R3
JSR R3
RTS
;-----------------------------------------------------------------------
; _charget:
;-----------------------------------------------------------------------
_charget:
MOV.L #1210000h,R1
MOV.L #IO_BUF,R2
MOV.L #PARM,R3
MOV.L R2,[R3]
MOV.L R3,R2
MOV.L #SIM_IO,R3
JSR R3
MOV.L #IO_BUF,R2
MOVU.B [R2],R1
RTS
;-----------------------------------------------------------------------
; I/O Buffer
;-----------------------------------------------------------------------
.SECTION B,DATA,ALIGN=4
PARM: .BLKL 1
.SECTION B_1,DATA
IO_BUF: .BLKB 1
; .END ; Commented out for conditional assembly
; Code below is for debug console
.ELSE
;-----------------------------------------------------------------------
;
; FILE :lowlvl.src
; DATE :Wed, Jul 01, 2009
; DESCRIPTION :Program of Low level
; CPU TYPE :RX
;
;-----------------------------------------------------------------------
.GLB _charput
.GLB _charget
FC2E0 .EQU 00084080h
FE2C0 .EQU 00084090h
DBGSTAT .EQU 000840C0h
RXFL0EN .EQU 00001000h
TXFL0EN .EQU 00000100h
.SECTION P,CODE
;-----------------------------------------------------------------------
; _charput:
;-----------------------------------------------------------------------
_charput:
.STACK _charput = 00000000h
__C2ESTART: MOV.L #TXFL0EN,R3
MOV.L #DBGSTAT,R4
__TXLOOP: MOV.L [R4],R5
AND R3,R5
BNZ __TXLOOP
__WRITEFC2E0: MOV.L #FC2E0,R2
MOV.L R1,[R2]
__CHARPUTEXIT: RTS
;-----------------------------------------------------------------------
; _charget:
;-----------------------------------------------------------------------
_charget:
.STACK _charget = 00000000h
__E2CSTART: MOV.L #RXFL0EN,R3
MOV.L #DBGSTAT,R4
__RXLOOP: MOV.L [R4],R5
AND R3,R5
BZ __RXLOOP
__READFE2C0: MOV.L #FE2C0,R2
MOV.L [R2],R1
__CHARGETEXIT: RTS
;-----------------------------------------------------------------------
; End of conditional code
.ENDIF
.END

@ -0,0 +1,329 @@
/***********************************************************************/
/* */
/* FILE :lowsrc.c */
/* DATE :Wed, Jun 16, 2010 */
/* DESCRIPTION :Program of I/O Stream */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX
*
* File Name : lowsrc.c
*
* Abstract : Program of I/O Stream.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include <string.h>
#include <stdio.h>
#include <stddef.h>
#include "lowsrc.h"
/* file number */
#define STDIN 0 /* Standard input (console) */
#define STDOUT 1 /* Standard output (console) */
#define STDERR 2 /* Standard error output (console) */
#define FLMIN 0 /* Minimum file number */
#define _MOPENR 0x1
#define _MOPENW 0x2
#define _MOPENA 0x4
#define _MTRUNC 0x8
#define _MCREAT 0x10
#define _MBIN 0x20
#define _MEXCL 0x40
#define _MALBUF 0x40
#define _MALFIL 0x80
#define _MEOF 0x100
#define _MERR 0x200
#define _MLBF 0x400
#define _MNBF 0x800
#define _MREAD 0x1000
#define _MWRITE 0x2000
#define _MBYTE 0x4000
#define _MWIDE 0x8000
/* File Flags */
#define O_RDONLY 0x0001 /* Read only */
#define O_WRONLY 0x0002 /* Write only */
#define O_RDWR 0x0004 /* Both read and Write */
#define O_CREAT 0x0008 /* A file is created if it is not existed */
#define O_TRUNC 0x0010 /* The file size is changed to 0 if it is existed. */
#define O_APPEND 0x0020 /* The position is set for next reading/writing */
/* 0: Top of the file 1: End of file */
/* Special character code */
#define CR 0x0d /* Carriage return */
#define LF 0x0a /* Line feed */
#if defined( __RX )
const long _nfiles = IOSTREAM; /* The number of files for input/output files */
#else
const int _nfiles = IOSTREAM; /* The number of files for input/output files */
#endif
char flmod[IOSTREAM]; /* The location for the mode of opened file. */
unsigned char sml_buf[IOSTREAM];
#define FPATH_STDIN "C:\\stdin"
#define FPATH_STDOUT "C:\\stdout"
#define FPATH_STDERR "C:\\stderr"
/* H8 Normal mode ,SH and RX */
#if defined( __2000N__ ) || defined( __2600N__ ) || defined( __300HN__ ) || defined( _SH )
/* Output one character to standard output */
extern void charput(char);
/* Input one character from standard input */
extern char charget(void);
/* Output one character to the file */
extern char fcharput(char, unsigned char);
/* Input one character from the file */
extern char fcharget(char*, unsigned char);
/* Open the file */
extern char fileopen(char*, unsigned char, unsigned char*);
/* Close the file */
extern char fileclose(unsigned char);
/* Move the file offset */
extern char fpseek(unsigned char, long, unsigned char);
/* Get the file offset */
extern char fptell(unsigned char, long*);
/* RX */
#elif defined( __RX )
/* Output one character to standard output */
extern void charput(unsigned char);
/* Input one character from standard input */
extern unsigned char charget(void);
/* H8 Advanced mode */
#elif defined( __2000A__ ) || defined( __2600A__ ) || defined( __300HA__ ) || defined( __H8SXN__ ) || defined( __H8SXA__ ) || defined( __H8SXM__ ) || defined( __H8SXX__ )
/* Output one character to standard output */
extern void charput(char);
/* Input one character from standard input */
extern char charget(void);
/* Output one character to the file */
extern char fcharput(char, unsigned char);
/* Input one character from the file */
extern char fcharget(char*, unsigned char);
/* Open the file */
/* Specified as the number of register which stored paramter is 3 */
extern char __regparam3 fileopen(char*, unsigned char, unsigned char*);
/* Close the file */
extern char fileclose(unsigned char);
/* Move the file offset */
extern char fpseek(unsigned char, long, unsigned char);
/* Get the file offset */
extern char fptell(unsigned char, long*);
/* H8300 and H8300L */
#elif defined( __300__ ) || defined( __300L__ )
/* Output one character to standard output */
extern void charput(char);
/* Input one character from standard input */
extern char charget(void);
/* Output one character to the file */
extern char fcharput(char, unsigned char);
/* Input one character from the file */
extern char fcharget(char*, unsigned char);
/* Open the file */
/* Specified as the number of register which stored paramter is 3 */
extern char __regparam3 fileopen(char*, unsigned char, unsigned char*);
/* Close the file */
extern char fileclose(unsigned char);
/* Move the file offset */
/* Move the file offset */
extern char __regparam3 fpseek(unsigned char, long, unsigned char);
/* Get the file offset */
extern char fptell(unsigned char, long*);
#endif
#include <stdio.h>
FILE *_Files[IOSTREAM]; // structure for FILE
char *env_list[] = { // Array for environment variables(**environ)
"ENV1=temp01",
"ENV2=temp02",
"ENV9=end",
'\0' // Terminal for environment variables
};
char **environ = env_list;
/****************************************************************************/
/* _INIT_IOLIB */
/* Initialize C library Functions, if necessary. */
/* Define USES_SIMIO on Assembler Option. */
/****************************************************************************/
void _INIT_IOLIB( void )
{
/* A file for standard input/output is opened or created. Each FILE */
/* structure members are initialized by the library. Each _Buf member */
/* in it is re-set the end of buffer pointer. */
/* Standard Input File */
if( freopen( FPATH_STDIN, "r", stdin ) == NULL )
stdin->_Mode = 0xffff; /* Not allow the access if it fails to open */
stdin->_Mode = _MOPENR; /* Read only attribute */
stdin->_Mode |= _MNBF; /* Non-buffering for data */
stdin->_Bend = stdin->_Buf + 1; /* Re-set pointer to the end of buffer */
/* Standard Output File */
if( freopen( FPATH_STDOUT, "w", stdout ) == NULL )
stdout->_Mode = 0xffff; /* Not allow the access if it fails to open */
stdout->_Mode |= _MNBF; /* Non-buffering for data */
stdout->_Bend = stdout->_Buf + 1;/* Re-set pointer to the end of buffer */
/* Standard Error File */
if( freopen( FPATH_STDERR, "w", stderr ) == NULL )
stderr->_Mode = 0xffff; /* Not allow the access if it fails to open */
stderr->_Mode |= _MNBF; /* Non-buffering for data */
stderr->_Bend = stderr->_Buf + 1;/* Re-set pointer to the end of buffer */
}
/****************************************************************************/
/* _CLOSEALL */
/****************************************************************************/
void _CLOSEALL( void )
{
long i;
for( i=0; i < _nfiles; i++ )
{
/* Checks if the file is opened or not */
if( _Files[i]->_Mode & (_MOPENR | _MOPENW | _MOPENA ) )
fclose( _Files[i] ); /* Closes the file */
}
}
/**************************************************************************/
/* open:file open */
/* Return value:File number (Pass) */
/* -1 (Failure) */
/**************************************************************************/
#if defined( __RX )
long open(const char *name, /* File name */
long mode, /* Open mode */
long flg) /* Open flag */
#else
int open(char *name, /* File name */
int mode, /* Open mode */
int flg) /* Open flag */
#endif
{
if( strcmp( name, FPATH_STDIN ) == 0 ) /* Standard Input file? */
{
if( ( mode & O_RDONLY ) == 0 ) return -1;
flmod[STDIN] = mode;
return STDIN;
}
else if( strcmp( name, FPATH_STDOUT ) == 0 )/* Standard Output file? */
{
if( ( mode & O_WRONLY ) == 0 ) return -1;
flmod[STDOUT] = mode;
return STDOUT;
}
else if(strcmp(name, FPATH_STDERR ) == 0 ) /* Standard Error file? */
{
if( ( mode & O_WRONLY ) == 0 ) return -1;
flmod[STDERR] = mode;
return STDERR;
}
else return -1; /*Others */
}
#if defined( __RX )
long close( long fileno )
#else
int close( int fileno )
#endif
{
return 1;
}
/**************************************************************************/
/* write:Data write */
/* Return value:Number of write characters (Pass) */
/* -1 (Failure) */
/**************************************************************************/
#if defined( __RX )
long write(long fileno, /* File number */
const unsigned char *buf, /* The address of destination buffer */
long count) /* The number of chacter to write */
#else
int write(int fileno, /* File number */
char *buf, /* The address of destination buffer */
int count) /* The number of chacter to write */
#endif
{
long i; /* A variable for counter */
unsigned char c; /* An output character */
/* Checking the mode of file , output each character */
/* Checking the attribute for Write-Only, Read-Only or Read-Write */
if(flmod[fileno]&O_WRONLY || flmod[fileno]&O_RDWR)
{
if( fileno == STDIN ) return -1; /* Standard Input */
else if( (fileno == STDOUT) || (fileno == STDERR) )
/* Standard Error/output */
{
for( i = count; i > 0; --i )
{
c = *buf++;
charput(c);
}
return count; /*Return the number of written characters */
}
else return -1; /* Incorrect file number */
}
else return -1; /* An error */
}
#if defined( __RX )
long read( long fileno, unsigned char *buf, long count )
#else
int read( int fileno, char *buf, unsigned int count )
#endif
{
long i;
/* Checking the file mode with the file number, each character is input and stored the buffer */
if((flmod[fileno]&_MOPENR) || (flmod[fileno]&O_RDWR)){
for(i = count; i > 0; i--){
*buf = charget();
if(*buf==CR){ /* Replace the new line character */
*buf = LF;
}
buf++;
}
return count;
}
else {
return -1;
}
}
#if defined( __RX )
long lseek( long fileno, long offset, long base )
#else
long lseek( int fileno, long offset, int base )
#endif
{
return -1L;
}

@ -0,0 +1,129 @@
/***********************************************************************/
/* */
/* FILE :resetprg.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Reset Program */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : resetprg.c
*
* Abstract : Reset Program.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include <machine.h>
#include <_h_c_lib.h>
//#include <stddef.h> // Remove the comment when you use errno
//#include <stdlib.h> // Remove the comment when you use rand()
#include "typedefine.h"
#include "stacksct.h"
#pragma inline_asm Change_PSW_PM_to_UserMode
static void Change_PSW_PM_to_UserMode(void);
#ifdef __cplusplus
extern "C" {
#endif
void PowerON_Reset_PC(void);
void main(void);
#ifdef __cplusplus
}
#endif
#ifdef __cplusplus // Use SIM I/O
extern "C" {
#endif
extern void _INIT_IOLIB(void);
extern void _CLOSEALL(void);
#ifdef __cplusplus
}
#endif
#define PSW_init 0x00010000
#define FPSW_init 0x00000100
//extern void srand(_UINT); // Remove the comment when you use rand()
//extern _SBYTE *_s1ptr; // Remove the comment when you use strtok()
//#ifdef __cplusplus // Use Hardware Setup
//extern "C" {
//#endif
//extern void HardwareSetup(void);
//#ifdef __cplusplus
//}
//#endif
//#ifdef __cplusplus // Remove the comment when you use global class object
//extern "C" { // Sections C$INIT and C$END will be generated
//#endif
//extern void _CALL_INIT(void);
//extern void _CALL_END(void);
//#ifdef __cplusplus
//}
//#endif
#pragma section ResetPRG
#pragma entry PowerON_Reset_PC
void PowerON_Reset_PC(void)
{
set_intb((unsigned long)__sectop("C$VECT"));
set_fpsw(FPSW_init);
_INITSCT();
// _INIT_IOLIB(); // Remove the comment when you use SIM I/O
// errno=0; // Remove the comment when you use errno
// srand((_UINT)1); // Remove the comment when you use rand()
// _s1ptr=NULL; // Remove the comment when you use strtok()
// HardwareSetup(); // Use Hardware Setup
nop();
// _CALL_INIT(); // Remove the comment when you use global class object
set_psw(PSW_init); // Set Ubit & Ibit for PSW
// Change_PSW_PM_to_UserMode(); // DO NOT CHANGE TO USER MODE IF USING FREERTOS!
( void ) Change_PSW_PM_to_UserMode; // Just to avoid compiler warnings.
main();
// _CLOSEALL(); // Use SIM I/O
// _CALL_END(); // Remove the comment when you use global class object
brk();
}
static void Change_PSW_PM_to_UserMode(void)
{
MVFC PSW,R1
OR #00100000h,R1
PUSH.L R1
MVFC PC,R1
ADD #10,R1
PUSH.L R1
RTE
NOP
NOP
}

@ -0,0 +1,28 @@
#include <stddef.h>
#include <stdio.h>
#define HEAPSIZE 0x400
signed char *sbrk( size_t size );
union HEAP_TYPE
{
signed long dummy;
signed char heap[HEAPSIZE];
};
static union HEAP_TYPE heap_area;
/* End address allocated by sbrk */
static signed char *brk = ( signed char * ) &heap_area;
signed char *sbrk( size_t size )
{
signed char *p;
if( brk + size > heap_area.heap + HEAPSIZE )
{
p = ( signed char * ) - 1;
}
else
{
p = brk;
brk += size;
}
return p;
}

@ -0,0 +1,64 @@
/***********************************************************************/
/* */
/* FILE :vecttbl.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Initialize of Vector Table */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : vecttbl.c
*
* Abstract : Initialize of Vector Table.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include "vect.h"
#pragma section C FIXEDVECT
void* const Fixed_Vectors[] = {
//;0xffffffd0 Exception(Supervisor Instruction)
(void*) Excep_SuperVisorInst,
//;0xffffffd4 Reserved
Dummy,
//;0xffffffd8 Reserved
Dummy,
//;0xffffffdc Exception(Undefined Instruction)
(void*) Excep_UndefinedInst,
//;0xffffffe0 Reserved
Dummy,
//;0xffffffe4 Exception(Floating Point)
(void*) Excep_FloatingPoint,
//;0xffffffe8 Reserved
Dummy,
//;0xffffffec Reserved
Dummy,
//;0xfffffff0 Reserved
Dummy,
//;0xfffffff4 Reserved
Dummy,
//;0xfffffff8 NMI
(void*) NonMaskableInterrupt,
//;0xfffffffc RESET
//;<<VECTOR DATA START (POWER ON RESET)>>
//;Power On Reset PC
PowerON_Reset_PC
//;<<VECTOR DATA END (POWER ON RESET)>>
};

@ -0,0 +1,568 @@
[HIMDBVersion]
2.0
[DATABASE_VERSION]
"2.3"
[SESSION_DETAILS]
""
[INFORMATION]
""
[GENERAL_DATA]
"FIRST_CONNECTION_TAG" "NO"
"MRULABELS_DATAMANAGER_KEY" "108a|FFFFFFFF|00000000|1054|fff8cd9e|1050|fff8c484|88218|000870B4|000870AE|88204|88208|18b8"
"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG"
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT01" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT02" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT03" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT04" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT05" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT06" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT07" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT08" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT09" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT10" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT_DEFINE_FILE" ""
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT_DEFINE_SELETCT" "1"
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT_MODIFIED" "1"
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT_NOREAD_OSOBJECT" "0"
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT_SAMPLING_PERIOD" "100"
"{228DB593-0AB2-4EBE-A098-A2CABF094E46}RamMonitorCtrlViews" "0"
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlECX_MAP_FIND_SYMBOL_LIST" ""
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlViews" "0"
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}ECXLABEL_ADDDLG_ADDR" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlSymbolFileDir" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlSymbolFileName" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlViews" "0"
"{2BA6A3EF-6488-11D5-80D4-00C04F68EAD7}StatusCtrlViews" "0"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBatchFileName" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointFlag" "-1 "
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointStatus" "-1 "
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBrowseDirectory" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlLogFileName" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlSplitterPosition" "242"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlViews" "1"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlWindowProperties" "17"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineWndInstanceKey0" "{WK_00000001_CmdLine}"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}TclTkCtrlLogFileName" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_COMPARE_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_COMPARE_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_DEST_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_FILL_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_FILL_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_MOVE_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_MOVE_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SEARCH_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SEARCH_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SET_DEST_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_TEST_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_TEST_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryCtrlViews" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0AutoRefreshEnableTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0AutoRefreshIntervalTopPane" "100"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DataLength" "4"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DispAddressTopPane" "4180"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DispCode" "42208"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DispColumnCount" "4"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsDispCode" "1"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsDispFloat" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsDispLabel" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsDispRegister" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsRegFollowEnableTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0LabelWidth" "96"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0Radix" "16"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0RegFollowRegTblIDTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0RegisterWidth" "96"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0ScrollEndAddress" "-1"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0ScrollStartAddress" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0StartUpSymbolTopPane" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewAInstanceKey0" "{WK_00000001_MEMORY}RTOSDemoSessionRX600_E1_E20_SYSTEM"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0AutoRefreshEnableTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0AutoRefreshIntervalTopPane" "100"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DataLength" "4"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DispAddressTopPane" "4180"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DispCode" "42208"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DispColumnCount" "4"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsDispCode" "1"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsDispFloat" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsDispLabel" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsDispRegister" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsRegFollowEnableTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0LabelWidth" "96"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0Radix" "16"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0RegFollowRegTblIDTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0RegisterWidth" "96"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0ScrollEndAddress" "-1"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0ScrollStartAddress" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0StartUpSymbolTopPane" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewBInstanceKey0" "{WK_00000001_MEMORY}RTOSDemoSessionRX600_E1_E20_SYSTEMViewB"
"{4F025ABC-BE66-4CB6-9CEE-06C61418278E}Trace2CtrlSaveFileDir" ""
"{4F025ABC-BE66-4CB6-9CEE-06C61418278E}Trace2CtrlSaveFileName" ""
"{4F025ABC-BE66-4CB6-9CEE-06C61418278E}Trace2CtrlViews" "0"
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlSaveFileDir" ""
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlSaveFileName" ""
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlViews" "0"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_EVAL_DENORMAL_MODE" "16777216"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_EVAL_ROUND_MODE" "768"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_0" "0000000000007500"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_1" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_10" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_11" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_12" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_13" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_14" "00000000C4658E35"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_15" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_16" "0000000000007500"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_17" "000000000000C378"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_18" "0000000000030000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_19" "00000000FFE02C63"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_2" "00000000CA0A613B"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_20" "00000000FFE01388"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_21" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_22" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_23" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_24" "0000000040000100"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_25" "00008A613AE30000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_3" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_4" "000000000000FEEE"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_5" "000000000000FEED"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_6" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_7" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_8" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_9" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_COUNT" "26"
"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileDir" ""
"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileName" ""
"{743E9BC2-6B9D-44A5-A5B6-F8C3FF2C1CAD}GraphCtrlViews" "0"
"{743E9BC2-6B9D-44A5-A5B6-F8C3FF2C1CAD}GraphWnd_Close_Count" "0"
"{743E9BC2-6B9D-44A5-A5B6-F8C3FF2C1CAD}GraphWnd_Mode" "1"
"{743E9BC2-6B9D-44A5-A5B6-F8C3FF2C1CAD}GraphWnd_Trace_Mode" "0"
"{7943C44E-7D44-422A-9140-4CF55C88F7D3}DifferenceCtrlViews" "0"
"{855C64C3-E49C-4450-9BCA-C9822566D214}OSObjectCtrlViews" "0"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE" "00000000,00000000,0,0"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_ADDRESS_NAME" ""
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_COMB_ADDRESS" ",,,,"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_COMB_BUFFER" ",,,,"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_SAMPLING_RATE" "1000"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}WaveformCtrlViews" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersCtrlViews" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ColumnWidth" "47,153,35"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ECX_REGISTER_COUNT" "33"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ECX_REGISTER_DISPLAYED" "1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0HideFLAGs" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0HideRadix" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0LastFileName" ""
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0RadixList" "16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,2,16,16,16,16,16,16,16,"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndInstanceKey0" "{WK_00000001_REGISTERS}RTOSDemoSessionRX600_E1_E20_SYSTEM"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0ColumnWidth" "47,153,35"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0ECX_REGISTER_COUNT" "33"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0ECX_REGISTER_DISPLAYED" "1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0HideFLAGs" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0HideRadix" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0LastFileName" ""
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0RadixList" "16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,2,16,16,16,16,16,16,16,"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewBInstanceKey0" "{WK_00000001_REGISTERS}RTOSDemoSessionRX600_E1_E20_SYSTEMViewB"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_ADDRESS_NAME" ""
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_BUFFER" "00000000,00000000,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COLOR" "0,0,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COMB_ADDRESS" ",,,,"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COMB_PALETTE" ",,,,"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_PALETTE_NAME" ""
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_REDRAW_CONTINUOUSLY" "0,2"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_SAMPLEING_RATE" "1000"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_VIEW" "0,0,0,0,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ImageCtrlViews" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchCtrlViews" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth0" "207"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth1" "182"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth12" "116"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth2" "89"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth3" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0000" "pxCurrentRxDesc, 10, 0, P, Col, Hex, N"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0000_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0001" "*, 11, 0, C0000, Exp, Hex, MN"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0001_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0002" "status, 2, 0, C0001, Col, Hex, MN"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0002_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0003" "size, 2, 0, C0001, Col, Hex, MN"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0003_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0004" "bufsize, 2, 0, C0001, Col, Hex, MN"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0004_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0005" "buf_p, 4, 0, C0001, Col, Hex, MN"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0005_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0006" "next, 4, 0, C0001, Col, Hex, MN"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEMCnt" "1"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth0" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth1" "150"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth12" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth2" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth3" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ECX_WATCH_ITEMCnt" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth0" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth1" "150"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth12" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth2" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth3" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ECX_WATCH_ITEMCnt" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ColWidth0" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ColWidth1" "150"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ColWidth12" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ColWidth2" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ColWidth3" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ECX_WATCH_ITEMCnt" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndInitial_Radix" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndInstanceKey0" "{WK_00000001_WATCH}RTOSDemoSessionRX600_E1_E20_SYSTEM"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndRecentFile_WatchRecord" ""
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndRecentFile_WatchSave" ""
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndUpdate_Interval" "100"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlDCEnable" "1"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlLocalEchoEnable" "1"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlLogFileName" ""
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlPortBaudIndex" "0"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlPortName" ""
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlSendDataTimeout" "50"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlViews" "1"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleWndInstanceKey0" "{WK_00000001_DEBUGCONSOLE}"
"{B6AE2E1F-5221-4A44-91C2-8C3097B41A69}StartStopCheckAfter" "0"
"{B6AE2E1F-5221-4A44-91C2-8C3097B41A69}StartStopCheckBefore" "0"
"{B6AE2E1F-5221-4A44-91C2-8C3097B41A69}StartStopExpAfter" ""
"{B6AE2E1F-5221-4A44-91C2-8C3097B41A69}StartStopExpBefore" ""
"{B6AE2E1F-5221-4A44-91C2-8C3097B41A69}T_SESSION_IS_SAVED" "YES"
"{CBEBB610-1516-11D4-8F2D-00409545B67B}ElfDwarf2Objects" "1"
"{CBEBB610-1516-11D4-8F2D-00409545B67B}LoadModule0OBJ_ELFDWARF2_ARRAY_EXPAND_LIMIT" "-1"
"{CBEBB610-1516-11D4-8F2D-00409545B67B}LoadModule0OBJ_ELFDWARF2_STATIC_MEM_EXPAND" "1"
"{EEDC9300-6FBE-11D5-8613-00A024591A38}LocalsCtrlViews" "0"
"{EEDC9301-6FBE-11D5-8613-00A024591A38}StackTraceCtrlViews" "0"
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOCtrlIOFile" ""
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[WINDOW_Z_ORDER]
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[STATUSBAR_STATEINFO_VD3]
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"ApplicationShowState" 1
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[STATUSBAR_STATEINFO_VD4]
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[STATUSBAR_DEBUGGER_PANESTATE_VD3]
[STATUSBAR_DEBUGGER_PANESTATE_VD4]
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""
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"$(CONFIGDIR)\$(PROJECTNAME).abs" 0 "Elf/Dwarf2" 0 1 1 0
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"TRUE"
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[LIMIT_DISASSEMBLY_MEMORY_ACCESS]
"FALSE"
[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]
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"0.000000" 0 0 "" 0 "" 0 0 "" 1 1 0 0 0 0 0 "" "" "" "" ""
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@ -0,0 +1,41 @@
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Device=R5F5630E
McuFileDir=RX630Gr
SupplyVoltage=0
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FineClock=1500000
FineClockValue=1500000
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HideNext=0
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EXTAL=12.0000
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PerfCounterUser=0
TraceDebugAs=0
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[CFG_FLASHCLEAR_R5F562N8_00]
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@ -0,0 +1,344 @@
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2.0
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[LANGUAGE]
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[CONFIG_INFO_VD1]
1
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0
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[DOWNLOAD_MODULES]
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[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]
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[END]

@ -0,0 +1,5 @@
Project name : RTOSDemo
Renesas RX Standard Toolchain 1.0.2.0 was upgraded to
Renesas RX Standard Toolchain 1.1.0.0.

@ -0,0 +1,62 @@
/*
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef INT_QUEUE_TIMER_H
#define INT_QUEUE_TIMER_H
void vInitialiseTimerForIntQueueTest( void );
portBASE_TYPE xTimer0Handler( void );
portBASE_TYPE xTimer1Handler( void );
#endif

File diff suppressed because it is too large Load Diff

@ -0,0 +1,13 @@
/***********************************************************************/
/* */
/* FILE :lowsrc.h */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Header file of I/O Stream file */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*Number of I/O Stream*/
#define IOSTREAM 20

@ -0,0 +1,95 @@
/******************************************************************************
* DISCLAIMER
* Please refer to http://www.renesas.com/disclaimer
******************************************************************************
Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : rskrx630def.h
* Version : 1.00
* Description : RSK RX630 board specific settings
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 06.10.2009 1.00 First Release
******************************************************************************/
#ifndef RSKRX630_H
#define RSKRX630_H
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
#include "cgc.h"
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/* System Clock Settings */
/* Clock settings defined in CGC_SET.H */
#if 0
#define XTAL_FREQUENCY (12000000L)
#define ICLK_MUL (8)
#define PCLK_MUL (4)
#define BCLK_MUL (4)
#define ICLK_FREQUENCY (XTAL_FREQUENCY * ICLK_MUL)
#define PCLK_FREQUENCY (XTAL_FREQUENCY * PCLK_MUL)
#define BCLK_FREQUENCY (XTAL_FREQUENCY * BCLK_MUL)
#endif
#define CMT0_CLK_SELECT (512)
/* General Values */
#define LED_ON (0)
#define LED_OFF (1)
#define SET_BIT_HIGH (1)
#define SET_BIT_LOW (0)
#define SET_BYTE_HIGH (0xFF)
#define SET_BYTE_LOW (0x00)
/* Define switches to be polled if not available as interrupts */
#define SW_ACTIVE FALSE
#define SW1 PORT3.PODR.BIT.B2
#define SW2 PORT4.PODR.BIT.B4
#define SW3 PORT0.PODR.BIT.B7
#define SW1_PDR PORT3.PDR.BIT.B2
#define SW2_PDR PORT4.PDR.BIT.B4
#define SW3_PDR PORT0.PDR.BIT.B7
/* LEDs */
#define LED0 PORTC.PODR.BIT.B5
#define LED1 PORT2.PODR.BIT.B4
#define LED2 PORTC.PODR.BIT.B2
#define LED3 PORT1.PODR.BIT.B7
#define LED0_PDR PORTC.PDR.BIT.B5
#define LED1_PDR PORT2.PDR.BIT.B4
#define LED2_PDR PORTC.PDR.BIT.B2
#define LED3_PDR PORT1.PDR.BIT.B7
/* 2x8 segment LCD */
#define LCD_RS PORTJ.PODR.BIT.B3
#define LCD_EN PORT3.PODR.BIT.B3
#define LCD_DATA PORTE.PODR.BYTE
#define LCD_RS_PDR PORTJ.PDR.BIT.B3
#define LCD_EN_PDR PORT3.PDR.BIT.B3
#define LCD_DATA_PDR PORTE.PDR.BYTE
/******************************************************************************
Variable Externs
******************************************************************************/
/******************************************************************************
Functions Prototypes
******************************************************************************/
/* RSKRX62N_H */
#endif

@ -0,0 +1,13 @@
/***********************************************************************/
/* */
/* FILE :stacksct.h */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Setting of Stack area */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
#pragma stacksize su=0x300
#pragma stacksize si=0x100

@ -0,0 +1,41 @@
/***********************************************************************/
/* */
/* FILE :typedefine.h */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Aliases of Integer Type */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX
*
* File Name : typedefine.h
*
* Abstract : Aliases of Integer Type.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
typedef signed char _SBYTE;
typedef unsigned char _UBYTE;
typedef signed short _SWORD;
typedef unsigned short _UWORD;
typedef signed int _SINT;
typedef unsigned int _UINT;
typedef signed long _SDWORD;
typedef unsigned long _UDWORD;
typedef signed long long _SQWORD;
typedef unsigned long long _UQWORD;

@ -0,0 +1,60 @@
/***********************************************************************/
/* */
/* FILE :vect.h */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Definition of Vector */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : vect.h
*
* Abstract : Definition of Vector.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
// Exception(Supervisor Instruction)
#pragma interrupt (Excep_SuperVisorInst)
void Excep_SuperVisorInst(void);
// Exception(Undefined Instruction)
#pragma interrupt (Excep_UndefinedInst)
void Excep_UndefinedInst(void);
// Exception(Floating Point)
#pragma interrupt (Excep_FloatingPoint)
void Excep_FloatingPoint(void);
// NMI
#pragma interrupt (NonMaskableInterrupt)
void NonMaskableInterrupt(void);
// Dummy
#pragma interrupt (Dummy)
void Dummy(void);
// BRK
#pragma interrupt (Excep_BRK(vect=0))
void Excep_BRK(void);
//;<<VECTOR DATA START (POWER ON RESET)>>
//;Power On Reset PC
extern void PowerON_Reset_PC(void);
//;<<VECTOR DATA END (POWER ON RESET)>>

@ -0,0 +1,222 @@
/*
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* This is a very simple demo that creates two tasks and one queue. One task
* (the queue receive task) blocks on the queue to wait for data to arrive,
* toggling an LED each time '100' is received. The other task (the queue send
* task) repeatedly blocks for a fixed period before sending '100' to the queue
* (causing the first task to toggle the LED).
*
* For a much more complete and complex example select either the Debug or
* Debug_with_optimisation build configurations within the HEW IDE.
*/
/* Hardware specific includes. */
#include "iodefine.h"
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"
/* Priorities at which the tasks are created. */
#define configQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define configQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
/* The rate at which data is sent to the queue, specified in milliseconds. */
#define mainQUEUE_SEND_FREQUENCY_MS ( 500 / portTICK_RATE_MS )
/* The number of items the queue can hold. This is 1 as the receive task
will remove items as they are added so the send task should always find the
queue empty. */
#define mainQUEUE_LENGTH ( 1 )
/*
* The tasks as defined at the top of this file.
*/
static void prvQueueReceiveTask( void *pvParameters );
static void prvQueueSendTask( void *pvParameters );
/* The queue used by both tasks. */
static xQueueHandle xQueue = NULL;
/* This variable is not used by this simple Blinky example. It is defined
purely to allow the project to link as it is used by the full project. */
volatile unsigned long ulHighFrequencyTickCount = 0UL;
/*-----------------------------------------------------------*/
void main(void)
{
extern void HardwareSetup( void );
/* Renesas provided CPU configuration routine. The clocks are configured in
here. */
HardwareSetup();
/* Turn all LEDs off. */
vParTestInitialise();
/* Create the queue. */
xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );
if( xQueue != NULL )
{
/* Start the two tasks as described at the top of this file. */
xTaskCreate( prvQueueReceiveTask, "Rx", configMINIMAL_STACK_SIZE, NULL, configQUEUE_RECEIVE_TASK_PRIORITY, NULL );
xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, configQUEUE_SEND_TASK_PRIORITY, NULL );
/* Start the tasks running. */
vTaskStartScheduler();
}
/* If all is well we will never reach here as the scheduler will now be
running. If we do reach here then it is likely that there was insufficient
heap available for the idle task to be created. */
for( ;; );
}
/*-----------------------------------------------------------*/
static void prvQueueSendTask( void *pvParameters )
{
portTickType xNextWakeTime;
const unsigned long ulValueToSend = 100UL;
/* Initialise xNextWakeTime - this only needs to be done once. */
xNextWakeTime = xTaskGetTickCount();
for( ;; )
{
/* Place this task in the blocked state until it is time to run again.
The block state is specified in ticks, the constant used converts ticks
to ms. */
vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
/* Send to the queue - causing the queue receive task to flash its LED. 0
is used so the send does not block - it shouldn't need to as the queue
should always be empty here. */
xQueueSend( xQueue, &ulValueToSend, 0 );
}
}
/*-----------------------------------------------------------*/
static void prvQueueReceiveTask( void *pvParameters )
{
unsigned long ulReceivedValue;
for( ;; )
{
/* Wait until something arives in the queue - this will block
indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
FreeRTOSConfig.h. */
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
/* To get here something must have arrived, but is it the expected
value? If it is, toggle the LED. */
if( ulReceivedValue == 100UL )
{
vParTestToggleLED( 0 );
}
}
}
/*-----------------------------------------------------------*/
void vApplicationSetupTimerInterrupt( void )
{
/* Enable compare match timer 0. */
MSTP( CMT0 ) = 0;
/* Interrupt on compare match. */
CMT0.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 );
/* Divide the PCLK by 8. */
CMT0.CMCR.BIT.CKS = 0;
/* Enable the interrupt... */
_IEN( _CMT0_CMI0 ) = 1;
/* ...and set its priority to the application defined kernel priority. */
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the timer. */
CMT.CMSTR0.BIT.STR0 = 1;
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationMallocFailedHook( void )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationIdleHook( void )
{
/* Just to prevent the variable getting optimised away. */
( void ) ulHighFrequencyTickCount;
}
/*-----------------------------------------------------------*/

@ -0,0 +1,654 @@
/*
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* ****************************************************************************
* This project includes a lot of tasks and tests and is therefore complex.
* If you would prefer a much simpler project to get started with then select
* the 'Blinky' build configuration within the HEW IDE.
* ****************************************************************************
*
* Creates all the demo application tasks, then starts the scheduler. The web
* documentation provides more details of the standard demo application tasks,
* which provide no particular functionality but do provide a good example of
* how to use the FreeRTOS API. The tasks defined in flop.c are included in the
* set of standard demo tasks to ensure the floating point unit gets some
* exercise.
*
* In addition to the standard demo tasks, the following tasks and tests are
* defined and/or created within this file:
*
* "Reg test" tasks - These fill the registers with known values, then check
* that each register still contains its expected value. Each task uses
* different values. The tasks run with very low priority so get preempted
* very frequently. A check variable is incremented on each iteration of the
* test loop. A register containing an unexpected value is indicative of an
* error in the context switching mechanism and will result in a branch to a
* null loop - which in turn will prevent the check variable from incrementing
* any further and allow the check task (described below) to determine that an
* error has occurred. The nature of the reg test tasks necessitates that they
* are written in assembly code.
*
* "Check" task - This only executes every five seconds but has a high priority
* to ensure it gets processor time. Its main function is to check that all the
* standard demo tasks are still operational. While no errors have been
* discovered the check task will toggle LED 5 every 5 seconds - the toggle
* rate increasing to 200ms being a visual indication that at least one task has
* reported unexpected behaviour.
*
* "High frequency timer test" - A high frequency periodic interrupt is
* generated using a timer - the interrupt is assigned a priority above
* configMAX_SYSCALL_INTERRUPT_PRIORITY so should not be effected by anything
* the kernel is doing. The frequency and priority of the interrupt, in
* combination with other standard tests executed in this demo, should result
* in interrupts nesting at least 3 and probably 4 deep. This test is only
* included in build configurations that have the optimiser switched on. In
* optimised builds the count of high frequency ticks is used as the time base
* for the run time stats.
*
* *NOTE 1* If LED3 is toggling every 5 seconds then all the demo application
* tasks are executing as expected and no errors have been reported in any
* tasks. The toggle rate increasing to 200ms indicates that at least one task
* has reported unexpected behaviour.
*
* *NOTE 2* vApplicationSetupTimerInterrupt() is called by the kernel to let
* the application set up a timer to generate the tick interrupt. In this
* example a compare match timer is used for this purpose.
*
* *NOTE 3* The CPU must be in Supervisor mode when the scheduler is started.
* The PowerON_Reset_PC() supplied in resetprg.c with this demo has
* Change_PSW_PM_to_UserMode() commented out to ensure this is the case.
*
* *NOTE 4* The IntQueue common demo tasks test interrupt nesting and make use
* of all the 8bit timers (as two cascaded 16bit units).
*/
/* Hardware specific includes. */
#include "iodefine.h"
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard demo includes. */
#include "partest.h"
#include "flash.h"
#include "IntQueue.h"
#include "BlockQ.h"
#include "death.h"
#include "integer.h"
#include "blocktim.h"
#include "semtest.h"
#include "PollQ.h"
#include "GenQTest.h"
#include "QPeek.h"
#include "recmutex.h"
#include "flop.h"
/* Values that are passed into the reg test tasks using the task parameter. The
tasks check that the values are passed in correctly. */
#define mainREG_TEST_1_PARAMETER ( 0x12121212UL )
#define mainREG_TEST_2_PARAMETER ( 0x12345678UL )
/* Priorities at which the tasks are created. */
#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainFLASH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainuIP_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY )
#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
/* The WEB server uses string handling functions, which in turn use a bit more
stack than most of the other tasks. */
#define mainuIP_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3 )
/* The LED toggled by the check task. */
#define mainCHECK_LED ( 3 )
/* The rate at which mainCHECK_LED will toggle when all the tasks are running
without error. Controlled by the check task as described at the top of this
file. */
#define mainNO_ERROR_CYCLE_TIME ( 5000 / portTICK_RATE_MS )
/* The rate at which mainCHECK_LED will toggle when an error has been reported
by at least one task. Controlled by the check task as described at the top of
this file. */
#define mainERROR_CYCLE_TIME ( 200 / portTICK_RATE_MS )
/*
* vApplicationMallocFailedHook() will only be called if
* configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook
* function that will execute if a call to pvPortMalloc() fails.
* pvPortMalloc() is called internally by the kernel whenever a task, queue or
* semaphore is created. It is also called by various parts of the demo
* application.
*/
void vApplicationMallocFailedHook( void );
/*
* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set to 1
* in FreeRTOSConfig.h. It is a hook function that is called on each iteration
* of the idle task. It is essential that code added to this hook function
* never attempts to block in any way (for example, call xQueueReceive() with
* a block time specified). If the application makes use of the vTaskDelete()
* API function (as this demo application does) then it is also important that
* vApplicationIdleHook() is permitted to return to its calling function because
* it is the responsibility of the idle task to clean up memory allocated by the
* kernel to any task that has since been deleted.
*/
void vApplicationIdleHook( void );
/*
* vApplicationStackOverflowHook() will only be called if
* configCHECK_FOR_STACK_OVERFLOW is set to a non-zero value. The handle and
* name of the offending task should be passed in the function parameters, but
* it is possible that the stack overflow will have corrupted these - in which
* case pxCurrentTCB can be inspected to find the same information.
*/
void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName );
/*
* The reg test tasks as described at the top of this file.
*/
static void prvRegTest1Task( void *pvParameters );
static void prvRegTest2Task( void *pvParameters );
/*
* The actual implementation of the reg test functionality, which, because of
* the direct register access, have to be in assembly.
*/
static void prvRegTest1Implementation( void );
static void prvRegTest2Implementation( void );
/*
* The check task as described at the top of this file.
*/
static void prvCheckTask( void *pvParameters );
/*
* Contains the implementation of the WEB server.
*/
extern void vuIP_Task( void *pvParameters );
/*-----------------------------------------------------------*/
/* Variables that are incremented on each iteration of the reg test tasks -
provided the tasks have not reported any errors. The check task inspects these
variables to ensure they are still incrementing as expected. If a variable
stops incrementing then it is likely that its associate task has stalled. */
unsigned long ulRegTest1CycleCount = 0UL, ulRegTest2CycleCount = 0UL;
/* The status message that is displayed at the bottom of the "task stats" web
page, which is served by the uIP task. This will report any errors picked up
by the reg test task. */
const char *pcStatusMessage = "All tasks executing without error.";
/*-----------------------------------------------------------*/
void main(void)
{
extern void HardwareSetup( void );
/* Renesas provided CPU configuration routine. The clocks are configured in
here. */
HardwareSetup();
/* Turn all LEDs off. */
vParTestInitialise();
/* Start the reg test tasks which test the context switching mechanism. */
xTaskCreate( prvRegTest1Task, "RegTst1", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_1_PARAMETER, tskIDLE_PRIORITY, NULL );
xTaskCreate( prvRegTest2Task, "RegTst2", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_2_PARAMETER, tskIDLE_PRIORITY, NULL );
/* Start the check task as described at the top of this file. */
xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE * 3, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Create the standard demo tasks. */
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vCreateBlockTimeTasks();
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );
vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );
vStartLEDFlashTasks( mainFLASH_TASK_PRIORITY );
vStartQueuePeekTasks();
vStartRecursiveMutexTasks();
vStartInterruptQueueTasks();
vStartMathTasks( mainFLOP_TASK_PRIORITY );
/* The suicide tasks must be created last as they need to know how many
tasks were running prior to their creation in order to ascertain whether
or not the correct/expected number of tasks are running at any given time. */
vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
/* Start the tasks running. */
vTaskStartScheduler();
/* If all is well we will never reach here as the scheduler will now be
running. If we do reach here then it is likely that there was insufficient
heap available for the idle task to be created. */
for( ;; );
}
/*-----------------------------------------------------------*/
static void prvCheckTask( void *pvParameters )
{
static volatile unsigned long ulLastRegTest1CycleCount = 0UL, ulLastRegTest2CycleCount = 0UL;
portTickType xNextWakeTime, xCycleFrequency = mainNO_ERROR_CYCLE_TIME;
extern void vSetupHighFrequencyTimer( void );
/* If this is being executed then the kernel has been started. Start the high
frequency timer test as described at the top of this file. This is only
included in the optimised build configuration - otherwise it takes up too much
CPU time and can disrupt other tests. */
#ifdef INCLUDE_HIGH_FREQUENCY_TIMER_TEST
vSetupHighFrequencyTimer();
#endif
/* Initialise xNextWakeTime - this only needs to be done once. */
xNextWakeTime = xTaskGetTickCount();
for( ;; )
{
/* Place this task in the blocked state until it is time to run again. */
vTaskDelayUntil( &xNextWakeTime, xCycleFrequency );
/* Check the standard demo tasks are running without error. */
if( xAreGenericQueueTasksStillRunning() != pdTRUE )
{
/* Increase the rate at which this task cycles, which will increase the
rate at which mainCHECK_LED flashes to give visual feedback that an error
has occurred. */
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: GenQueue";
}
else if( xAreQueuePeekTasksStillRunning() != pdTRUE )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: QueuePeek";
}
else if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: BlockQueue";
}
else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: BlockTime";
}
else if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: SemTest";
}
else if( xArePollingQueuesStillRunning() != pdTRUE )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: PollQueue";
}
else if( xIsCreateTaskStillRunning() != pdTRUE )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: Death";
}
else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: IntMath";
}
else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: RecMutex";
}
else if( xAreIntQueueTasksStillRunning() != pdPASS )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: IntQueue";
}
else if( xAreMathsTaskStillRunning() != pdPASS )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: Flop";
}
/* Check the reg test tasks are still cycling. They will stop incrementing
their loop counters if they encounter an error. */
if( ulRegTest1CycleCount == ulLastRegTest1CycleCount )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: RegTest1";
}
if( ulRegTest2CycleCount == ulLastRegTest2CycleCount )
{
xCycleFrequency = mainERROR_CYCLE_TIME;
pcStatusMessage = "Error: RegTest2";
}
ulLastRegTest1CycleCount = ulRegTest1CycleCount;
ulLastRegTest2CycleCount = ulRegTest2CycleCount;
/* Toggle the check LED to give an indication of the system status. If
the LED toggles every 5 seconds then everything is ok. A faster toggle
indicates an error. */
vParTestToggleLED( mainCHECK_LED );
}
}
/*-----------------------------------------------------------*/
/* The RX port uses this callback function to configure its tick interrupt.
This allows the application to choose the tick interrupt source. */
void vApplicationSetupTimerInterrupt( void )
{
/* Enable compare match timer 0. */
MSTP( CMT0 ) = 0;
/* Interrupt on compare match. */
CMT0.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 );
/* Divide the PCLK by 8. */
CMT0.CMCR.BIT.CKS = 0;
/* Enable the interrupt... */
_IEN( _CMT0_CMI0 ) = 1;
/* ...and set its priority to the application defined kernel priority. */
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the timer. */
CMT.CMSTR0.BIT.STR0 = 1;
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationMallocFailedHook( void )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationIdleHook( void )
{
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
static void prvRegTest1Task( void *pvParameters )
{
if( ( ( unsigned long ) pvParameters ) != mainREG_TEST_1_PARAMETER )
{
/* The parameter did not contain the expected value. */
for( ;; )
{
/* Stop the tick interrupt so its obvious something has gone wrong. */
taskDISABLE_INTERRUPTS();
}
}
/* This is an inline asm function that never returns. */
prvRegTest1Implementation();
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
static void prvRegTest2Task( void *pvParameters )
{
if( ( ( unsigned long ) pvParameters ) != mainREG_TEST_2_PARAMETER )
{
/* The parameter did not contain the expected value. */
for( ;; )
{
/* Stop the tick interrupt so its obvious something has gone wrong. */
taskDISABLE_INTERRUPTS();
}
}
/* This is an inline asm function that never returns. */
prvRegTest2Implementation();
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
#pragma inline_asm prvRegTest1Implementation
static void prvRegTest1Implementation( void )
{
; Put a known value in each register.
MOV.L #1, R1
MOV.L #2, R2
MOV.L #3, R3
MOV.L #4, R4
MOV.L #5, R5
MOV.L #6, R6
MOV.L #7, R7
MOV.L #8, R8
MOV.L #9, R9
MOV.L #10, R10
MOV.L #11, R11
MOV.L #12, R12
MOV.L #13, R13
MOV.L #14, R14
MOV.L #15, R15
; Loop, checking each itteration that each register still contains the
; expected value.
TestLoop1:
; Push the registers that are going to get clobbered.
PUSHM R14-R15
; Increment the loop counter to show this task is still getting CPU time.
MOV.L #_ulRegTest1CycleCount, R14
MOV.L [ R14 ], R15
ADD #1, R15
MOV.L R15, [ R14 ]
; Yield to extend the text coverage. Set the bit in the ITU SWINTR register.
MOV.L #1, R14
MOV.L #0872E0H, R15
MOV.B R14, [R15]
NOP
NOP
; Restore the clobbered registers.
POPM R14-R15
; Now compare each register to ensure it still contains the value that was
; set before this loop was entered.
CMP #1, R1
BNE RegTest1Error
CMP #2, R2
BNE RegTest1Error
CMP #3, R3
BNE RegTest1Error
CMP #4, R4
BNE RegTest1Error
CMP #5, R5
BNE RegTest1Error
CMP #6, R6
BNE RegTest1Error
CMP #7, R7
BNE RegTest1Error
CMP #8, R8
BNE RegTest1Error
CMP #9, R9
BNE RegTest1Error
CMP #10, R10
BNE RegTest1Error
CMP #11, R11
BNE RegTest1Error
CMP #12, R12
BNE RegTest1Error
CMP #13, R13
BNE RegTest1Error
CMP #14, R14
BNE RegTest1Error
CMP #15, R15
BNE RegTest1Error
; All comparisons passed, start a new itteratio of this loop.
BRA TestLoop1
RegTest1Error:
; A compare failed, just loop here so the loop counter stops incrementing
; causing the check task to indicate the error.
BRA RegTest1Error
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
#pragma inline_asm prvRegTest2Implementation
static void prvRegTest2Implementation( void )
{
; Put a known value in each register.
MOV.L #10, R1
MOV.L #20, R2
MOV.L #30, R3
MOV.L #40, R4
MOV.L #50, R5
MOV.L #60, R6
MOV.L #70, R7
MOV.L #80, R8
MOV.L #90, R9
MOV.L #100, R10
MOV.L #110, R11
MOV.L #120, R12
MOV.L #130, R13
MOV.L #140, R14
MOV.L #150, R15
; Loop, checking on each itteration that each register still contains the
; expected value.
TestLoop2:
; Push the registers that are going to get clobbered.
PUSHM R14-R15
; Increment the loop counter to show this task is still getting CPU time.
MOV.L #_ulRegTest2CycleCount, R14
MOV.L [ R14 ], R15
ADD #1, R15
MOV.L R15, [ R14 ]
; Restore the clobbered registers.
POPM R14-R15
CMP #10, R1
BNE RegTest2Error
CMP #20, R2
BNE RegTest2Error
CMP #30, R3
BNE RegTest2Error
CMP #40, R4
BNE RegTest2Error
CMP #50, R5
BNE RegTest2Error
CMP #60, R6
BNE RegTest2Error
CMP #70, R7
BNE RegTest2Error
CMP #80, R8
BNE RegTest2Error
CMP #90, R9
BNE RegTest2Error
CMP #100, R10
BNE RegTest2Error
CMP #110, R11
BNE RegTest2Error
CMP #120, R12
BNE RegTest2Error
CMP #130, R13
BNE RegTest2Error
CMP #140, R14
BNE RegTest2Error
CMP #150, R15
BNE RegTest2Error
; All comparisons passed, start a new itteratio of this loop.
BRA TestLoop2
RegTest2Error:
; A compare failed, just loop here so the loop counter stops incrementing
; - causing the check task to indicate the error.
BRA RegTest2Error
}
/*-----------------------------------------------------------*/
char *pcGetTaskStatusMessage( void )
{
/* Not bothered about a critical section here although technically because of
the task priorities the pointer could change it will be atomic if not near
atomic and its not critical. */
return ( char * ) pcStatusMessage;
}
/*-----------------------------------------------------------*/

@ -0,0 +1,345 @@
/*
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* Standard includes. */
#include <string.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "timers.h"
#include "queue.h"
/* uip includes. */
#include "net/uip.h"
#include "net/uip_arp.h"
#include "apps/httpd/httpd.h"
#include "sys/timer.h"
#include "net/clock-arch.h"
#include "r_ether.h"
/* Demo includes. */
#include "ParTest.h"
/*-----------------------------------------------------------*/
/* How long to wait before attempting to connect the MAC again. */
#define uipINIT_WAIT ( 100 / portTICK_RATE_MS )
/* Shortcut to the header within the Rx buffer. */
#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])
/* Standard constant. */
#define uipTOTAL_FRAME_HEADER_SIZE 54
/* The ARP timer and the periodic timer share a callback function, so the
respective timer IDs are used to determine which timer actually expired. These
constants are assigned to the timer IDs. */
#define uipARP_TIMER 0
#define uipPERIODIC_TIMER 1
/* A block time of zero ticks simply means, "don't block". */
#define uipDONT_BLOCK 0UL
/*-----------------------------------------------------------*/
/*
* Setup the MAC address in the MAC itself, and in the uIP stack.
*/
static void prvSetMACAddress( void );
/*
* Perform any uIP initialisation necessary.
*/
static void prvInitialise_uIP( void );
/*
* The callback function that is assigned to both the periodic timer and the
* ARP timer.
*/
static void prvUIPTimerCallback( xTimerHandle xTimer );
/*
* Port functions required by the uIP stack.
*/
clock_time_t clock_time( void );
/*-----------------------------------------------------------*/
/* The queue used to send TCP/IP events to the uIP stack. */
xQueueHandle xEMACEventQueue = NULL;
/*-----------------------------------------------------------*/
clock_time_t clock_time( void )
{
return xTaskGetTickCount();
}
/*-----------------------------------------------------------*/
void vuIP_Task( void *pvParameters )
{
portBASE_TYPE i;
unsigned long ulNewEvent = 0UL;
unsigned long ulUIP_Events = 0UL;
( void ) pvParameters;
/* Initialise the uIP stack. */
prvInitialise_uIP();
/* Initialise the MAC. */
vInitEmac();
while( lEMACWaitForLink() != pdPASS )
{
vTaskDelay( uipINIT_WAIT );
}
for( ;; )
{
if( ( ulUIP_Events & uipETHERNET_RX_EVENT ) != 0UL )
{
/* Is there received data ready to be processed? */
uip_len = ( unsigned short ) ulEMACRead();
if( ( uip_len > 0 ) && ( uip_buf != NULL ) )
{
/* Standard uIP loop taken from the uIP manual. */
if( xHeader->type == htons( UIP_ETHTYPE_IP ) )
{
uip_arp_ipin();
uip_input();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
vEMACWrite();
}
}
else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )
{
uip_arp_arpin();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
vEMACWrite();
}
}
}
else
{
ulUIP_Events &= ~uipETHERNET_RX_EVENT;
}
}
if( ( ulUIP_Events & uipPERIODIC_TIMER_EVENT ) != 0UL )
{
ulUIP_Events &= ~uipPERIODIC_TIMER_EVENT;
for( i = 0; i < UIP_CONNS; i++ )
{
uip_periodic( i );
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
vEMACWrite();
}
}
}
/* Call the ARP timer function every 10 seconds. */
if( ( ulUIP_Events & uipARP_TIMER_EVENT ) != 0 )
{
ulUIP_Events &= ~uipARP_TIMER_EVENT;
uip_arp_timer();
}
if( ulUIP_Events == pdFALSE )
{
xQueueReceive( xEMACEventQueue, &ulNewEvent, portMAX_DELAY );
ulUIP_Events |= ulNewEvent;
}
}
}
/*-----------------------------------------------------------*/
static void prvInitialise_uIP( void )
{
xTimerHandle xARPTimer, xPeriodicTimer;
uip_ipaddr_t xIPAddr;
const unsigned long ul_uIPEventQueueLength = 10UL;
/* Initialise the uIP stack. */
uip_init();
uip_ipaddr( &xIPAddr, configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );
uip_sethostaddr( &xIPAddr );
uip_ipaddr( &xIPAddr, configNET_MASK0, configNET_MASK1, configNET_MASK2, configNET_MASK3 );
uip_setnetmask( &xIPAddr );
prvSetMACAddress();
httpd_init();
/* Create the queue used to sent TCP/IP events to the uIP stack. */
xEMACEventQueue = xQueueCreate( ul_uIPEventQueueLength, sizeof( unsigned long ) );
/* Create and start the uIP timers. */
xARPTimer = xTimerCreate( ( const signed char * const ) "ARPTimer", /* Just a name that is helpful for debugging, not used by the kernel. */
( 10000UL / portTICK_RATE_MS ), /* Timer period. */
pdTRUE, /* Autor-reload. */
( void * ) uipARP_TIMER,
prvUIPTimerCallback
);
xPeriodicTimer = xTimerCreate( ( const signed char * const ) "PeriodicTimer",
( 500 / portTICK_RATE_MS ),
pdTRUE, /* Autor-reload. */
( void * ) uipPERIODIC_TIMER,
prvUIPTimerCallback
);
configASSERT( xARPTimer );
configASSERT( xPeriodicTimer );
xTimerStart( xARPTimer, portMAX_DELAY );
xTimerStart( xPeriodicTimer, portMAX_DELAY );
}
/*-----------------------------------------------------------*/
static void prvUIPTimerCallback( xTimerHandle xTimer )
{
static const unsigned long ulARPTimerExpired = uipARP_TIMER_EVENT;
static const unsigned long ulPeriodicTimerExpired = uipPERIODIC_TIMER_EVENT;
/* This is a time callback, so calls to xQueueSend() must not attempt to
block. */
switch( ( int ) pvTimerGetTimerID( xTimer ) )
{
case uipARP_TIMER : xQueueSend( xEMACEventQueue, &ulARPTimerExpired, uipDONT_BLOCK );
break;
case uipPERIODIC_TIMER : xQueueSend( xEMACEventQueue, &ulPeriodicTimerExpired, uipDONT_BLOCK );
break;
default : /* Should not get here. */
break;
}
}
/*-----------------------------------------------------------*/
static void prvSetMACAddress( void )
{
struct uip_eth_addr xAddr;
/* Configure the MAC address in the uIP stack. */
xAddr.addr[ 0 ] = configMAC_ADDR0;
xAddr.addr[ 1 ] = configMAC_ADDR1;
xAddr.addr[ 2 ] = configMAC_ADDR2;
xAddr.addr[ 3 ] = configMAC_ADDR3;
xAddr.addr[ 4 ] = configMAC_ADDR4;
xAddr.addr[ 5 ] = configMAC_ADDR5;
uip_setethaddr( xAddr );
}
/*-----------------------------------------------------------*/
void vApplicationProcessFormInput( char *pcInputString )
{
char *c;
/* Only interested in processing form input if this is the IO page. */
c = strstr( pcInputString, "io.shtml" );
if( c )
{
/* Is there a command in the string? */
c = strstr( pcInputString, "?" );
if( c )
{
/* Turn the LED's on or off in accordance with the check box status. */
if( strstr( c, "LED0=1" ) != NULL )
{
/* Turn the LEDs on. */
vParTestSetLED( 7, 1 );
vParTestSetLED( 8, 1 );
vParTestSetLED( 9, 1 );
vParTestSetLED( 10, 1 );
}
else
{
/* Turn the LEDs off. */
vParTestSetLED( 7, 0 );
vParTestSetLED( 8, 0 );
vParTestSetLED( 9, 0 );
vParTestSetLED( 10, 0 );
}
}
else
{
/* Commands to turn LEDs off are not always explicit. */
vParTestSetLED( 7, 0 );
vParTestSetLED( 8, 0 );
vParTestSetLED( 9, 0 );
vParTestSetLED( 10, 0 );
}
}
}
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