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Move new MicroBlaze V8 port from the project directory into its correct location in the directory structure.

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Richard Barry 14 years ago
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470
Source/portable/GCC/MicroBlazeV8/port.c
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/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the MicroBlaze port.
*----------------------------------------------------------*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard includes. */
#include <string.h>
/* Hardware includes. */
#include <xintc_i.h>
#include <xil_exception.h>
#include <microblaze_exceptions_g.h>
/* Tasks are started with a critical section nesting of 0 - however, prior to
the scheduler being commenced interrupts should not be enabled, so the critical
nesting variable is initialised to a non-zero value. */
#define portINITIAL_NESTING_VALUE ( 0xff )
/* The bit within the MSR register that enabled/disables interrupts. */
#define portMSR_IE ( 0x02U )
/* If the floating point unit is included in the MicroBlaze build, then the
FSR register is saved as part of the task context. portINITIAL_FSR is the value
given to the FSR register when the initial context is set up for a task being
created. */
#define portINITIAL_FSR ( 0U )
/*-----------------------------------------------------------*/
/*
* Initialise the interrupt controller instance.
*/
static long prvInitialiseInterruptController( void );
/* Ensure the interrupt controller instance variable is initialised before it is
* used, and that the initialisation only happens once.
*/
static long prvEnsureInterruptControllerIsInitialised( void );
/*-----------------------------------------------------------*/
/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task
maintains its own count, so this variable is saved as part of the task
context. */
volatile unsigned portBASE_TYPE uxCriticalNesting = portINITIAL_NESTING_VALUE;
/* This port uses a separate stack for interrupts. This prevents the stack of
every task needing to be large enough to hold an entire interrupt stack on top
of the task stack. */
unsigned long *pulISRStack;
/* If an interrupt requests a context switch, then ulTaskSwitchRequested will
get set to 1. ulTaskSwitchRequested is inspected just before the main interrupt
handler exits. If, at that time, ulTaskSwitchRequested is set to 1, the kernel
will call vTaskSwitchContext() to ensure the task that runs immediately after
the interrupt exists is the highest priority task that is able to run. This is
an unusual mechanism, but is used for this port because a single interrupt can
cause the servicing of multiple peripherals - and it is inefficient to call
vTaskSwitchContext() multiple times as each peripheral is serviced. */
volatile unsigned long ulTaskSwitchRequested = 0UL;
/* The instance of the interrupt controller used by this port. This is required
by the Xilinx library API functions. */
static XIntc xInterruptControllerInstance;
/*-----------------------------------------------------------*/
/*
* Initialise the stack of a task to look exactly as if a call to
* portSAVE_CONTEXT had been made.
*
* See the portable.h header file.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
extern void *_SDA2_BASE_, *_SDA_BASE_;
const unsigned long ulR2 = ( unsigned long ) &_SDA2_BASE_;
const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
/* Place a few bytes of known values on the bottom of the stack.
This is essential for the Microblaze port and these lines must
not be omitted. */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;
pxTopOfStack--;
#if XPAR_MICROBLAZE_0_USE_FPU == 1
/* The FSR value placed in the initial task context is just 0. */
*pxTopOfStack = portINITIAL_FSR;
pxTopOfStack--;
#endif
/* The MSR value placed in the initial task context should have interrupts
disabled. Each task will enable interrupts automatically when it enters
the running state for the first time. */
*pxTopOfStack = mfmsr() & ~portMSR_IE;
pxTopOfStack--;
/* First stack an initial value for the critical section nesting. This
is initialised to zero. */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
/* R0 is always zero. */
/* R1 is the SP. */
/* Place an initial value for all the general purpose registers. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) ulR2; /* R2 - read only small data area. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x03; /* R3 - return values and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x04; /* R4 - return values and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;/* R5 contains the function call parameters. */
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x06; /* R6 - other parameters and temporaries. Used as the return address from vPortTaskEntryPoint. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x07; /* R7 - other parameters and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x08; /* R8 - other parameters and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x09; /* R9 - other parameters and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0a; /* R10 - other parameters and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0b; /* R11 - temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0c; /* R12 - temporaries. */
pxTopOfStack--;
#else
pxTopOfStack-= 8;
#endif
*pxTopOfStack = ( portSTACK_TYPE ) ulR13; /* R13 - read/write small data area. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* R14 - return address for interrupt. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) NULL; /* R15 - return address for subroutine. */
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R16 - return address for trap (debugger). */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* R17 - return address for exceptions, if configured. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x12; /* R18 - reserved for assembler and compiler temporaries. */
pxTopOfStack--;
#else
pxTopOfStack -= 4;
#endif
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x15; /* R21 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x16; /* R22 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x17; /* R23 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x18; /* R24 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x19; /* R25 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1a; /* R26 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1b; /* R27 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1c; /* R28 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1d; /* R29 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1e; /* R30 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1f; /* R31 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
#else
pxTopOfStack -= 13;
#endif
/* Return a pointer to the top of the stack that has been generated so this
can be stored in the task control block for the task. */
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
{
extern void ( vPortStartFirstTask )( void );
extern unsigned long _stack[];
/* Setup the hardware to generate the tick. Interrupts are disabled when
this function is called.
This port uses an application defined callback function to install the tick
interrupt handler because the kernel will run on lots of different
MicroBlaze and FPGA configurations - not all of which will have the same
timer peripherals defined or available. An example definition of
vApplicationSetupTimerInterrupt() is provided in the official demo
application that accompanies this port. */
vApplicationSetupTimerInterrupt();
/* Reuse the stack from main() as the stack for the interrupts/exceptions. */
pulISRStack = ( unsigned long * ) _stack;
/* Ensure there is enough space for the functions called from the interrupt
service routines to write back into the stack frame of the caller. */
pulISRStack -= 2;
/* Restore the context of the first task that is going to run. From here
on, the created tasks will be executing. */
vPortStartFirstTask();
/* Should not get here as the tasks are now running! */
return pdFALSE;
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* Not implemented. */
}
/*-----------------------------------------------------------*/
/*
* Manual context switch called by portYIELD or taskYIELD.
*/
void vPortYield( void )
{
extern void VPortYieldASM( void );
/* Perform the context switch in a critical section to assure it is
not interrupted by the tick ISR. It is not a problem to do this as
each task maintains its own interrupt status. */
portENTER_CRITICAL();
{
/* Jump directly to the yield function to ensure there is no
compiler generated prologue code. */
asm volatile ( "bralid r14, VPortYieldASM \n\t" \
"or r0, r0, r0 \n\t" );
}
portEXIT_CRITICAL();
}
/*-----------------------------------------------------------*/
void vPortEnableInterrupt( unsigned char ucInterruptID )
{
long lReturn;
/* An API function is provided to enable an interrupt in the interrupt
controller because the interrupt controller instance variable is private
to this file. */
lReturn = prvEnsureInterruptControllerIsInitialised();
if( lReturn == pdPASS )
{
XIntc_Enable( &xInterruptControllerInstance, ucInterruptID );
}
configASSERT( lReturn );
}
/*-----------------------------------------------------------*/
void vPortDisableInterrupt( unsigned char ucInterruptID )
{
long lReturn;
/* An API function is provided to disable an interrupt in the interrupt
controller because the interrupt controller instance variable is private
to this file. */
lReturn = prvEnsureInterruptControllerIsInitialised();
if( lReturn == pdPASS )
{
XIntc_Disable( &xInterruptControllerInstance, ucInterruptID );
}
configASSERT( lReturn );
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
{
long lReturn;
/* An API function is provided to install an interrupt handler because the
interrupt controller instance variable is private to this file. */
lReturn = prvEnsureInterruptControllerIsInitialised();
if( lReturn == pdPASS )
{
lReturn = XIntc_Connect( &xInterruptControllerInstance, ucInterruptID, pxHandler, pvCallBackRef );
}
if( lReturn == XST_SUCCESS )
{
lReturn = pdPASS;
}
configASSERT( lReturn == pdPASS );
return lReturn;
}
/*-----------------------------------------------------------*/
static long prvEnsureInterruptControllerIsInitialised( void )
{
static long lInterruptControllerInitialised = pdFALSE;
long lReturn;
/* Ensure the interrupt controller instance variable is initialised before
it is used, and that the initialisation only happens once. */
if( lInterruptControllerInitialised != pdTRUE )
{
lReturn = prvInitialiseInterruptController();
if( lReturn == pdPASS )
{
lInterruptControllerInitialised = pdTRUE;
}
}
else
{
lReturn = pdPASS;
}
return lReturn;
}
/*-----------------------------------------------------------*/
/*
* Handler for the timer interrupt. This is the handler that the application
* defined callback function vApplicationSetupTimerInterrupt() should install.
*/
void vPortTickISR( void *pvUnused )
{
extern void vApplicationClearTimerInterrupt( void );
/* Ensure the unused parameter does not generate a compiler warning. */
( void ) pvUnused;
/* This port uses an application defined callback function to clear the tick
interrupt because the kernel will run on lots of different MicroBlaze and
FPGA configurations - not all of which will have the same timer peripherals
defined or available. An example definition of
vApplicationClearTimerInterrupt() is provided in the official demo
application that accompanies this port. */
vApplicationClearTimerInterrupt();
/* Increment the RTOS tick - this might cause a task to unblock. */
vTaskIncrementTick();
/* If the preemptive scheduler is being used then a context switch should be
requested in case incrementing the tick unblocked a task, or a time slice
should cause another task to enter the Running state. */
#if configUSE_PREEMPTION == 1
/* Force vTaskSwitchContext() to be called as the interrupt exits. */
ulTaskSwitchRequested = 1;
#endif
}
/*-----------------------------------------------------------*/
static long prvInitialiseInterruptController( void )
{
long lStatus;
lStatus = XIntc_Initialize( &xInterruptControllerInstance, configINTERRUPT_CONTROLLER_TO_USE );
if( lStatus == XST_SUCCESS )
{
/* Initialise the exception table. */
Xil_ExceptionInit();
/* Service all pending interrupts each time the handler is entered. */
XIntc_SetIntrSvcOption( xInterruptControllerInstance.BaseAddress, XIN_SVC_ALL_ISRS_OPTION );
/* Install exception handlers if the MicroBlaze is configured to handle
exceptions, and the application defined constant
configINSTALL_EXCEPTION_HANDLERS is set to 1. */
#if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )
{
vPortExceptionsInstallHandlers();
}
#endif /* MICROBLAZE_EXCEPTIONS_ENABLED */
/* Start the interrupt controller. Interrupts are enabled when the
scheduler starts. */
lStatus = XIntc_Start( &xInterruptControllerInstance, XIN_REAL_MODE );
if( lStatus == XST_SUCCESS )
{
lStatus = pdPASS;
}
else
{
lStatus = pdFAIL;
}
}
configASSERT( lStatus == pdPASS );
return lStatus;
}
/*-----------------------------------------------------------*/

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Source/portable/GCC/MicroBlazeV8/port_exceptions.c
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/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Hardware includes. */
#include <microblaze_exceptions_i.h>
#include <microblaze_exceptions_g.h>
/* The Xilinx library defined exception entry point stacks a number of
registers. These definitions are offsets from the stack pointer to the various
stacked register values. */
#define portexR3_STACK_OFFSET 4
#define portexR4_STACK_OFFSET 5
#define portexR5_STACK_OFFSET 6
#define portexR6_STACK_OFFSET 7
#define portexR7_STACK_OFFSET 8
#define portexR8_STACK_OFFSET 9
#define portexR9_STACK_OFFSET 10
#define portexR10_STACK_OFFSET 11
#define portexR11_STACK_OFFSET 12
#define portexR12_STACK_OFFSET 13
#define portexR15_STACK_OFFSET 16
#define portexR18_STACK_OFFSET 19
#define portexMSR_STACK_OFFSET 20
#define portexR19_STACK_OFFSET -1
/* This is defined to equal the size, in bytes, of the stack frame generated by
the Xilinx standard library exception entry point. It is required to determine
the stack pointer value prior to the exception being entered. */
#define portexASM_HANDLER_STACK_FRAME_SIZE 84UL
/* The number of bytes a MicroBlaze instruction consumes. */
#define portexINSTRUCTION_SIZE 4
/* Exclude this entire file if the MicroBlaze is not configured to handle
exceptions, or the application defined configuration constant
configINSTALL_EXCEPTION_HANDLERS is not set to 1. */
#if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )
/* This variable is set in the exception entry code, before
vPortExceptionHandler is called. */
unsigned long *pulStackPointerOnFunctionEntry = NULL;
/* This is the structure that is filled with the MicroBlaze context as it
existed immediately prior to the exception occurrence. A pointer to this
structure is passed into the vApplicationExceptionRegisterDump() callback
function, if one is defined. */
static xPortRegisterDump xRegisterDump;
/* This is the FreeRTOS exception handler that is installed for all exception
types. It is called from vPortExceptionHanlderEntry() - which is itself defined
in portasm.S. */
void vPortExceptionHandler( void *pvExceptionID );
extern void vPortExceptionHandlerEntry( void *pvExceptionID );
/*-----------------------------------------------------------*/
/* vApplicationExceptionRegisterDump() is a callback function that the
application can optionally define to receive a populated xPortRegisterDump
structure. If the application chooses not to define a version of
vApplicationExceptionRegisterDump() then this weekly defined default
implementation will be called instead. */
extern void vApplicationExceptionRegisterDump( xPortRegisterDump *xRegisterDump ) __attribute__((weak));
void vApplicationExceptionRegisterDump( xPortRegisterDump *xRegisterDump )
{
( void ) xRegisterDump;
for( ;; )
{
portNOP();
}
}
/*-----------------------------------------------------------*/
void vPortExceptionHandler( void *pvExceptionID )
{
extern void *pxCurrentTCB;
/* Fill an xPortRegisterDump structure with the MicroBlaze context as it
was immediately before the exception occurrence. */
/* First fill in the name and handle of the task that was in the Running
state when the exception occurred. */
xRegisterDump.xCurrentTaskHandle = pxCurrentTCB;
xRegisterDump.pcCurrentTaskName = pcTaskGetTaskName( NULL );
configASSERT( pulStackPointerOnFunctionEntry );
/* Obtain the values of registers that were stacked prior to this function
being called, and may have changed since they were stacked. */
xRegisterDump.ulR3 = pulStackPointerOnFunctionEntry[ portexR3_STACK_OFFSET ];
xRegisterDump.ulR4 = pulStackPointerOnFunctionEntry[ portexR4_STACK_OFFSET ];
xRegisterDump.ulR5 = pulStackPointerOnFunctionEntry[ portexR5_STACK_OFFSET ];
xRegisterDump.ulR6 = pulStackPointerOnFunctionEntry[ portexR6_STACK_OFFSET ];
xRegisterDump.ulR7 = pulStackPointerOnFunctionEntry[ portexR7_STACK_OFFSET ];
xRegisterDump.ulR8 = pulStackPointerOnFunctionEntry[ portexR8_STACK_OFFSET ];
xRegisterDump.ulR9 = pulStackPointerOnFunctionEntry[ portexR9_STACK_OFFSET ];
xRegisterDump.ulR10 = pulStackPointerOnFunctionEntry[ portexR10_STACK_OFFSET ];
xRegisterDump.ulR11 = pulStackPointerOnFunctionEntry[ portexR11_STACK_OFFSET ];
xRegisterDump.ulR12 = pulStackPointerOnFunctionEntry[ portexR12_STACK_OFFSET ];
xRegisterDump.ulR15_return_address_from_subroutine = pulStackPointerOnFunctionEntry[ portexR15_STACK_OFFSET ];
xRegisterDump.ulR18 = pulStackPointerOnFunctionEntry[ portexR18_STACK_OFFSET ];
xRegisterDump.ulR19 = pulStackPointerOnFunctionEntry[ portexR19_STACK_OFFSET ];
xRegisterDump.ulMSR = pulStackPointerOnFunctionEntry[ portexMSR_STACK_OFFSET ];
/* Obtain the value of all other registers. */
xRegisterDump.ulR2_small_data_area = mfgpr( R2 );
xRegisterDump.ulR13_read_write_small_data_area = mfgpr( R13 );
xRegisterDump.ulR14_return_address_from_interrupt = mfgpr( R14 );
xRegisterDump.ulR16_return_address_from_trap = mfgpr( R16 );
xRegisterDump.ulR17_return_address_from_exceptions = mfgpr( R17 );
xRegisterDump.ulR20 = mfgpr( R20 );
xRegisterDump.ulR21 = mfgpr( R21 );
xRegisterDump.ulR22 = mfgpr( R22 );
xRegisterDump.ulR23 = mfgpr( R23 );
xRegisterDump.ulR24 = mfgpr( R24 );
xRegisterDump.ulR25 = mfgpr( R25 );
xRegisterDump.ulR26 = mfgpr( R26 );
xRegisterDump.ulR27 = mfgpr( R27 );
xRegisterDump.ulR28 = mfgpr( R28 );
xRegisterDump.ulR29 = mfgpr( R29 );
xRegisterDump.ulR30 = mfgpr( R30 );
xRegisterDump.ulR31 = mfgpr( R31 );
xRegisterDump.ulR1_SP = ( ( unsigned long ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;
xRegisterDump.ulEAR = mfear();
xRegisterDump.ulESR = mfesr();
xRegisterDump.ulEDR = mfedr();
/* Move the saved program counter back to the instruction that was executed
when the exception occurred. This is only valid for certain types of
exception. */
xRegisterDump.ulPC = xRegisterDump.ulR17_return_address_from_exceptions - portexINSTRUCTION_SIZE;
#if XPAR_MICROBLAZE_0_USE_FPU == 1
{
xRegisterDump.ulFSR = mffsr();
}
#else
{
xRegisterDump.ulFSR = 0UL;
}
#endif
/* Also fill in a string that describes what type of exception this is.
The string uses the same ID names as defined in the MicroBlaze standard
library exception header files. */
switch( ( unsigned long ) pvExceptionID )
{
case XEXC_ID_FSL :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FSL";
break;
case XEXC_ID_UNALIGNED_ACCESS :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_UNALIGNED_ACCESS";
break;
case XEXC_ID_ILLEGAL_OPCODE :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_ILLEGAL_OPCODE";
break;
case XEXC_ID_M_AXI_I_EXCEPTION :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";
break;
case XEXC_ID_M_AXI_D_EXCEPTION :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";
break;
case XEXC_ID_DIV_BY_ZERO :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_DIV_BY_ZERO";
break;
case XEXC_ID_STACK_VIOLATION :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";
break;
#if XPAR_MICROBLAZE_0_USE_FPU == 1
case XEXC_ID_FPU :
/*_RB_ More decoding required here and in other exceptions. */
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FPU see ulFSR value";
break;
#endif /* XPAR_MICROBLAZE_0_USE_FPU */
}
/* vApplicationExceptionRegisterDump() is a callback function that the
application can optionally define to receive the populated xPortRegisterDump
structure. If the application chooses not to define a version of
vApplicationExceptionRegisterDump() then the weekly defined default
implementation within this file will be called instead. */
vApplicationExceptionRegisterDump( &xRegisterDump );
/* Must not attempt to leave this function! */
for( ;; )
{
portNOP();
}
}
/*-----------------------------------------------------------*/
void vPortExceptionsInstallHandlers( void )
{
static unsigned long ulHandlersAlreadyInstalled = pdFALSE;
if( ulHandlersAlreadyInstalled == pdFALSE )
{
ulHandlersAlreadyInstalled = pdTRUE;
#if XPAR_MICROBLAZE_0_UNALIGNED_EXCEPTIONS == 1
microblaze_register_exception_handler( XEXC_ID_UNALIGNED_ACCESS, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_UNALIGNED_ACCESS );
#endif /* XPAR_MICROBLAZE_0_UNALIGNED_EXCEPTIONS*/
#if XPAR_MICROBLAZE_0_ILL_OPCODE_EXCEPTION == 1
microblaze_register_exception_handler( XEXC_ID_ILLEGAL_OPCODE, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_ILLEGAL_OPCODE );
#endif /* XPAR_MICROBLAZE_0_ILL_OPCODE_EXCEPTION*/
#if XPAR_MICROBLAZE_0_M_AXI_I_BUS_EXCEPTION == 1
microblaze_register_exception_handler( XEXC_ID_M_AXI_I_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_M_AXI_I_EXCEPTION );
#endif /* XPAR_MICROBLAZE_0_M_AXI_I_BUS_EXCEPTION*/
#if XPAR_MICROBLAZE_0_M_AXI_D_BUS_EXCEPTION == 1
microblaze_register_exception_handler( XEXC_ID_M_AXI_D_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_M_AXI_D_EXCEPTION );
#endif /* XPAR_MICROBLAZE_0_M_AXI_D_BUS_EXCEPTION*/
#if XPAR_MICROBLAZE_0_IPLB_BUS_EXCEPTION == 1
microblaze_register_exception_handler( XEXC_ID_IPLB_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_IPLB_EXCEPTION );
#endif /* XPAR_MICROBLAZE_0_IPLB_BUS_EXCEPTION*/
#if XPAR_MICROBLAZE_0_DPLB_BUS_EXCEPTION == 1
microblaze_register_exception_handler( XEXC_ID_DPLB_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_DPLB_EXCEPTION );
#endif /* XPAR_MICROBLAZE_0_DPLB_BUS_EXCEPTION*/
#if XPAR_MICROBLAZE_0_DIV_ZERO_EXCEPTION == 1
microblaze_register_exception_handler( XEXC_ID_DIV_BY_ZERO, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_DIV_BY_ZERO );
#endif /* XPAR_MICROBLAZE_0_DIV_ZERO_EXCEPTION*/
#if XPAR_MICROBLAZE_0_FPU_EXCEPTION == 1
microblaze_register_exception_handler( XEXC_ID_FPU, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_FPU );
#endif /* XPAR_MICROBLAZE_0_FPU_EXCEPTION*/
#if XPAR_MICROBLAZE_0_FSL_EXCEPTION == 1
microblaze_register_exception_handler( XEXC_ID_FSL, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_FSL );
#endif /* XPAR_MICROBLAZE_0_FSL_EXCEPTION*/
}
}
/* Exclude the entire file if the MicroBlaze is not configured to handle
exceptions, or the application defined configuration item
configINSTALL_EXCEPTION_HANDLERS is not set to 1. */
#endif /* ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 ) */

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Source/portable/GCC/MicroBlazeV8/portasm.S
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/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
FreeRTOS supports many tools and architectures. V7.0.0 is sponsored by:
Atollic AB - Atollic provides professional embedded systems development
tools for C/C++ development, code analysis and test automation.
See http://www.atollic.com
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* FreeRTOS includes. */
#include "FreeRTOSConfig.h"
/* Xilinx library includes. */
#include "microblaze_exceptions_g.h"
#include "xparameters.h"
/* The context is oversized to allow functions called from the ISR to write
back into the caller stack. */
#if XPAR_MICROBLAZE_0_USE_FPU == 1
#define portCONTEXT_SIZE 136
#define portMINUS_CONTEXT_SIZE -136
#else
#define portCONTEXT_SIZE 132
#define portMINUS_CONTEXT_SIZE -132
#endif
/* Offsets from the stack pointer at which saved registers are placed. */
#define portR31_OFFSET 4
#define portR30_OFFSET 8
#define portR29_OFFSET 12
#define portR28_OFFSET 16
#define portR27_OFFSET 20
#define portR26_OFFSET 24
#define portR25_OFFSET 28
#define portR24_OFFSET 32
#define portR23_OFFSET 36
#define portR22_OFFSET 40
#define portR21_OFFSET 44
#define portR20_OFFSET 48
#define portR19_OFFSET 52
#define portR18_OFFSET 56
#define portR17_OFFSET 60
#define portR16_OFFSET 64
#define portR15_OFFSET 68
#define portR14_OFFSET 72
#define portR13_OFFSET 76
#define portR12_OFFSET 80
#define portR11_OFFSET 84
#define portR10_OFFSET 88
#define portR9_OFFSET 92
#define portR8_OFFSET 96
#define portR7_OFFSET 100
#define portR6_OFFSET 104
#define portR5_OFFSET 108
#define portR4_OFFSET 112
#define portR3_OFFSET 116
#define portR2_OFFSET 120
#define portCRITICAL_NESTING_OFFSET 124
#define portMSR_OFFSET 128
#define portFSR_OFFSET 132
.extern pxCurrentTCB
.extern XIntc_DeviceInterruptHandler
.extern vTaskSwitchContext
.extern uxCriticalNesting
.extern pulISRStack
.extern ulTaskSwitchRequested
.extern vPortExceptionHandler
.extern pulStackPointerOnFunctionEntry
.global _interrupt_handler
.global VPortYieldASM
.global vPortStartFirstTask
.global vPortExceptionHandlerEntry
.macro portSAVE_CONTEXT
/* Make room for the context on the stack. */
addik r1, r1, portMINUS_CONTEXT_SIZE
/* Stack general registers. */
swi r31, r1, portR31_OFFSET
swi r30, r1, portR30_OFFSET
swi r29, r1, portR29_OFFSET
swi r28, r1, portR28_OFFSET
swi r27, r1, portR27_OFFSET
swi r26, r1, portR26_OFFSET
swi r25, r1, portR25_OFFSET
swi r24, r1, portR24_OFFSET
swi r23, r1, portR23_OFFSET
swi r22, r1, portR22_OFFSET
swi r21, r1, portR21_OFFSET
swi r20, r1, portR20_OFFSET
swi r19, r1, portR19_OFFSET
swi r18, r1, portR18_OFFSET
swi r17, r1, portR17_OFFSET
swi r16, r1, portR16_OFFSET
swi r15, r1, portR15_OFFSET
/* R14 is saved later as it needs adjustment if a yield is performed. */
swi r13, r1, portR13_OFFSET
swi r12, r1, portR12_OFFSET
swi r11, r1, portR11_OFFSET
swi r10, r1, portR10_OFFSET
swi r9, r1, portR9_OFFSET
swi r8, r1, portR8_OFFSET
swi r7, r1, portR7_OFFSET
swi r6, r1, portR6_OFFSET
swi r5, r1, portR5_OFFSET
swi r4, r1, portR4_OFFSET
swi r3, r1, portR3_OFFSET
swi r2, r1, portR2_OFFSET
/* Stack the critical section nesting value. */
lwi r18, r0, uxCriticalNesting
swi r18, r1, portCRITICAL_NESTING_OFFSET
/* Stack MSR. */
mfs r18, rmsr
swi r18, r1, portMSR_OFFSET
#if XPAR_MICROBLAZE_0_USE_FPU == 1
/* Stack FSR. */
mfs r18, rfsr
swi r18, r1, portFSR_OFFSET
#endif
/* Save the top of stack value to the TCB. */
lwi r3, r0, pxCurrentTCB
sw r1, r0, r3
.endm
.macro portRESTORE_CONTEXT
/* Load the top of stack value from the TCB. */
lwi r18, r0, pxCurrentTCB
lw r1, r0, r18
/* Restore the general registers. */
lwi r31, r1, portR31_OFFSET
lwi r30, r1, portR30_OFFSET
lwi r29, r1, portR29_OFFSET
lwi r28, r1, portR28_OFFSET
lwi r27, r1, portR27_OFFSET
lwi r26, r1, portR26_OFFSET
lwi r25, r1, portR25_OFFSET
lwi r24, r1, portR24_OFFSET
lwi r23, r1, portR23_OFFSET
lwi r22, r1, portR22_OFFSET
lwi r21, r1, portR21_OFFSET
lwi r20, r1, portR20_OFFSET
lwi r19, r1, portR19_OFFSET
lwi r17, r1, portR17_OFFSET
lwi r16, r1, portR16_OFFSET
lwi r15, r1, portR15_OFFSET
lwi r14, r1, portR14_OFFSET
lwi r13, r1, portR13_OFFSET
lwi r12, r1, portR12_OFFSET
lwi r11, r1, portR11_OFFSET
lwi r10, r1, portR10_OFFSET
lwi r9, r1, portR9_OFFSET
lwi r8, r1, portR8_OFFSET
lwi r7, r1, portR7_OFFSET
lwi r6, r1, portR6_OFFSET
lwi r5, r1, portR5_OFFSET
lwi r4, r1, portR4_OFFSET
lwi r3, r1, portR3_OFFSET
lwi r2, r1, portR2_OFFSET
/* Reload the rmsr from the stack. */
lwi r18, r1, portMSR_OFFSET
mts rmsr, r18
#if XPAR_MICROBLAZE_0_USE_FPU == 1
/* Reload the FSR from the stack. */
lwi r18, r1, portFSR_OFFSET
mts rfsr, r18
#endif
/* Load the critical nesting value. */
lwi r18, r1, portCRITICAL_NESTING_OFFSET
swi r18, r0, uxCriticalNesting
/* Test the critical nesting value. If it is non zero then the task last
exited the running state using a yield. If it is zero, then the task
last exited the running state through an interrupt. */
xori r18, r18, 0
bnei r18, exit_from_yield
/* r18 was being used as a temporary. Now restore its true value from the
stack. */
lwi r18, r1, portR18_OFFSET
/* Remove the stack frame. */
addik r1, r1, portCONTEXT_SIZE
/* Return using rtid so interrupts are re-enabled as this function is
exited. */
rtid r14, 0
or r0, r0, r0
.endm
/* This function is used to exit portRESTORE_CONTEXT() if the task being
returned to last left the Running state by calling taskYIELD() (rather than
being preempted by an interrupt). */
.text
.align 2
exit_from_yield:
/* r18 was being used as a temporary. Now restore its true value from the
stack. */
lwi r18, r1, portR18_OFFSET
/* Remove the stack frame. */
addik r1, r1, portCONTEXT_SIZE
/* Return to the task. */
rtsd r14, 0
or r0, r0, r0
.text
.align 2
_interrupt_handler:
portSAVE_CONTEXT
/* Stack the return address. */
swi r14, r1, portR14_OFFSET
/* Switch to the ISR stack. */
lwi r1, r0, pulISRStack
/* The parameter to the interrupt handler. */
ori r5, r0, configINTERRUPT_CONTROLLER_TO_USE
/* Execute any pending interrupts. */
bralid r15, XIntc_DeviceInterruptHandler
or r0, r0, r0
/* See if a new task should be selected to execute. */
lwi r18, r0, ulTaskSwitchRequested
or r18, r18, r0
/* If ulTaskSwitchRequested is already zero, then jump straight to
restoring the task that is already in the Running state. */
beqi r18, task_switch_not_requested
/* Set ulTaskSwitchRequested back to zero as a task switch is about to be
performed. */
swi r0, r0, ulTaskSwitchRequested
/* ulTaskSwitchRequested was not 0 when tested. Select the next task to
execute. */
bralid r15, vTaskSwitchContext
or r0, r0, r0
task_switch_not_requested:
/* Restore the context of the next task scheduled to execute. */
portRESTORE_CONTEXT
.text
.align 2
VPortYieldASM:
portSAVE_CONTEXT
/* Modify the return address so a return is done to the instruction after
the call to VPortYieldASM. */
addi r14, r14, 8
swi r14, r1, portR14_OFFSET
/* Switch to use the ISR stack. */
lwi r1, r0, pulISRStack
/* Select the next task to execute. */
bralid r15, vTaskSwitchContext
or r0, r0, r0
/* Restore the context of the next task scheduled to execute. */
portRESTORE_CONTEXT
.text
.align 2
vPortStartFirstTask:
portRESTORE_CONTEXT
#if MICROBLAZE_EXCEPTIONS_ENABLED == 1
.text
.align 2
vPortExceptionHandlerEntry:
/* Take a copy of the stack pointer before vPortExecptionHandler is called,
storing its value prior to the function stack frame being created. */
swi r1, r0, pulStackPointerOnFunctionEntry
bralid r15, vPortExceptionHandler
or r0, r0, r0
#endif /* MICROBLAZE_EXCEPTIONS_ENABLED */

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Source/portable/GCC/MicroBlazeV8/portmacro.h
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/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef PORTMACRO_H
#define PORTMACRO_H
#ifdef __cplusplus
extern "C" {
#endif
/* BSP includes. */
#include <mb_interface.h>
#include <xparameters.h>
/*-----------------------------------------------------------
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
*
* These settings should not be altered.
*-----------------------------------------------------------
*/
/* Type definitions. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned long
#define portBASE_TYPE long
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffff
#endif
/*-----------------------------------------------------------*/
/* Interrupt control macros and functions. */
void microblaze_disable_interrupts( void );
void microblaze_enable_interrupts( void );
#define portDISABLE_INTERRUPTS() microblaze_disable_interrupts()
#define portENABLE_INTERRUPTS() microblaze_enable_interrupts()
/*-----------------------------------------------------------*/
/* Critical section macros. */
void vPortEnterCritical( void );
void vPortExitCritical( void );
#define portENTER_CRITICAL() { \
extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
microblaze_disable_interrupts(); \
uxCriticalNesting++; \
}
#define portEXIT_CRITICAL() { \
extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
/* Interrupts are disabled, so we can */ \
/* access the variable directly. */ \
uxCriticalNesting--; \
if( uxCriticalNesting == 0 ) \
{ \
/* The nesting has unwound and we \
can enable interrupts again. */ \
portENABLE_INTERRUPTS(); \
} \
}
/*-----------------------------------------------------------*/
/* The yield macro maps directly to the vPortYield() function. */
void vPortYield( void );
#define portYIELD() vPortYield()
/* portYIELD_FROM_ISR() does not directly call vTaskSwitchContext(), but instead
sets a flag to say that a yield has been requested. The interrupt exit code
then checks this flag, and calls vTaskSwitchContext() before restoring a task
context, if the flag is not false. This is done to prevent multiple calls to
vTaskSwitchContext() being made from a single interrupt, as a single interrupt
can result in multiple peripherals being serviced. */
extern volatile unsigned long ulTaskSwitchRequested;
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) ulTaskSwitchRequested = 1
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 4
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portNOP() asm volatile ( "NOP" )
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
/*-----------------------------------------------------------*/
/* The following structure is used by the FreeRTOS exception handler. It is
filled with the MicroBlaze context as it was at the time the exception occurred.
This is done as an aid to debugging exception occurrences. */
typedef struct PORT_REGISTER_DUMP
{
/* The following structure members hold the values of the MicroBlaze
registers at the time the exception was raised. */
unsigned long ulR1_SP;
unsigned long ulR2_small_data_area;
unsigned long ulR3;
unsigned long ulR4;
unsigned long ulR5;
unsigned long ulR6;
unsigned long ulR7;
unsigned long ulR8;
unsigned long ulR9;
unsigned long ulR10;
unsigned long ulR11;
unsigned long ulR12;
unsigned long ulR13_read_write_small_data_area;
unsigned long ulR14_return_address_from_interrupt;
unsigned long ulR15_return_address_from_subroutine;
unsigned long ulR16_return_address_from_trap;
unsigned long ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */
unsigned long ulR18;
unsigned long ulR19;
unsigned long ulR20;
unsigned long ulR21;
unsigned long ulR22;
unsigned long ulR23;
unsigned long ulR24;
unsigned long ulR25;
unsigned long ulR26;
unsigned long ulR27;
unsigned long ulR28;
unsigned long ulR29;
unsigned long ulR30;
unsigned long ulR31;
unsigned long ulPC;
unsigned long ulESR;
unsigned long ulMSR;
unsigned long ulEAR;
unsigned long ulFSR;
unsigned long ulEDR;
/* A human readable description of the exception cause. The strings used
are the same as the #define constant names found in the
microblaze_exceptions_i.h header file */
signed char *pcExceptionCause;
/* The human readable name of the task that was running at the time the
exception occurred. This is the name that was given to the task when the
task was created using the FreeRTOS xTaskCreate() API function. */
signed char *pcCurrentTaskName;
/* The handle of the task that was running a the time the exception
occurred. */
void * xCurrentTaskHandle;
} xPortRegisterDump;
/*
* Installs pxHandler as the interrupt handler for the peripheral specified by
* the ucInterruptID parameter.
*
* ucInterruptID:
*
* The ID of the peripheral that will have pxHandler assigned as its interrupt
* handler. Peripheral IDs are defined in the xparameters.h header file, which
* is itself part of the BSP project. For example, in the official demo
* application for this port, xparameters.h defines the following IDs for the
* four possible interrupt sources:
*
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
* XPAR_INTC_0_TMRCTR_0_VEC_ID - for the AXI Timer 0 peripheral.
* XPAR_INTC_0_EMACLITE_0_VEC_ID - for the Ethernet lite peripheral.
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
*
*
* pxHandler:
*
* A pointer to the interrupt handler function itself. This must be a void
* function that takes a (void *) parameter.
*
*
* pvCallBackRef:
*
* The parameter passed into the handler function. In many cases this will not
* be used and can be NULL. Some times it is used to pass in a reference to
* the peripheral instance variable, so it can be accessed from inside the
* handler function.
*
*
* pdPASS is returned if the function executes successfully. Any other value
* being returned indicates that the function did not execute correctly.
*/
portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );
/*
* Enables the interrupt, within the interrupt controller, for the peripheral
* specified by the ucInterruptID parameter.
*
* ucInterruptID:
*
* The ID of the peripheral that will have its interrupt enabled in the
* interrupt controller. Peripheral IDs are defined in the xparameters.h header
* file, which is itself part of the BSP project. For example, in the official
* demo application for this port, xparameters.h defines the following IDs for
* the four possible interrupt sources:
*
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
* XPAR_INTC_0_TMRCTR_0_VEC_ID - for the AXI Timer 0 peripheral.
* XPAR_INTC_0_EMACLITE_0_VEC_ID - for the Ethernet lite peripheral.
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
*
*/
void vPortEnableInterrupt( unsigned char ucInterruptID );
/*
* Disables the interrupt, within the interrupt controller, for the peripheral
* specified by the ucInterruptID parameter.
*
* ucInterruptID:
*
* The ID of the peripheral that will have its interrupt disabled in the
* interrupt controller. Peripheral IDs are defined in the xparameters.h header
* file, which is itself part of the BSP project. For example, in the official
* demo application for this port, xparameters.h defines the following IDs for
* the four possible interrupt sources:
*
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
* XPAR_INTC_0_TMRCTR_0_VEC_ID - for the AXI Timer 0 peripheral.
* XPAR_INTC_0_EMACLITE_0_VEC_ID - for the Ethernet lite peripheral.
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
*
*/
void vPortDisableInterrupt( unsigned char ucInterruptID );
/*
* This is an application defined callback function used to install the tick
* interrupt handler. It is provided as an application callback because the
* kernel will run on lots of different MicroBlaze and FPGA configurations - not
* all of which will have the same timer peripherals defined or available. This
* example uses the AXI Timer 0. If that is available on your hardware platform
* then this example callback implementation should not require modification.
* The name of the interrupt handler that should be installed is vPortTickISR(),
* which the function below declares as an extern.
*/
void vApplicationSetupTimerInterrupt( void );
/*
* This is an application defined callback function used to clear whichever
* interrupt was installed by the the vApplicationSetupTimerInterrupt() callback
* function - in this case the interrupt generated by the AXI timer. It is
* provided as an application callback because the kernel will run on lots of
* different MicroBlaze and FPGA configurations - not all of which will have the
* same timer peripherals defined or available. This example uses the AXI Timer 0.
* If that is available on your hardware platform then this example callback
* implementation should not require modification provided the example definition
* of vApplicationSetupTimerInterrupt() is also not modified.
*/
void vApplicationClearTimerInterrupt( void );
/*
* vPortExceptionsInstallHandlers() is only available when the MicroBlaze
* is configured to include exception functionality, and
* configINSTALL_EXCEPTION_HANDLERS is set to 1 in FreeRTOSConfig.h.
*
* vPortExceptionsInstallHandlers() installs the FreeRTOS exception handler
* for every possible exception cause.
*
* vPortExceptionsInstallHandlers() can be called explicitly from application
* code. After that is done, the default FreeRTOS exception handler that will
* have been installed can be replaced for any specific exception cause by using
* the standard Xilinx library function microblaze_register_exception_handler().
*
* If vPortExceptionsInstallHandlers() is not called explicitly by the
* application, it will be called automatically by the kernel the first time
* xPortInstallInterruptHandler() is called. At that time, any exception
* handlers that may have already been installed will be replaced.
*
* See the description of vApplicationExceptionRegisterDump() for information
* on the processing performed by the FreeRTOS exception handler.
*/
void vPortExceptionsInstallHandlers( void );
/*
* The FreeRTOS exception handler fills an xPortRegisterDump structure (defined
* in portmacro.h) with the MicroBlaze context, as it was at the time the
* exception occurred. The exception handler then calls
* vApplicationExceptionRegisterDump(), passing in the completed
* xPortRegisterDump structure as its parameter.
*
* The FreeRTOS kernel provides its own implementation of
* vApplicationExceptionRegisterDump(), but the kernel provided implementation
* is declared as being 'weak'. The weak definition allows the application
* writer to provide their own implementation, should they wish to use the
* register dump information. For example, an implementation could be provided
* that wrote the register dump data to a display, or a UART port.
*/
void vApplicationExceptionRegisterDump( xPortRegisterDump *xRegisterDump );
#ifdef __cplusplus
}
#endif
#endif /* PORTMACRO_H */
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