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Implement prvYieldCore with macro (#785)

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* Implement prvYieldCore with macro for performance and memory
* Remove the portCHECK_IF_IN_ISR macro check. It is not required in SMP
  now

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
pull/820/head
chinglee-iot 1 year ago committed by GitHub
parent 830533d49e
commit 30e13dac2b
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 25 additions and 43 deletions
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8
include/FreeRTOS.h
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@ -453,14 +453,6 @@
#endif /* portGET_ISR_LOCK */
#ifndef portCHECK_IF_IN_ISR
#if ( configNUMBER_OF_CORES > 1 )
#error portCHECK_IF_IN_ISR is required in SMP
#endif
#endif /* portCHECK_IF_IN_ISR */
#ifndef portENTER_CRITICAL_FROM_ISR
#if ( configNUMBER_OF_CORES > 1 )

60
tasks.c
Unescape Escape View File

@ -325,6 +325,31 @@
#define taskBITS_PER_BYTE ( ( size_t ) 8 )
#if ( configNUMBER_OF_CORES > 1 )
/* Yields the given core. This must be called from a critical section and xCoreID
* must be valid. This macro is not required in single core since there is only
* one core to yield. */
#define prvYieldCore( xCoreID ) \
do { \
if( xCoreID == ( BaseType_t ) portGET_CORE_ID() ) \
{ \
/* Pending a yield for this core since it is in the critical section. */ \
xYieldPendings[ xCoreID ] = pdTRUE; \
} \
else \
{ \
/* Request other core to yield if it is not requested before. */ \
if( pxCurrentTCBs[ xCoreID ]->xTaskRunState != taskTASK_SCHEDULED_TO_YIELD ) \
{ \
portYIELD_CORE( xCoreID ); \
pxCurrentTCBs[ xCoreID ]->xTaskRunState = taskTASK_SCHEDULED_TO_YIELD; \
} \
} \
} while( 0 )
#endif /* #if ( configNUMBER_OF_CORES > 1 ) */
/*-----------------------------------------------------------*/
/*
* Task control block. A task control block (TCB) is allocated for each task,
* and stores task state information, including a pointer to the task's context
@ -527,14 +552,6 @@ static BaseType_t prvCreateIdleTasks( void );
#if ( configNUMBER_OF_CORES > 1 )
/*
* Yields the given core.
*/
static void prvYieldCore( BaseType_t xCoreID );
#endif /* #if ( configNUMBER_OF_CORES > 1 ) */
#if ( configNUMBER_OF_CORES > 1 )
/*
* Yields a core, or cores if multiple priorities are not allowed to run
* simultaneously, to allow the task pxTCB to run.
@ -811,33 +828,6 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
/*-----------------------------------------------------------*/
#if ( configNUMBER_OF_CORES > 1 )
static void prvYieldCore( BaseType_t xCoreID )
{
/* This must be called from a critical section and xCoreID must be valid. */
if( ( portCHECK_IF_IN_ISR() == pdTRUE ) && ( xCoreID == ( BaseType_t ) portGET_CORE_ID() ) )
{
xYieldPendings[ xCoreID ] = pdTRUE;
}
else
{
if( pxCurrentTCBs[ xCoreID ]->xTaskRunState != taskTASK_SCHEDULED_TO_YIELD )
{
if( xCoreID == ( BaseType_t ) portGET_CORE_ID() )
{
xYieldPendings[ xCoreID ] = pdTRUE;
}
else
{
portYIELD_CORE( xCoreID );
pxCurrentTCBs[ xCoreID ]->xTaskRunState = taskTASK_SCHEDULED_TO_YIELD;
}
}
}
}
#endif /* #if ( configNUMBER_OF_CORES > 1 ) */
/*-----------------------------------------------------------*/
#if ( configNUMBER_OF_CORES > 1 )
static void prvYieldForTask( const TCB_t * pxTCB )
{

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