diff --git a/FreeRTOS/Demo/Common/Minimal/IntSemTest.c b/FreeRTOS/Demo/Common/Minimal/IntSemTest.c
index 8f21e8296..e9ecdacf6 100644
--- a/FreeRTOS/Demo/Common/Minimal/IntSemTest.c
+++ b/FreeRTOS/Demo/Common/Minimal/IntSemTest.c
@@ -512,7 +512,7 @@ TickType_t xTimeNow;
/* No mutual exclusion on xOkToGiveMutex, but this is only test code (and
only executed on a 32-bit architecture) so ignore that in this case. */
xTimeNow = xTaskGetTickCountFromISR();
- if( ( xTimeNow - xLastGiveTime ) >= pdMS_TO_TICKS( intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ) )
+ if( ( ( TickType_t ) ( xTimeNow - xLastGiveTime ) ) >= pdMS_TO_TICKS( intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ) )
{
configASSERT( xISRMutex );
if( xOkToGiveMutex != pdFALSE )
diff --git a/FreeRTOS/Demo/Common/Minimal/TimerDemo.c b/FreeRTOS/Demo/Common/Minimal/TimerDemo.c
index e8f44fe88..61a5b71cd 100644
--- a/FreeRTOS/Demo/Common/Minimal/TimerDemo.c
+++ b/FreeRTOS/Demo/Common/Minimal/TimerDemo.c
@@ -395,10 +395,14 @@ static void prvTest3_CheckAutoReloadExpireRates( void )
{
uint8_t ucMaxAllowableValue, ucMinAllowableValue, ucTimer;
TickType_t xBlockPeriod, xTimerPeriod, xExpectedNumber;
-
- /* Check the auto reload timers expire at the expected rates. */
-
-
+UBaseType_t uxOriginalPriority;
+
+ /* Check the auto reload timers expire at the expected rates. Do this at a
+ high priority for maximum accuracy. This is ok as most of the time is spent
+ in the Blocked state. */
+ uxOriginalPriority = uxTaskPriorityGet( NULL );
+ vTaskPrioritySet( NULL, ( configMAX_PRIORITIES - 1 ) );
+
/* Delaying for configTIMER_QUEUE_LENGTH * xBasePeriod ticks should allow
all the auto reload timers to expire at least once. */
xBlockPeriod = ( ( TickType_t ) configTIMER_QUEUE_LENGTH ) * xBasePeriod;
@@ -425,6 +429,9 @@ TickType_t xBlockPeriod, xTimerPeriod, xExpectedNumber;
}
}
+ /* Return to the original priority. */
+ vTaskPrioritySet( NULL, uxOriginalPriority );
+
if( xTestStatus == pdPASS )
{
/* No errors have been reported so increment the loop counter so the
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/.cproject b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/.cproject
new file mode 100644
index 000000000..9e3529d0e
--- /dev/null
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/.cproject
@@ -0,0 +1,13 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/.project b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/.project
new file mode 100644
index 000000000..b58d8788e
--- /dev/null
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/.project
@@ -0,0 +1,76 @@
+
+
+ BSP
+ Created by SDK v2014.4
+
+ Hardware
+
+
+
+ org.eclipse.cdt.make.core.makeBuilder
+
+
+ org.eclipse.cdt.core.errorOutputParser
+ org.eclipse.cdt.core.GASErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GmakeErrorParser;org.eclipse.cdt.core.VCErrorParser;org.eclipse.cdt.core.CWDLocator;org.eclipse.cdt.core.MakeErrorParser;
+
+
+ org.eclipse.cdt.make.core.append_environment
+ true
+
+
+ org.eclipse.cdt.make.core.build.arguments
+
+
+
+ org.eclipse.cdt.make.core.build.command
+ make
+
+
+ org.eclipse.cdt.make.core.build.target.auto
+ all
+
+
+ org.eclipse.cdt.make.core.build.target.clean
+ clean
+
+
+ org.eclipse.cdt.make.core.build.target.inc
+ all
+
+
+ org.eclipse.cdt.make.core.enableAutoBuild
+ true
+
+
+ org.eclipse.cdt.make.core.enableCleanBuild
+ true
+
+
+ org.eclipse.cdt.make.core.enableFullBuild
+ true
+
+
+ org.eclipse.cdt.make.core.enabledIncrementalBuild
+ true
+
+
+ org.eclipse.cdt.make.core.environment
+
+
+
+ org.eclipse.cdt.make.core.stopOnError
+ false
+
+
+ org.eclipse.cdt.make.core.useDefaultBuildCmd
+ true
+
+
+
+
+
+ com.xilinx.sdk.sw.SwProjectNature
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.make.core.makeNature
+
+
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/.sdkproject b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/.sdkproject
new file mode 100644
index 000000000..d75738c3f
--- /dev/null
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/.sdkproject
@@ -0,0 +1,3 @@
+THIRPARTY=false
+PROCESSOR=microblaze_0
+MSS_FILE=system.mss
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/Makefile b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/Makefile
new file mode 100644
index 000000000..2c54e151e
--- /dev/null
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/Makefile
@@ -0,0 +1,31 @@
+# Makefile generated by Xilinx.
+
+PROCESSOR = microblaze_0
+LIBRARIES = ${PROCESSOR}/lib/libxil.a
+BSP_MAKEFILES := $(wildcard $(PROCESSOR)/libsrc/*/src/Makefile)
+SUBDIRS := $(patsubst %/Makefile, %, $(BSP_MAKEFILES))
+
+ifneq (,$(findstring win,$(RDI_PLATFORM)))
+ SHELL = CMD
+endif
+
+all: libs
+ @echo 'Finished building libraries'
+
+include: $(addsuffix /make.include,$(SUBDIRS))
+
+libs: $(addsuffix /make.libs,$(SUBDIRS))
+
+$(PROCESSOR)/lib/libxil.a: $(PROCESSOR)/lib/libxil_init.a
+ cp -f $< $@
+
+%/make.include: $(if $(wildcard $(PROCESSOR)/lib/libxil_init.a),$(PROCESSOR)/lib/libxil.a,)
+ @echo "Running Make include in $(subst /make.include,,$@)"
+ $(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=mb-gcc" "ARCHIVER=mb-ar" "COMPILER_FLAGS= -O2 -c -mcpu=v9.4 -mhard-float -mlittle-endian -mno-xl-soft-div -mno-xl-soft-mul -mxl-barrel-shift -mxl-float-convert -mxl-float-sqrt -mxl-multiply-high -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections"
+
+%/make.libs: include
+ @echo "Running Make libs in $(subst /make.libs,,$@)"
+ $(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=mb-gcc" "ARCHIVER=mb-ar" "COMPILER_FLAGS= -O2 -c -mcpu=v9.4 -mhard-float -mlittle-endian -mno-xl-soft-div -mno-xl-soft-mul -mxl-barrel-shift -mxl-float-convert -mxl-float-sqrt -mxl-multiply-high -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections"
+
+clean:
+ rm -f ${PROCESSOR}/lib/libxil.a
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/system.mss b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/system.mss
new file mode 100644
index 000000000..2873863f4
--- /dev/null
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/system.mss
@@ -0,0 +1,78 @@
+
+ PARAMETER NAME = C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\MicroBlaze_Kintex7_EthernetLite\BSP\system.mss
+
+ PARAMETER VERSION = 2.2.0
+
+
+BEGIN OS
+ PARAMETER OS_NAME = standalone
+ PARAMETER OS_VER = 4.2
+ PARAMETER PROC_INSTANCE = microblaze_0
+ PARAMETER stdin = axi_uartlite_0
+ PARAMETER stdout = axi_uartlite_0
+END
+
+
+BEGIN PROCESSOR
+ PARAMETER DRIVER_NAME = cpu
+ PARAMETER DRIVER_VER = 2.2
+ PARAMETER HW_INSTANCE = microblaze_0
+END
+
+
+BEGIN DRIVER
+ PARAMETER DRIVER_NAME = emaclite
+ PARAMETER DRIVER_VER = 4.0
+ PARAMETER HW_INSTANCE = axi_ethernetlite_0
+END
+
+BEGIN DRIVER
+ PARAMETER DRIVER_NAME = gpio
+ PARAMETER DRIVER_VER = 4.0
+ PARAMETER HW_INSTANCE = axi_gpio_0
+END
+
+BEGIN DRIVER
+ PARAMETER DRIVER_NAME = intc
+ PARAMETER DRIVER_VER = 3.2
+ PARAMETER HW_INSTANCE = axi_intc_0
+END
+
+BEGIN DRIVER
+ PARAMETER DRIVER_NAME = tmrctr
+ PARAMETER DRIVER_VER = 3.0
+ PARAMETER HW_INSTANCE = axi_timer_0
+END
+
+BEGIN DRIVER
+ PARAMETER DRIVER_NAME = uartlite
+ PARAMETER DRIVER_VER = 3.0
+ PARAMETER HW_INSTANCE = axi_uartlite_0
+END
+
+BEGIN DRIVER
+ PARAMETER DRIVER_NAME = bram
+ PARAMETER DRIVER_VER = 4.0
+ PARAMETER HW_INSTANCE = microblaze_0_local_memory_dlmb_bram_if_cntlr
+END
+
+BEGIN DRIVER
+ PARAMETER DRIVER_NAME = bram
+ PARAMETER DRIVER_VER = 4.0
+ PARAMETER HW_INSTANCE = microblaze_0_local_memory_ilmb_bram_if_cntlr
+END
+
+BEGIN DRIVER
+ PARAMETER DRIVER_NAME = mig_7series
+ PARAMETER DRIVER_VER = 2.0
+ PARAMETER HW_INSTANCE = mig_7series_0
+END
+
+
+BEGIN LIBRARY
+ PARAMETER LIBRARY_NAME = lwip140
+ PARAMETER LIBRARY_VER = 2.3
+ PARAMETER PROC_INSTANCE = microblaze_0
+END
+
+
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/.project b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/.project
new file mode 100644
index 000000000..f860e24f1
--- /dev/null
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/.project
@@ -0,0 +1,68 @@
+
+
+ Hardware
+ Created by SDK v2014.4
+
+
+
+
+
+ com.xilinx.sdk.hw.HwProject
+
+
+
+ 1421760060412
+
+ 6
+
+ org.eclipse.ui.ide.multiFilter
+ 1.0-name-matches-false-false-*.xml
+
+
+
+ 1421760060422
+
+ 6
+
+ org.eclipse.ui.ide.multiFilter
+ 1.0-name-matches-false-false-*.svd
+
+
+
+ 1421760060432
+
+ 6
+
+ org.eclipse.ui.ide.multiFilter
+ 1.0-name-matches-false-false-*.hwh
+
+
+
+ 1421760060432
+
+ 6
+
+ org.eclipse.ui.ide.multiFilter
+ 1.0-name-matches-false-false-*.bit
+
+
+
+ 1421760060442
+
+ 6
+
+ org.eclipse.ui.ide.multiFilter
+ 1.0-name-matches-false-false-*.bmm
+
+
+
+ 1421760060442
+
+ 6
+
+ org.eclipse.ui.ide.multiFilter
+ 1.0-name-matches-false-false-*.mmi
+
+
+
+
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design.hwh b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design.hwh
new file mode 100644
index 000000000..bf43cd8a5
--- /dev/null
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design.hwh
@@ -0,0 +1,6575 @@
+
+
+
+
+
+
+
+
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+
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diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design_bd.tcl b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design_bd.tcl
new file mode 100644
index 000000000..ef538a029
--- /dev/null
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design_bd.tcl
@@ -0,0 +1,360 @@
+
+################################################################
+# This is a generated script based on design: base_microblaze_design
+#
+# Though there are limitations about the generated script,
+# the main purpose of this utility is to make learning
+# IP Integrator Tcl commands easier.
+################################################################
+
+################################################################
+# Check if script is running in correct Vivado version.
+################################################################
+set scripts_vivado_version 2014.4
+set current_vivado_version [version -short]
+
+if { [string first $scripts_vivado_version $current_vivado_version] == -1 } {
+ puts ""
+ puts "ERROR: This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."
+
+ return 1
+}
+
+################################################################
+# START
+################################################################
+
+# To test this script, run the following commands from Vivado Tcl console:
+# source base_microblaze_design_script.tcl
+
+# If you do not already have a project created,
+# you can create a project using the following command:
+# create_project project_1 myproj -part xc7k325tffg900-2
+# set_property BOARD_PART xilinx.com:kc705:part0:1.1 [current_project]
+
+
+# CHANGE DESIGN NAME HERE
+set design_name base_microblaze_design
+
+# If you do not already have an existing IP Integrator design open,
+# you can create a design using the following command:
+# create_bd_design $design_name
+
+# CHECKING IF PROJECT EXISTS
+if { [get_projects -quiet] eq "" } {
+ puts "ERROR: Please open or create a project!"
+ return 1
+}
+
+
+# Creating design if needed
+set errMsg ""
+set nRet 0
+
+set cur_design [current_bd_design -quiet]
+set list_cells [get_bd_cells -quiet]
+
+if { ${design_name} eq "" } {
+ # USE CASES:
+ # 1) Design_name not set
+
+ set errMsg "ERROR: Please set the variable to a non-empty value."
+ set nRet 1
+
+} elseif { ${cur_design} ne "" && ${list_cells} eq "" } {
+ # USE CASES:
+ # 2): Current design opened AND is empty AND names same.
+ # 3): Current design opened AND is empty AND names diff; design_name NOT in project.
+ # 4): Current design opened AND is empty AND names diff; design_name exists in project.
+
+ if { $cur_design ne $design_name } {
+ puts "INFO: Changing value of from <$design_name> to <$cur_design> since current design is empty."
+ set design_name [get_property NAME $cur_design]
+ }
+ puts "INFO: Constructing design in IPI design <$cur_design>..."
+
+} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } {
+ # USE CASES:
+ # 5) Current design opened AND has components AND same names.
+
+ set errMsg "ERROR: Design <$design_name> already exists in your project, please set the variable to another value."
+ set nRet 1
+} elseif { [get_files -quiet ${design_name}.bd] ne "" } {
+ # USE CASES:
+ # 6) Current opened design, has components, but diff names, design_name exists in project.
+ # 7) No opened design, design_name exists in project.
+
+ set errMsg "ERROR: Design <$design_name> already exists in your project, please set the variable to another value."
+ set nRet 2
+
+} else {
+ # USE CASES:
+ # 8) No opened design, design_name not in project.
+ # 9) Current opened design, has components, but diff names, design_name not in project.
+
+ puts "INFO: Currently there is no design <$design_name> in project, so creating one..."
+
+ create_bd_design $design_name
+
+ puts "INFO: Making design <$design_name> as current_bd_design."
+ current_bd_design $design_name
+
+}
+
+puts "INFO: Currently the variable is equal to \"$design_name\"."
+
+if { $nRet != 0 } {
+ puts $errMsg
+ return $nRet
+}
+
+##################################################################
+# DESIGN PROCs
+##################################################################
+
+
+# Hierarchical cell: microblaze_0_local_memory
+proc create_hier_cell_microblaze_0_local_memory { parentCell nameHier } {
+
+ if { $parentCell eq "" || $nameHier eq "" } {
+ puts "ERROR: create_hier_cell_microblaze_0_local_memory() - Empty argument(s)!"
+ return
+ }
+
+ # Get object for parentCell
+ set parentObj [get_bd_cells $parentCell]
+ if { $parentObj == "" } {
+ puts "ERROR: Unable to find parent cell <$parentCell>!"
+ return
+ }
+
+ # Make sure parentObj is hier blk
+ set parentType [get_property TYPE $parentObj]
+ if { $parentType ne "hier" } {
+ puts "ERROR: Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."
+ return
+ }
+
+ # Save current instance; Restore later
+ set oldCurInst [current_bd_instance .]
+
+ # Set parent object as current
+ current_bd_instance $parentObj
+
+ # Create cell and set as current instance
+ set hier_obj [create_bd_cell -type hier $nameHier]
+ current_bd_instance $hier_obj
+
+ # Create interface pins
+ create_bd_intf_pin -mode MirroredMaster -vlnv xilinx.com:interface:lmb_rtl:1.0 DLMB
+ create_bd_intf_pin -mode MirroredMaster -vlnv xilinx.com:interface:lmb_rtl:1.0 ILMB
+
+ # Create pins
+ create_bd_pin -dir I -type clk LMB_Clk
+ create_bd_pin -dir I -from 0 -to 0 -type rst LMB_Rst
+
+ # Create instance: dlmb_bram_if_cntlr, and set properties
+ set dlmb_bram_if_cntlr [ create_bd_cell -type ip -vlnv xilinx.com:ip:lmb_bram_if_cntlr:4.0 dlmb_bram_if_cntlr ]
+ set_property -dict [ list CONFIG.C_ECC {0} ] $dlmb_bram_if_cntlr
+
+ # Create instance: dlmb_v10, and set properties
+ set dlmb_v10 [ create_bd_cell -type ip -vlnv xilinx.com:ip:lmb_v10:3.0 dlmb_v10 ]
+
+ # Create instance: ilmb_bram_if_cntlr, and set properties
+ set ilmb_bram_if_cntlr [ create_bd_cell -type ip -vlnv xilinx.com:ip:lmb_bram_if_cntlr:4.0 ilmb_bram_if_cntlr ]
+ set_property -dict [ list CONFIG.C_ECC {0} ] $ilmb_bram_if_cntlr
+
+ # Create instance: ilmb_v10, and set properties
+ set ilmb_v10 [ create_bd_cell -type ip -vlnv xilinx.com:ip:lmb_v10:3.0 ilmb_v10 ]
+
+ # Create instance: lmb_bram, and set properties
+ set lmb_bram [ create_bd_cell -type ip -vlnv xilinx.com:ip:blk_mem_gen:8.2 lmb_bram ]
+ set_property -dict [ list CONFIG.Memory_Type {True_Dual_Port_RAM} CONFIG.use_bram_block {BRAM_Controller} ] $lmb_bram
+
+ # Create interface connections
+ connect_bd_intf_net -intf_net microblaze_0_dlmb [get_bd_intf_pins DLMB] [get_bd_intf_pins dlmb_v10/LMB_M]
+ connect_bd_intf_net -intf_net microblaze_0_dlmb_bus [get_bd_intf_pins dlmb_bram_if_cntlr/SLMB] [get_bd_intf_pins dlmb_v10/LMB_Sl_0]
+ connect_bd_intf_net -intf_net microblaze_0_dlmb_cntlr [get_bd_intf_pins dlmb_bram_if_cntlr/BRAM_PORT] [get_bd_intf_pins lmb_bram/BRAM_PORTA]
+ connect_bd_intf_net -intf_net microblaze_0_ilmb [get_bd_intf_pins ILMB] [get_bd_intf_pins ilmb_v10/LMB_M]
+ connect_bd_intf_net -intf_net microblaze_0_ilmb_bus [get_bd_intf_pins ilmb_bram_if_cntlr/SLMB] [get_bd_intf_pins ilmb_v10/LMB_Sl_0]
+ connect_bd_intf_net -intf_net microblaze_0_ilmb_cntlr [get_bd_intf_pins ilmb_bram_if_cntlr/BRAM_PORT] [get_bd_intf_pins lmb_bram/BRAM_PORTB]
+
+ # Create port connections
+ connect_bd_net -net microblaze_0_Clk [get_bd_pins LMB_Clk] [get_bd_pins dlmb_bram_if_cntlr/LMB_Clk] [get_bd_pins dlmb_v10/LMB_Clk] [get_bd_pins ilmb_bram_if_cntlr/LMB_Clk] [get_bd_pins ilmb_v10/LMB_Clk]
+ connect_bd_net -net microblaze_0_LMB_Rst [get_bd_pins LMB_Rst] [get_bd_pins dlmb_bram_if_cntlr/LMB_Rst] [get_bd_pins dlmb_v10/SYS_Rst] [get_bd_pins ilmb_bram_if_cntlr/LMB_Rst] [get_bd_pins ilmb_v10/SYS_Rst]
+
+ # Restore current instance
+ current_bd_instance $oldCurInst
+}
+
+
+# Procedure to create entire design; Provide argument to make
+# procedure reusable. If parentCell is "", will use root.
+proc create_root_design { parentCell } {
+
+ if { $parentCell eq "" } {
+ set parentCell [get_bd_cells /]
+ }
+
+ # Get object for parentCell
+ set parentObj [get_bd_cells $parentCell]
+ if { $parentObj == "" } {
+ puts "ERROR: Unable to find parent cell <$parentCell>!"
+ return
+ }
+
+ # Make sure parentObj is hier blk
+ set parentType [get_property TYPE $parentObj]
+ if { $parentType ne "hier" } {
+ puts "ERROR: Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."
+ return
+ }
+
+ # Save current instance; Restore later
+ set oldCurInst [current_bd_instance .]
+
+ # Set parent object as current
+ current_bd_instance $parentObj
+
+
+ # Create interface ports
+ set ddr3_sdram [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 ddr3_sdram ]
+ set led_8bits [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:gpio_rtl:1.0 led_8bits ]
+ set mdio_mdc [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:mdio_rtl:1.0 mdio_mdc ]
+ set mii [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:mii_rtl:1.0 mii ]
+ set rs232_uart [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:uart_rtl:1.0 rs232_uart ]
+ set sys_diff_clock [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 sys_diff_clock ]
+
+ # Create ports
+ set reset [ create_bd_port -dir I -type rst reset ]
+ set_property -dict [ list CONFIG.POLARITY {ACTIVE_HIGH} ] $reset
+
+ # Create instance: axi_ethernetlite_0, and set properties
+ set axi_ethernetlite_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_ethernetlite:3.0 axi_ethernetlite_0 ]
+ set_property -dict [ list CONFIG.MDIO_BOARD_INTERFACE {mdio_mdc} CONFIG.MII_BOARD_INTERFACE {mii} CONFIG.USE_BOARD_FLOW {true} ] $axi_ethernetlite_0
+
+ # Create instance: axi_gpio_0, and set properties
+ set axi_gpio_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 axi_gpio_0 ]
+ set_property -dict [ list CONFIG.GPIO_BOARD_INTERFACE {led_8bits} CONFIG.USE_BOARD_FLOW {true} ] $axi_gpio_0
+
+ # Create instance: axi_intc_0, and set properties
+ set axi_intc_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_intc:4.1 axi_intc_0 ]
+
+ # Create instance: axi_mem_intercon, and set properties
+ set axi_mem_intercon [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_mem_intercon ]
+ set_property -dict [ list CONFIG.NUM_MI {1} CONFIG.NUM_SI {2} ] $axi_mem_intercon
+
+ # Create instance: axi_timer_0, and set properties
+ set axi_timer_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_timer:2.0 axi_timer_0 ]
+
+ # Create instance: axi_uartlite_0, and set properties
+ set axi_uartlite_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_uartlite:2.0 axi_uartlite_0 ]
+ set_property -dict [ list CONFIG.C_BAUDRATE {115200} CONFIG.UARTLITE_BOARD_INTERFACE {rs232_uart} CONFIG.USE_BOARD_FLOW {true} ] $axi_uartlite_0
+
+ # Create instance: mdm_1, and set properties
+ set mdm_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:mdm:3.2 mdm_1 ]
+
+ # Create instance: microblaze_0, and set properties
+ set microblaze_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:microblaze:9.4 microblaze_0 ]
+ set_property -dict [ list CONFIG.C_CACHE_BYTE_SIZE {32768} \
+CONFIG.C_DCACHE_BYTE_SIZE {32768} CONFIG.C_DCACHE_LINE_LEN {8} \
+CONFIG.C_DCACHE_USE_WRITEBACK {1} CONFIG.C_DCACHE_VICTIMS {8} \
+CONFIG.C_DEBUG_ENABLED {1} CONFIG.C_DIV_ZERO_EXCEPTION {1} \
+CONFIG.C_D_AXI {1} CONFIG.C_D_LMB {1} \
+CONFIG.C_FPU_EXCEPTION {1} CONFIG.C_ICACHE_LINE_LEN {8} \
+CONFIG.C_ICACHE_STREAMS {1} CONFIG.C_ICACHE_VICTIMS {8} \
+CONFIG.C_ILL_OPCODE_EXCEPTION {1} CONFIG.C_I_LMB {1} \
+CONFIG.C_M_AXI_D_BUS_EXCEPTION {1} CONFIG.C_M_AXI_I_BUS_EXCEPTION {1} \
+CONFIG.C_NUMBER_OF_PC_BRK {8} CONFIG.C_NUMBER_OF_RD_ADDR_BRK {2} \
+CONFIG.C_NUMBER_OF_WR_ADDR_BRK {2} CONFIG.C_OPCODE_0x0_ILLEGAL {1} \
+CONFIG.C_TRACE {1} CONFIG.C_UNALIGNED_EXCEPTIONS {1} \
+CONFIG.C_USE_BARREL {1} CONFIG.C_USE_BRANCH_TARGET_CACHE {1} \
+CONFIG.C_USE_DCACHE {1} CONFIG.C_USE_DIV {1} \
+CONFIG.C_USE_FPU {2} CONFIG.C_USE_HW_MUL {2} \
+CONFIG.C_USE_ICACHE {1} CONFIG.C_USE_MSR_INSTR {1} \
+CONFIG.C_USE_PCMP_INSTR {1} CONFIG.C_USE_REORDER_INSTR {1} \
+CONFIG.C_USE_STACK_PROTECTION {1} CONFIG.G_TEMPLATE_LIST {2} \
+CONFIG.G_USE_EXCEPTIONS {1} ] $microblaze_0
+
+ # Create instance: microblaze_0_axi_periph, and set properties
+ set microblaze_0_axi_periph [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 microblaze_0_axi_periph ]
+ set_property -dict [ list CONFIG.NUM_MI {5} CONFIG.NUM_SI {1} ] $microblaze_0_axi_periph
+
+ # Create instance: microblaze_0_local_memory
+ create_hier_cell_microblaze_0_local_memory [current_bd_instance .] microblaze_0_local_memory
+
+ # Create instance: mig_7series_0, and set properties
+ set mig_7series_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:mig_7series:2.3 mig_7series_0 ]
+ set_property -dict [ list CONFIG.BOARD_MIG_PARAM {ddr3_sdram} CONFIG.RESET_BOARD_INTERFACE {reset} ] $mig_7series_0
+
+ # Create instance: rst_clk_wiz_1_100M, and set properties
+ set rst_clk_wiz_1_100M [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 rst_clk_wiz_1_100M ]
+ set_property -dict [ list CONFIG.RESET_BOARD_INTERFACE {Custom} CONFIG.USE_BOARD_FLOW {true} ] $rst_clk_wiz_1_100M
+
+ # Create instance: xlconcat_0, and set properties
+ set xlconcat_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 xlconcat_0 ]
+ set_property -dict [ list CONFIG.NUM_PORTS {3} ] $xlconcat_0
+
+ # Create interface connections
+ connect_bd_intf_net -intf_net SYS_CLK_1 [get_bd_intf_ports sys_diff_clock] [get_bd_intf_pins mig_7series_0/SYS_CLK]
+ connect_bd_intf_net -intf_net axi_ethernetlite_0_MDIO [get_bd_intf_ports mdio_mdc] [get_bd_intf_pins axi_ethernetlite_0/MDIO]
+ connect_bd_intf_net -intf_net axi_ethernetlite_0_MII [get_bd_intf_ports mii] [get_bd_intf_pins axi_ethernetlite_0/MII]
+ connect_bd_intf_net -intf_net axi_gpio_0_GPIO [get_bd_intf_ports led_8bits] [get_bd_intf_pins axi_gpio_0/GPIO]
+ connect_bd_intf_net -intf_net axi_intc_0_interrupt [get_bd_intf_pins axi_intc_0/interrupt] [get_bd_intf_pins microblaze_0/INTERRUPT]
+ connect_bd_intf_net -intf_net axi_mem_intercon_M00_AXI [get_bd_intf_pins axi_mem_intercon/M00_AXI] [get_bd_intf_pins mig_7series_0/S_AXI]
+ connect_bd_intf_net -intf_net axi_uartlite_0_UART [get_bd_intf_ports rs232_uart] [get_bd_intf_pins axi_uartlite_0/UART]
+ connect_bd_intf_net -intf_net microblaze_0_M_AXI_DC [get_bd_intf_pins axi_mem_intercon/S00_AXI] [get_bd_intf_pins microblaze_0/M_AXI_DC]
+ connect_bd_intf_net -intf_net microblaze_0_M_AXI_DP [get_bd_intf_pins microblaze_0/M_AXI_DP] [get_bd_intf_pins microblaze_0_axi_periph/S00_AXI]
+ connect_bd_intf_net -intf_net microblaze_0_M_AXI_IC [get_bd_intf_pins axi_mem_intercon/S01_AXI] [get_bd_intf_pins microblaze_0/M_AXI_IC]
+ connect_bd_intf_net -intf_net microblaze_0_axi_periph_M00_AXI [get_bd_intf_pins axi_uartlite_0/S_AXI] [get_bd_intf_pins microblaze_0_axi_periph/M00_AXI]
+ connect_bd_intf_net -intf_net microblaze_0_axi_periph_M01_AXI [get_bd_intf_pins axi_gpio_0/S_AXI] [get_bd_intf_pins microblaze_0_axi_periph/M01_AXI]
+ connect_bd_intf_net -intf_net microblaze_0_axi_periph_M02_AXI [get_bd_intf_pins axi_timer_0/S_AXI] [get_bd_intf_pins microblaze_0_axi_periph/M02_AXI]
+ connect_bd_intf_net -intf_net microblaze_0_axi_periph_M03_AXI [get_bd_intf_pins axi_intc_0/s_axi] [get_bd_intf_pins microblaze_0_axi_periph/M03_AXI]
+ connect_bd_intf_net -intf_net microblaze_0_axi_periph_M04_AXI [get_bd_intf_pins axi_ethernetlite_0/S_AXI] [get_bd_intf_pins microblaze_0_axi_periph/M04_AXI]
+ connect_bd_intf_net -intf_net microblaze_0_debug [get_bd_intf_pins mdm_1/MBDEBUG_0] [get_bd_intf_pins microblaze_0/DEBUG]
+ connect_bd_intf_net -intf_net microblaze_0_dlmb_1 [get_bd_intf_pins microblaze_0/DLMB] [get_bd_intf_pins microblaze_0_local_memory/DLMB]
+ connect_bd_intf_net -intf_net microblaze_0_ilmb_1 [get_bd_intf_pins microblaze_0/ILMB] [get_bd_intf_pins microblaze_0_local_memory/ILMB]
+ connect_bd_intf_net -intf_net mig_7series_0_DDR3 [get_bd_intf_ports ddr3_sdram] [get_bd_intf_pins mig_7series_0/DDR3]
+
+ # Create port connections
+ connect_bd_net -net axi_ethernetlite_0_ip2intc_irpt [get_bd_pins axi_ethernetlite_0/ip2intc_irpt] [get_bd_pins xlconcat_0/In2]
+ connect_bd_net -net axi_timer_0_interrupt [get_bd_pins axi_timer_0/interrupt] [get_bd_pins xlconcat_0/In0]
+ connect_bd_net -net axi_uartlite_0_interrupt [get_bd_pins axi_uartlite_0/interrupt] [get_bd_pins xlconcat_0/In1]
+ connect_bd_net -net mdm_1_debug_sys_rst [get_bd_pins mdm_1/Debug_SYS_Rst] [get_bd_pins rst_clk_wiz_1_100M/mb_debug_sys_rst]
+ connect_bd_net -net microblaze_0_Clk [get_bd_pins axi_ethernetlite_0/s_axi_aclk] [get_bd_pins axi_gpio_0/s_axi_aclk] [get_bd_pins axi_intc_0/s_axi_aclk] [get_bd_pins axi_mem_intercon/ACLK] [get_bd_pins axi_mem_intercon/M00_ACLK] [get_bd_pins axi_mem_intercon/S00_ACLK] [get_bd_pins axi_mem_intercon/S01_ACLK] [get_bd_pins axi_timer_0/s_axi_aclk] [get_bd_pins axi_uartlite_0/s_axi_aclk] [get_bd_pins microblaze_0/Clk] [get_bd_pins microblaze_0_axi_periph/ACLK] [get_bd_pins microblaze_0_axi_periph/M00_ACLK] [get_bd_pins microblaze_0_axi_periph/M01_ACLK] [get_bd_pins microblaze_0_axi_periph/M02_ACLK] [get_bd_pins microblaze_0_axi_periph/M03_ACLK] [get_bd_pins microblaze_0_axi_periph/M04_ACLK] [get_bd_pins microblaze_0_axi_periph/S00_ACLK] [get_bd_pins microblaze_0_local_memory/LMB_Clk] [get_bd_pins mig_7series_0/ui_clk] [get_bd_pins rst_clk_wiz_1_100M/slowest_sync_clk]
+ connect_bd_net -net mig_7series_0_mmcm_locked [get_bd_pins mig_7series_0/mmcm_locked] [get_bd_pins rst_clk_wiz_1_100M/dcm_locked]
+ connect_bd_net -net mig_7series_0_ui_clk_sync_rst [get_bd_pins mig_7series_0/ui_clk_sync_rst] [get_bd_pins rst_clk_wiz_1_100M/ext_reset_in]
+ connect_bd_net -net reset_1 [get_bd_ports reset] [get_bd_pins mig_7series_0/sys_rst]
+ connect_bd_net -net rst_clk_wiz_1_100M_bus_struct_reset [get_bd_pins microblaze_0_local_memory/LMB_Rst] [get_bd_pins rst_clk_wiz_1_100M/bus_struct_reset]
+ connect_bd_net -net rst_clk_wiz_1_100M_interconnect_aresetn [get_bd_pins axi_mem_intercon/ARESETN] [get_bd_pins microblaze_0_axi_periph/ARESETN] [get_bd_pins rst_clk_wiz_1_100M/interconnect_aresetn]
+ connect_bd_net -net rst_clk_wiz_1_100M_mb_reset [get_bd_pins microblaze_0/Reset] [get_bd_pins rst_clk_wiz_1_100M/mb_reset]
+ connect_bd_net -net rst_clk_wiz_1_100M_peripheral_aresetn [get_bd_pins axi_ethernetlite_0/s_axi_aresetn] [get_bd_pins axi_gpio_0/s_axi_aresetn] [get_bd_pins axi_intc_0/s_axi_aresetn] [get_bd_pins axi_mem_intercon/M00_ARESETN] [get_bd_pins axi_mem_intercon/S00_ARESETN] [get_bd_pins axi_mem_intercon/S01_ARESETN] [get_bd_pins axi_timer_0/s_axi_aresetn] [get_bd_pins axi_uartlite_0/s_axi_aresetn] [get_bd_pins microblaze_0_axi_periph/M00_ARESETN] [get_bd_pins microblaze_0_axi_periph/M01_ARESETN] [get_bd_pins microblaze_0_axi_periph/M02_ARESETN] [get_bd_pins microblaze_0_axi_periph/M03_ARESETN] [get_bd_pins microblaze_0_axi_periph/M04_ARESETN] [get_bd_pins microblaze_0_axi_periph/S00_ARESETN] [get_bd_pins mig_7series_0/aresetn] [get_bd_pins rst_clk_wiz_1_100M/peripheral_aresetn]
+ connect_bd_net -net xlconcat_0_dout [get_bd_pins axi_intc_0/intr] [get_bd_pins xlconcat_0/dout]
+
+ # Create address segments
+ create_bd_addr_seg -range 0x10000 -offset 0x40E00000 [get_bd_addr_spaces microblaze_0/Data] [get_bd_addr_segs axi_ethernetlite_0/S_AXI/Reg] SEG_axi_ethernetlite_0_Reg
+ create_bd_addr_seg -range 0x10000 -offset 0x40000000 [get_bd_addr_spaces microblaze_0/Data] [get_bd_addr_segs axi_gpio_0/S_AXI/Reg] SEG_axi_gpio_0_Reg
+ create_bd_addr_seg -range 0x10000 -offset 0x41200000 [get_bd_addr_spaces microblaze_0/Data] [get_bd_addr_segs axi_intc_0/s_axi/Reg] SEG_axi_intc_0_Reg
+ create_bd_addr_seg -range 0x10000 -offset 0x41C00000 [get_bd_addr_spaces microblaze_0/Data] [get_bd_addr_segs axi_timer_0/S_AXI/Reg] SEG_axi_timer_0_Reg
+ create_bd_addr_seg -range 0x10000 -offset 0x40600000 [get_bd_addr_spaces microblaze_0/Data] [get_bd_addr_segs axi_uartlite_0/S_AXI/Reg] SEG_axi_uartlite_0_Reg
+ create_bd_addr_seg -range 0x40000 -offset 0x0 [get_bd_addr_spaces microblaze_0/Data] [get_bd_addr_segs microblaze_0_local_memory/dlmb_bram_if_cntlr/SLMB/Mem] SEG_dlmb_bram_if_cntlr_Mem
+ create_bd_addr_seg -range 0x40000 -offset 0x0 [get_bd_addr_spaces microblaze_0/Instruction] [get_bd_addr_segs microblaze_0_local_memory/ilmb_bram_if_cntlr/SLMB/Mem] SEG_ilmb_bram_if_cntlr_Mem
+ create_bd_addr_seg -range 0x40000000 -offset 0x80000000 [get_bd_addr_spaces microblaze_0/Data] [get_bd_addr_segs mig_7series_0/memmap/memaddr] SEG_mig_7series_0_memaddr
+ create_bd_addr_seg -range 0x40000000 -offset 0x80000000 [get_bd_addr_spaces microblaze_0/Instruction] [get_bd_addr_segs mig_7series_0/memmap/memaddr] SEG_mig_7series_0_memaddr
+
+
+ # Restore current instance
+ current_bd_instance $oldCurInst
+
+ save_bd_design
+}
+# End of create_root_design()
+
+
+##################################################################
+# MAIN FLOW
+##################################################################
+
+create_root_design ""
+
+
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design_wrapper.bit b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design_wrapper.bit
new file mode 100644
index 000000000..6fdb600f4
Binary files /dev/null and b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design_wrapper.bit differ
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design_wrapper.mmi b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design_wrapper.mmi
new file mode 100644
index 000000000..40c93ef57
--- /dev/null
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design_wrapper.mmi
@@ -0,0 +1,334 @@
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diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/sysdef.xml b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/sysdef.xml
new file mode 100644
index 000000000..6e97db55c
--- /dev/null
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/sysdef.xml
@@ -0,0 +1,14 @@
+
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diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/system.hdf b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/system.hdf
new file mode 100644
index 000000000..d508b5e65
Binary files /dev/null and b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/system.hdf differ
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/.project b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/.project
index 3dbb5fb21..75b220069 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/.project
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/.project
@@ -115,7 +115,7 @@
- 1421425118832
+ 1426001044021
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -124,7 +124,7 @@
- 1421425118842
+ 1426001044028
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -133,7 +133,7 @@
- 1421425118842
+ 1426001044037
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -142,7 +142,7 @@
- 1421425118852
+ 1426001044046
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -151,7 +151,7 @@
- 1421425118852
+ 1426001044057
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -160,7 +160,7 @@
- 1421425118852
+ 1426001044063
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -169,7 +169,7 @@
- 1421425118862
+ 1426001044071
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -178,7 +178,7 @@
- 1421425118872
+ 1426001044076
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -187,7 +187,7 @@
- 1421425118872
+ 1426001044081
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -196,7 +196,7 @@
- 1421425118872
+ 1426001044088
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -205,7 +205,7 @@
- 1421425118882
+ 1426001044094
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -214,7 +214,7 @@
- 1421425118882
+ 1426001044098
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -223,7 +223,7 @@
- 1421425118892
+ 1426001044103
src/Full_Demo/Common_Demo_Source/Minimal
5
@@ -232,7 +232,7 @@
- 1421425118892
+ 1426001044107
src/Full_Demo/Common_Demo_Source/Minimal
5
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c
index e1b15a5d0..af5550ac9 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c
@@ -137,7 +137,6 @@
#include "partest.h"
#include "serial.h"
#include "TimerDemo.h"
-#include "IntQueue.h"
#include "EventGroupsDemo.h"
#include "TaskNotify.h"
#include "IntSemTest.h"
@@ -242,8 +241,6 @@ void main_full( void )
/* Start all the other standard demo/test tasks. They have not particular
functionality, but do demonstrate how to use the FreeRTOS API and test the
kernel port. */
-// vStartInterruptQueueTasks();
-
vStartDynamicPriorityTasks();
vCreateBlockTimeTasks();
vStartCountingSemaphoreTasks();
@@ -321,11 +318,6 @@ unsigned long ulErrorFound = pdFALSE;
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none have detected an error. */
-if( 0 )// if( xAreIntQueueTasksStillRunning() != pdTRUE )
- {
- ulErrorFound |= 1UL << 0UL;
- }
-
if( xAreMathsTaskStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 1UL;
@@ -356,6 +348,11 @@ if( 0 )// if( xAreIntQueueTasksStillRunning() != pdTRUE )
ulErrorFound |= 1UL << 8UL;
}
+ if( xAreTimerDemoTasksStillRunning( ( TickType_t ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS )
+ {
+ ulErrorFound |= 1UL << 9UL;
+ }
+
if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 10UL;
@@ -366,11 +363,6 @@ if( 0 )// if( xAreIntQueueTasksStillRunning() != pdTRUE )
ulErrorFound |= 1UL << 14UL;
}
- if( xAreTimerDemoTasksStillRunning( ( TickType_t ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS )
- {
- ulErrorFound |= 1UL << 9UL;
- }
-
if( xAreEventGroupTasksStillRunning() != pdPASS )
{
ulErrorFound |= 1UL << 12UL;
diff --git a/FreeRTOS/Source/include/projdefs.h b/FreeRTOS/Source/include/projdefs.h
index e8198b354..db30b34be 100644
--- a/FreeRTOS/Source/include/projdefs.h
+++ b/FreeRTOS/Source/include/projdefs.h
@@ -77,7 +77,7 @@
typedef void (*TaskFunction_t)( void * );
/* Converts a time in milliseconds to a time in ticks. */
-#define pdMS_TO_TICKS( xTimeInMs ) ( ( ( TickType_t ) ( xTimeInMs ) * configTICK_RATE_HZ ) / ( TickType_t ) 1000 )
+#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) )
#define pdFALSE ( ( BaseType_t ) 0 )
#define pdTRUE ( ( BaseType_t ) 1 )
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
index 543aa00dd..f47e9ca26 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
@@ -489,7 +489,6 @@ __asm void xPortPendSVHandler( void )
#endif
bx r14
- nop
}
/*-----------------------------------------------------------*/
diff --git a/FreeRTOS/Source/queue.c b/FreeRTOS/Source/queue.c
index b26f6dac7..c552e6605 100644
--- a/FreeRTOS/Source/queue.c
+++ b/FreeRTOS/Source/queue.c
@@ -340,7 +340,7 @@ int8_t *pcAllocatedBuffer;
if( pcAllocatedBuffer != NULL )
{
- pxNewQueue = ( Queue_t * ) pcAllocatedBuffer; /*lint !e826 MISRA The buffer cannot be to small because it was dimensioned by sizeof( Queue_t ) + xQueueSizeInBytes. */
+ pxNewQueue = ( Queue_t * ) pcAllocatedBuffer; /*lint !e826 MISRA The buffer cannot be too small because it was dimensioned by sizeof( Queue_t ) + xQueueSizeInBytes. */
if( uxItemSize == ( UBaseType_t ) 0 )
{